From ce4786b932850c417a5e5e6c58cc5bdba655e314 Mon Sep 17 00:00:00 2001 From: cblume Date: Tue, 15 Dec 2009 13:14:46 +0000 Subject: [PATCH] AliTRDmcmSim: - cleaning of includes - removal of temporary PID table - adding output operator and rearrange output methods - remove parameter classes - simplify ZS code - LoadMCM(...) uses SetData(...) - make noise test configurable - bugfixes in drawing methods - take position LUT from DMEM AliTRDtrapConfig: - add peek/poke to write to given address - add DMEM - add ReadPackedConfig (needs testing) AliTRDdigitizer: - add tracklet writing (instead of doing it in mcmSim) --- TRD/AliTRDdigitizer.cxx | 4 + TRD/AliTRDmcmSim.cxx | 1161 ++++++++++----------- TRD/AliTRDmcmSim.h | 138 +-- TRD/AliTRDtrapConfig.cxx | 2128 +++++++++++++++++++++----------------- TRD/AliTRDtrapConfig.h | 1094 ++++++++++---------- 5 files changed, 2374 insertions(+), 2151 deletions(-) diff --git a/TRD/AliTRDdigitizer.cxx b/TRD/AliTRDdigitizer.cxx index 308dcb5cb18..ee298edba4c 100644 --- a/TRD/AliTRDdigitizer.cxx +++ b/TRD/AliTRDdigitizer.cxx @@ -654,6 +654,9 @@ Bool_t AliTRDdigitizer::MakeDigits() } // for: detector + if (!fSDigits) + AliRunLoader::Instance()->GetLoader("TRDLoader")->GetDataLoader("tracklets")->WriteData("OVERWRITE"); + delete [] hits; delete [] nhit; @@ -1689,6 +1692,7 @@ Bool_t AliTRDdigitizer::ConvertSDigits() } // for: detector numbers + AliRunLoader::Instance()->GetLoader("TRDLoader")->GetDataLoader("tracklets")->WriteData("OVERWRITE"); // Save the values for the raw data headers fDigitsManager->GetDigitsParam()->SetNTimeBins(AliTRDSimParam::Instance()->GetNTimeBins()); fDigitsManager->GetDigitsParam()->SetADCbaseline(AliTRDSimParam::Instance()->GetADCbaseline()); diff --git a/TRD/AliTRDmcmSim.cxx b/TRD/AliTRDmcmSim.cxx index fb34a84305b..984191239c4 100644 --- a/TRD/AliTRDmcmSim.cxx +++ b/TRD/AliTRDmcmSim.cxx @@ -18,129 +18,69 @@ /////////////////////////////////////////////////////////////////////////////// // // // TRD MCM (Multi Chip Module) simulator // -// which simulated the TRAP processing after the AD-conversion // -// The relevant parameters (i.e. configuration registers of the TRAP // -// configuration are taken from AliTRDtrapConfig. // +// which simulates the TRAP processing after the AD-conversion. // +// The relevant parameters (i.e. configuration settings of the TRAP) // +// are taken from AliTRDtrapConfig. // // // /////////////////////////////////////////////////////////////////////////////// -#include // needed for raw data dump +#include +#include -#include -#include -#include -#include -#include -#include -#include -#include +#include "TCanvas.h" +#include "TH1F.h" +#include "TH2F.h" +#include "TGraph.h" +#include "TLine.h" +#include "TRandom.h" +#include "TClonesArray.h" #include "AliLog.h" -#include "AliRun.h" #include "AliRunLoader.h" #include "AliLoader.h" -#include "AliTRDdigit.h" #include "AliTRDfeeParam.h" #include "AliTRDtrapConfig.h" -#include "AliTRDSimParam.h" -#include "AliTRDgeometry.h" -#include "AliTRDcalibDB.h" #include "AliTRDdigitsManager.h" #include "AliTRDarrayADC.h" #include "AliTRDarrayDictionary.h" -#include "AliTRDpadPlane.h" #include "AliTRDtrackletMCM.h" #include "AliTRDmcmSim.h" -#include "AliMagF.h" -#include "TGeoGlobalMagField.h" - ClassImp(AliTRDmcmSim) Bool_t AliTRDmcmSim::fgApplyCut = kTRUE; - -Float_t AliTRDmcmSim::fgChargeNorm = 65000.; -Int_t AliTRDmcmSim::fgAddBaseline = 0; - -Int_t AliTRDmcmSim::fgPidNBinsQ0 = 40; -Int_t AliTRDmcmSim::fgPidNBinsQ1 = 50; -Bool_t AliTRDmcmSim::fgPidLutDelete = kFALSE; -Int_t AliTRDmcmSim::fgPidLutDefault[40][50] = { - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, - { 0, 9, 6, 12, 29, 53, 76, 94, 107, 116, 122, 126, 128, 129, 129, 129, 128, 127, 126, 124, 122, 120, 117, 115, 112, 109, 107, 104, 101, 99, 96, 94, 91, 89, 87, 85, 83, 81, 79, 78, 77, 75, 74, 73, 72, 72, 71, 71, 70, 70 }, - { 0, 14, 8, 17, 37, 66, 94, 116, 131, 140, 146, 150, 152, 153, 153, 152, 150, 148, 145, 143, 139, 136, 132, 129, 125, 121, 118, 114, 110, 107, 104, 101, 98, 95, 93, 91, 89, 87, 85, 83, 82, 81, 80, 79, 78, 77, 77, 76, 76, 75 }, - { 0, 33, 19, 34, 69, 112, 145, 167, 181, 189, 194, 196, 197, 197, 196, 194, 191, 188, 184, 180, 175, 170, 165, 159, 154, 148, 143, 137, 132, 127, 123, 118, 114, 111, 107, 104, 101, 99, 96, 94, 92, 91, 89, 88, 87, 86, 85, 85, 84, 84 }, - { 0, 82, 52, 83, 136, 180, 205, 218, 226, 230, 232, 233, 233, 233, 232, 230, 228, 226, 223, 219, 215, 210, 205, 199, 193, 187, 180, 173, 167, 160, 154, 148, 142, 136, 131, 127, 122, 119, 115, 112, 109, 106, 104, 102, 100, 99, 97, 96, 95, 94 }, - { 0, 132, 96, 136, 185, 216, 231, 238, 242, 244, 245, 245, 245, 245, 245, 244, 243, 242, 240, 238, 236, 233, 230, 226, 222, 217, 212, 206, 200, 193, 187, 180, 173, 167, 161, 155, 149, 144, 139, 134, 130, 126, 123, 120, 117, 114, 112, 110, 108, 107 }, - { 0, 153, 120, 160, 203, 227, 238, 243, 246, 247, 248, 249, 249, 249, 248, 248, 247, 246, 245, 244, 243, 241, 239, 237, 234, 231, 228, 224, 219, 215, 209, 204, 198, 192, 186, 180, 174, 168, 163, 157, 152, 147, 143, 139, 135, 131, 128, 125, 123, 120 }, - { 0, 156, 128, 166, 207, 229, 239, 244, 247, 248, 249, 249, 249, 249, 249, 249, 248, 247, 247, 246, 244, 243, 242, 240, 238, 236, 233, 230, 227, 224, 220, 216, 212, 207, 202, 197, 192, 187, 181, 176, 171, 166, 161, 156, 152, 148, 144, 140, 137, 134 }, - { 0, 152, 128, 166, 206, 228, 239, 244, 246, 248, 249, 249, 249, 249, 249, 248, 248, 247, 246, 245, 244, 243, 241, 240, 238, 236, 234, 232, 229, 226, 224, 220, 217, 214, 210, 206, 202, 197, 193, 188, 184, 179, 174, 170, 166, 161, 157, 153, 150, 146 }, - { 0, 146, 126, 164, 203, 226, 237, 243, 246, 247, 248, 248, 248, 248, 248, 247, 247, 246, 245, 244, 242, 241, 239, 238, 236, 234, 232, 230, 227, 225, 223, 220, 217, 215, 212, 209, 205, 202, 199, 195, 191, 187, 183, 179, 175, 171, 168, 164, 160, 156 }, - { 0, 140, 123, 160, 200, 224, 235, 241, 244, 246, 247, 247, 247, 247, 247, 246, 245, 244, 243, 242, 240, 238, 237, 235, 233, 230, 228, 226, 224, 221, 219, 217, 215, 212, 210, 207, 205, 202, 200, 197, 194, 191, 188, 184, 181, 178, 174, 171, 168, 164 }, - { 0, 133, 119, 156, 196, 220, 233, 239, 243, 245, 245, 246, 246, 246, 245, 244, 243, 242, 241, 239, 237, 235, 233, 231, 229, 226, 224, 221, 219, 216, 214, 212, 210, 208, 206, 204, 202, 199, 197, 195, 193, 191, 188, 186, 183, 181, 178, 175, 172, 169 }, - { 0, 127, 115, 152, 192, 217, 230, 237, 241, 243, 244, 244, 244, 244, 243, 242, 241, 240, 238, 236, 234, 232, 229, 227, 224, 221, 218, 216, 213, 210, 208, 206, 203, 201, 200, 198, 196, 194, 193, 191, 190, 188, 186, 185, 183, 181, 179, 177, 174, 172 }, - { 0, 121, 111, 147, 187, 213, 227, 235, 239, 241, 242, 243, 243, 242, 241, 240, 239, 237, 236, 233, 231, 228, 225, 222, 219, 216, 213, 210, 207, 204, 201, 199, 196, 194, 192, 191, 189, 188, 187, 185, 184, 183, 182, 181, 180, 178, 177, 176, 174, 172 }, - { 0, 116, 107, 142, 181, 209, 224, 232, 237, 239, 240, 241, 241, 240, 239, 238, 237, 235, 233, 230, 227, 224, 221, 218, 214, 211, 207, 204, 200, 197, 194, 191, 189, 187, 185, 183, 182, 180, 179, 178, 178, 177, 176, 175, 175, 174, 173, 172, 172, 170 }, - { 0, 112, 103, 136, 176, 204, 220, 229, 234, 237, 238, 239, 239, 238, 237, 236, 234, 232, 230, 227, 224, 221, 217, 213, 209, 205, 201, 198, 194, 190, 187, 184, 181, 179, 177, 175, 174, 172, 171, 171, 170, 169, 169, 169, 168, 168, 168, 168, 167, 167 }, - { 0, 107, 99, 131, 170, 199, 216, 226, 231, 234, 236, 237, 237, 236, 235, 234, 232, 230, 227, 224, 221, 217, 213, 209, 205, 200, 196, 192, 188, 184, 180, 177, 174, 172, 169, 167, 166, 164, 163, 162, 162, 161, 161, 161, 161, 161, 161, 162, 162, 162 }, - { 0, 104, 94, 125, 164, 193, 212, 222, 228, 232, 233, 234, 234, 234, 233, 231, 229, 227, 224, 221, 218, 214, 210, 205, 201, 196, 191, 187, 182, 178, 174, 171, 168, 165, 162, 160, 158, 157, 155, 154, 154, 153, 153, 153, 153, 154, 154, 154, 155, 155 }, - { 0, 100, 90, 119, 157, 188, 207, 219, 225, 229, 231, 232, 232, 231, 230, 229, 227, 224, 222, 218, 215, 211, 206, 202, 197, 192, 187, 182, 178, 173, 169, 165, 162, 158, 156, 153, 151, 149, 148, 147, 146, 146, 145, 145, 145, 146, 146, 147, 148, 148 }, - { 0, 97, 86, 113, 150, 182, 202, 215, 222, 226, 228, 229, 229, 229, 228, 226, 224, 222, 219, 216, 212, 208, 203, 199, 194, 188, 183, 178, 173, 169, 164, 160, 156, 153, 150, 147, 145, 143, 141, 140, 139, 138, 138, 138, 138, 138, 139, 139, 140, 141 }, - { 0, 94, 82, 107, 144, 176, 197, 210, 218, 223, 225, 227, 227, 227, 226, 224, 222, 220, 217, 213, 209, 205, 201, 196, 191, 186, 180, 175, 170, 165, 160, 156, 152, 148, 145, 142, 139, 137, 135, 134, 132, 131, 131, 131, 131, 131, 131, 132, 132, 133 }, - { 0, 92, 78, 102, 137, 169, 192, 206, 215, 220, 223, 224, 224, 224, 223, 222, 220, 217, 215, 211, 207, 203, 199, 194, 188, 183, 178, 172, 167, 162, 157, 152, 148, 144, 140, 137, 134, 132, 130, 128, 127, 125, 125, 124, 124, 124, 124, 125, 125, 126 }, - { 0, 90, 75, 96, 131, 163, 187, 202, 211, 216, 220, 221, 222, 222, 221, 220, 218, 215, 212, 209, 205, 201, 197, 192, 187, 181, 176, 170, 165, 159, 154, 149, 145, 141, 137, 133, 130, 128, 125, 123, 122, 120, 119, 118, 118, 118, 118, 118, 119, 119 }, - { 0, 88, 71, 91, 124, 157, 181, 197, 207, 213, 217, 219, 219, 219, 219, 217, 216, 213, 211, 207, 204, 200, 195, 190, 185, 180, 174, 169, 163, 158, 152, 147, 142, 138, 134, 130, 127, 124, 121, 119, 117, 116, 114, 114, 113, 112, 112, 112, 112, 113 }, - { 0, 87, 68, 86, 118, 151, 176, 192, 203, 210, 214, 216, 217, 217, 217, 215, 214, 212, 209, 206, 202, 198, 194, 189, 184, 179, 173, 167, 162, 156, 151, 146, 141, 136, 132, 128, 124, 121, 118, 116, 114, 112, 110, 109, 108, 108, 107, 107, 107, 107 }, - { 0, 85, 65, 81, 112, 144, 170, 188, 199, 206, 211, 213, 214, 215, 214, 213, 212, 210, 207, 204, 201, 197, 193, 188, 183, 178, 172, 167, 161, 155, 150, 145, 140, 135, 130, 126, 122, 119, 116, 113, 111, 109, 107, 106, 105, 104, 103, 103, 102, 102 }, - { 0, 84, 62, 77, 106, 138, 165, 183, 195, 203, 208, 210, 212, 212, 212, 211, 210, 208, 206, 203, 200, 196, 192, 187, 183, 177, 172, 166, 161, 155, 150, 144, 139, 134, 129, 125, 121, 117, 114, 111, 109, 106, 104, 103, 101, 100, 99, 99, 98, 98 }, - { 0, 84, 60, 73, 101, 133, 159, 178, 191, 199, 204, 208, 209, 210, 210, 209, 208, 206, 204, 202, 199, 195, 191, 187, 182, 177, 172, 166, 161, 155, 150, 144, 139, 134, 129, 124, 120, 116, 113, 110, 107, 104, 102, 100, 99, 98, 96, 96, 95, 95 }, - { 0, 83, 58, 69, 96, 127, 154, 174, 187, 196, 201, 205, 207, 208, 208, 207, 206, 205, 203, 200, 197, 194, 190, 186, 182, 177, 172, 167, 161, 156, 150, 145, 139, 134, 129, 124, 120, 116, 112, 109, 106, 103, 101, 99, 97, 95, 94, 93, 92, 92 }, - { 0, 82, 56, 66, 91, 121, 149, 169, 183, 192, 198, 202, 204, 206, 206, 206, 205, 203, 201, 199, 196, 193, 190, 186, 182, 177, 172, 167, 162, 156, 151, 145, 140, 135, 129, 125, 120, 116, 112, 108, 105, 102, 100, 97, 95, 94, 92, 91, 90, 89 }, - { 0, 82, 54, 62, 86, 116, 144, 165, 179, 189, 195, 199, 202, 203, 204, 204, 203, 202, 200, 198, 196, 193, 189, 186, 182, 177, 173, 168, 163, 157, 152, 146, 141, 136, 130, 125, 121, 116, 112, 108, 105, 102, 99, 96, 94, 92, 91, 89, 88, 87 }, - { 0, 82, 52, 59, 82, 111, 139, 160, 175, 185, 192, 197, 200, 201, 202, 202, 201, 200, 199, 197, 195, 192, 189, 186, 182, 178, 173, 168, 163, 158, 153, 148, 142, 137, 132, 127, 122, 117, 113, 109, 105, 102, 99, 96, 94, 92, 90, 88, 87, 85 }, - { 0, 82, 50, 56, 78, 106, 134, 156, 171, 182, 189, 194, 197, 199, 200, 200, 200, 199, 198, 196, 194, 191, 188, 185, 182, 178, 174, 169, 164, 159, 154, 149, 144, 138, 133, 128, 123, 118, 114, 110, 106, 102, 99, 96, 93, 91, 89, 87, 86, 84 }, - { 0, 82, 49, 54, 74, 102, 129, 151, 167, 179, 186, 191, 195, 197, 198, 198, 198, 197, 196, 195, 193, 191, 188, 185, 182, 178, 174, 170, 165, 161, 156, 151, 145, 140, 135, 130, 125, 120, 115, 111, 107, 103, 100, 97, 94, 91, 89, 87, 85, 83 }, - { 0, 82, 47, 51, 70, 97, 124, 147, 164, 175, 183, 189, 192, 195, 196, 197, 197, 196, 195, 194, 192, 190, 188, 185, 182, 178, 175, 171, 166, 162, 157, 152, 147, 142, 137, 132, 127, 122, 117, 112, 108, 104, 101, 97, 94, 91, 89, 87, 85, 83 }, - { 0, 83, 46, 49, 67, 93, 120, 143, 160, 172, 180, 186, 190, 192, 194, 195, 195, 195, 194, 193, 191, 189, 187, 185, 182, 179, 175, 172, 167, 163, 159, 154, 149, 144, 139, 134, 129, 124, 119, 114, 110, 106, 102, 98, 95, 92, 89, 87, 85, 83 }, - { 0, 83, 45, 47, 64, 89, 116, 139, 156, 169, 177, 184, 188, 190, 192, 193, 193, 193, 193, 192, 190, 189, 187, 184, 182, 179, 176, 172, 168, 164, 160, 156, 151, 146, 141, 136, 131, 126, 121, 116, 112, 108, 104, 100, 96, 93, 90, 88, 85, 83 }, - { 0, 84, 44, 45, 61, 85, 111, 134, 152, 165, 175, 181, 185, 188, 190, 191, 192, 192, 191, 191, 189, 188, 186, 184, 182, 179, 176, 173, 169, 166, 162, 157, 153, 148, 143, 138, 133, 128, 124, 119, 114, 110, 106, 102, 98, 95, 91, 89, 86, 84 }, - { 0, 85, 43, 43, 58, 81, 107, 131, 149, 162, 172, 178, 183, 186, 188, 190, 190, 190, 190, 189, 188, 187, 186, 184, 182, 179, 176, 173, 170, 167, 163, 159, 155, 150, 145, 141, 136, 131, 126, 121, 117, 112, 108, 104, 100, 96, 93, 90, 87, 85 }, - { 0, 85, 42, 41, 55, 78, 103, 127, 145, 159, 169, 176, 181, 184, 186, 188, 189, 189, 189, 188, 188, 186, 185, 183, 181, 179, 177, 174, 171, 168, 164, 160, 156, 152, 148, 143, 138, 134, 129, 124, 119, 115, 110, 106, 102, 98, 95, 91, 88, 86 } -}; - -Int_t (*AliTRDmcmSim::fgPidLut) = *fgPidLutDefault; - -//_____________________________________________________________________________ -AliTRDmcmSim::AliTRDmcmSim() : TObject() - ,fInitialized(kFALSE) - ,fMaxTracklets(-1) - ,fDetector(-1) - ,fRobPos(-1) - ,fMcmPos(-1) - ,fRow (-1) - ,fNADC(-1) - ,fNTimeBin(-1) - ,fADCR(NULL) - ,fADCF(NULL) - ,fMCMT(NULL) - ,fTrackletArray(NULL) - ,fZSM(NULL) - ,fZSM1Dim(NULL) - ,fFeeParam(NULL) - ,fTrapConfig(NULL) - ,fSimParam(NULL) - ,fCommonParam(NULL) - ,fCal(NULL) - ,fGeo(NULL) - ,fDigitsManager(NULL) - ,fPedAcc(NULL) - ,fGainCounterA(NULL) - ,fGainCounterB(NULL) - ,fTailAmplLong(NULL) - ,fTailAmplShort(NULL) - ,fNHits(0) - ,fFitReg(NULL) +Int_t AliTRDmcmSim::fgAddBaseline = 0; + +const Int_t AliTRDmcmSim::fgkFormatIndex = std::ios_base::xalloc(); + +const Int_t AliTRDmcmSim::fgkNADC = AliTRDfeeParam::GetNadcMcm(); +const UShort_t AliTRDmcmSim::fgkFPshifts[4] = {11, 14, 17, 21}; + + +AliTRDmcmSim::AliTRDmcmSim() : + TObject(), + fInitialized(kFALSE), + fDetector(-1), + fRobPos(-1), + fMcmPos(-1), + fRow (-1), + fNTimeBin(-1), + fADCR(NULL), + fADCF(NULL), + fMCMT(NULL), + fTrackletArray(NULL), + fZSMap(NULL), + fFeeParam(NULL), + fTrapConfig(NULL), + fDigitsManager(NULL), + fPedAcc(NULL), + fGainCounterA(NULL), + fGainCounterB(NULL), + fTailAmplLong(NULL), + fTailAmplShort(NULL), + fNHits(0), + fFitReg(NULL) { // // AliTRDmcmSim default constructor @@ -155,15 +95,13 @@ AliTRDmcmSim::~AliTRDmcmSim() // if(fInitialized) { - for( Int_t iadc = 0 ; iadc < fNADC; iadc++ ) { - delete [] fADCR[iadc]; - delete [] fADCF[iadc]; - delete [] fZSM [iadc]; + for( Int_t iAdc = 0 ; iAdc < fgkNADC; iAdc++ ) { + delete [] fADCR[iAdc]; + delete [] fADCF[iAdc]; } delete [] fADCR; delete [] fADCF; - delete [] fZSM; - delete [] fZSM1Dim; + delete [] fZSMap; delete [] fMCMT; delete [] fPedAcc; @@ -175,58 +113,48 @@ AliTRDmcmSim::~AliTRDmcmSim() fTrackletArray->Delete(); delete fTrackletArray; - delete fGeo; } } void AliTRDmcmSim::Init( Int_t det, Int_t robPos, Int_t mcmPos, Bool_t /* newEvent */ ) { // - // Initialize the class with new geometry information - // fADC array will be reused with filled by zero + // Initialize the class with new MCM position information + // memory is allocated in the first initialization // if (!fInitialized) { fFeeParam = AliTRDfeeParam::Instance(); fTrapConfig = AliTRDtrapConfig::Instance(); - fSimParam = AliTRDSimParam::Instance(); - fCommonParam = AliTRDCommonParam::Instance(); - fCal = AliTRDcalibDB::Instance(); - fGeo = new AliTRDgeometry(); } fDetector = det; fRobPos = robPos; fMcmPos = mcmPos; - fNADC = fFeeParam->GetNadcMcm(); - //fNTimeBin = fCal->GetNumberOfTimeBins(); - fNTimeBin = AliTRDSimParam::Instance()->GetNTimeBins(); + fNTimeBin = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kC13CPUA); fRow = fFeeParam->GetPadRowFromMCM( fRobPos, fMcmPos ); - fMaxTracklets = fFeeParam->GetMaxNrOfTracklets(); if (!fInitialized) { - fADCR = new Int_t *[fNADC]; - fADCF = new Int_t *[fNADC]; - fZSM = new Int_t *[fNADC]; - fZSM1Dim = new Int_t [fNADC]; - fGainCounterA = new UInt_t[fNADC]; - fGainCounterB = new UInt_t[fNADC]; - for( Int_t iadc = 0 ; iadc < fNADC; iadc++ ) { - fADCR[iadc] = new Int_t[fNTimeBin]; - fADCF[iadc] = new Int_t[fNTimeBin]; - fZSM [iadc] = new Int_t[fNTimeBin]; + fADCR = new Int_t *[fgkNADC]; + fADCF = new Int_t *[fgkNADC]; + fZSMap = new Int_t [fgkNADC]; + fGainCounterA = new UInt_t[fgkNADC]; + fGainCounterB = new UInt_t[fgkNADC]; + for( Int_t iAdc = 0 ; iAdc < fgkNADC; iAdc++ ) { + fADCR[iAdc] = new Int_t[fNTimeBin]; + fADCF[iAdc] = new Int_t[fNTimeBin]; } // filter registers - fPedAcc = new UInt_t[fNADC]; // accumulator for pedestal filter - fTailAmplLong = new UShort_t[fNADC]; - fTailAmplShort = new UShort_t[fNADC]; + fPedAcc = new UInt_t[fgkNADC]; // accumulator for pedestal filter + fTailAmplLong = new UShort_t[fgkNADC]; + fTailAmplShort = new UShort_t[fgkNADC]; // tracklet calculation - fFitReg = new FitReg_t[fNADC]; - fTrackletArray = new TClonesArray("AliTRDtrackletMCM", fMaxTracklets); + fFitReg = new FitReg_t[fgkNADC]; + fTrackletArray = new TClonesArray("AliTRDtrackletMCM", fgkMaxTracklets); - fMCMT = new UInt_t[fMaxTracklets]; + fMCMT = new UInt_t[fgkMaxTracklets]; } fInitialized = kTRUE; @@ -239,43 +167,53 @@ void AliTRDmcmSim::Reset() // Resets the data values and internal filter registers // by re-initialising them - for( Int_t iadc = 0 ; iadc < fNADC; iadc++ ) { - for( Int_t it = 0 ; it < fNTimeBin ; it++ ) { - fADCR[iadc][it] = 0; - fADCF[iadc][it] = 0; - fZSM [iadc][it] = 1; // Default unread = 1 simulator.SetMakeSDigits("TRD TOF PHOS HMPID EMCAL MUON FMD ZDC PMD T0 VZERO"); + if( !CheckInitialized() ) + return; + for( Int_t iAdc = 0 ; iAdc < fgkNADC; iAdc++ ) { + for( Int_t it = 0 ; it < fNTimeBin ; it++ ) { + fADCR[iAdc][it] = 0; + fADCF[iAdc][it] = 0; } - fZSM1Dim[iadc] = 1; // Default unread = 1 - fGainCounterA[iadc] = 0; - fGainCounterB[iadc] = 0; + fZSMap[iAdc] = -1; // Default unread, low active bit mask + fGainCounterA[iAdc] = 0; + fGainCounterB[iAdc] = 0; } - for(Int_t i = 0; i < fMaxTracklets; i++) { + for(Int_t i = 0; i < fgkMaxTracklets; i++) { fMCMT[i] = 0; } + + for (Int_t iDict = 0; iDict < 3; iDict++) + fDict[iDict] = 0x0; FilterPedestalInit(); FilterGainInit(); - FilterTailInit(fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFPNP)); //??? not really correct if gain filter is active + FilterTailInit(); } void AliTRDmcmSim::SetNTimebins(Int_t ntimebins) { + // Reallocate memory if a change in the number of timebins + // is needed (should not be the case for real data) + + if( !CheckInitialized() ) + return; + fNTimeBin = ntimebins; - for( Int_t iadc = 0 ; iadc < fNADC; iadc++ ) { - delete fADCR[iadc]; - delete fADCF[iadc]; - delete fZSM[iadc]; - fADCR[iadc] = new Int_t[fNTimeBin]; - fADCF[iadc] = new Int_t[fNTimeBin]; - fZSM [iadc] = new Int_t[fNTimeBin]; + for( Int_t iAdc = 0 ; iAdc < fgkNADC; iAdc++ ) { + delete fADCR[iAdc]; + delete fADCF[iAdc]; + fADCR[iAdc] = new Int_t[fNTimeBin]; + fADCF[iAdc] = new Int_t[fNTimeBin]; } } Bool_t AliTRDmcmSim::LoadMCM(AliRunLoader* const runloader, Int_t det, Int_t rob, Int_t mcm) { - // loads the ADC data as obtained from the digitsManager for the specified MCM + // loads the ADC data as obtained from the digitsManager for the specified MCM. + // This method is meant for rare execution, e.g. in the visualization. When called + // frequently use SetData(...) instead. Init(det, rob, mcm); @@ -302,35 +240,11 @@ Bool_t AliTRDmcmSim::LoadMCM(AliRunLoader* const runloader, Int_t det, Int_t rob digits->Expand(); if (fNTimeBin != digits->GetNtime()) { + AliWarning(Form("Changing no. of timebins from %i to %i", fNTimeBin, digits->GetNtime())); SetNTimebins(digits->GetNtime()); } - Int_t padrow = fFeeParam->GetPadRowFromMCM(rob, mcm); - Int_t padcol = 0; - for (Int_t ch = 0; ch < fNADC; ch++) { - padcol = GetCol(ch); - fZSM1Dim[ch] = 1; - if (padcol < 0) { - fZSM1Dim[ch] = 0; - for (Int_t tb = 0; tb < fNTimeBin; tb++) { - fADCR[ch][tb] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); - fADCF[ch][tb] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); - } - } - else { - for (Int_t tb = 0; tb < fNTimeBin; tb++) { - if (digits->GetData(padrow,padcol, tb) < 0) { - fZSM1Dim[ch] = 0; - fADCR[ch][tb] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); - fADCF[ch][tb] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); - } - else { - fADCR[ch][tb] = (digits->GetData(padrow, padcol, tb) + fgAddBaseline) << fgkAddDigits; - fADCF[ch][tb] = (digits->GetData(padrow, padcol, tb) + fgAddBaseline) << fgkAddDigits; - } - } - } - } + SetData(digits); } else retval = kFALSE; @@ -356,11 +270,53 @@ void AliTRDmcmSim::NoiseTest(Int_t nsamples, Int_t mean, Int_t sigma, Int_t inpu // same way as in normal simulation. // The functions produces four histograms with the values at the different stages. + if( !CheckInitialized() ) + return; + + TString nameInputGain; + TString nameInputTail; + + switch (inputGain) { + case 0: + nameInputGain = "Noise"; + break; + + case 1: + nameInputGain = "Pedestal"; + break; + + default: + AliError("Undefined input to tail cancellation filter"); + return; + } + + switch (inputTail) { + case 0: + nameInputTail = "Noise"; + break; + + case 1: + nameInputTail = "Pedestal"; + break; + + case 2: + nameInputTail = "Gain"; + break; + + default: + AliError("Undefined input to tail cancellation filter"); + return; + } + TH1F *h = new TH1F("noise", "Gaussian Noise;sample;ADC count", nsamples, 0, nsamples); - TH1F *hfp = new TH1F("pedf", "Noise #rightarrow Pedestal filter;sample;ADC count", nsamples, 0, nsamples); - TH1F *hfg = new TH1F("pedg", "Pedestal #rightarrow Gain;sample;ADC count", nsamples, 0, nsamples); - TH1F *hft = new TH1F("pedt", "Gain #rightarrow Tail;sample;ADC count", nsamples, 0, nsamples); + TH1F *hfp = new TH1F("ped", "Noise #rightarrow Pedestal filter;sample;ADC count", nsamples, 0, nsamples); + TH1F *hfg = new TH1F("gain", + (nameInputGain + "#rightarrow Gain;sample;ADC count").Data(), + nsamples, 0, nsamples); + TH1F *hft = new TH1F("tail", + (nameInputTail + "#rightarrow Tail;sample;ADC count").Data(), + nsamples, 0, nsamples); h->SetStats(kFALSE); hfp->SetStats(kFALSE); hfg->SetStats(kFALSE); @@ -406,15 +362,15 @@ void AliTRDmcmSim::NoiseTest(Int_t nsamples, Int_t mean, Int_t sigma, Int_t inpu hft->Draw(); } -Bool_t AliTRDmcmSim::CheckInitialized() +Bool_t AliTRDmcmSim::CheckInitialized() const { // // Check whether object is initialized // - if( ! fInitialized ) { - AliDebug(2, Form ("AliTRDmcmSim is not initialized but function other than Init() is called.")); - } + if( ! fInitialized ) + AliError(Form ("AliTRDmcmSim is not initialized but function other than Init() is called.")); + return fInitialized; } @@ -427,30 +383,17 @@ void AliTRDmcmSim::Print(Option_t* const option) const // F - prints filtered data // H - prints detected hits // T - prints found tracklets - // The later stages are only useful when the corresponding calculations + // The later stages are only meaningful after the corresponding calculations // have been performed. + if ( !CheckInitialized() ) + return; + printf("MCM %i on ROB %i in detector %i\n", fMcmPos, fRobPos, fDetector); TString opt = option; - if (opt.Contains("R")) { - printf("Raw ADC data (10 bit):\n"); - for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { - for (Int_t iChannel = 0; iChannel < fNADC; iChannel++) { - printf("%5i", fADCR[iChannel][iTimeBin] >> fgkAddDigits); - } - printf("\n"); - } - } - - if (opt.Contains("F")) { - printf("Filtered data (12 bit):\n"); - for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { - for (Int_t iChannel = 0; iChannel < fNADC; iChannel++) { - printf("%5i", fADCF[iChannel][iTimeBin]); - } - printf("\n"); - } + if (opt.Contains("R") || opt.Contains("F")) { + std::cout << *this; } if (opt.Contains("H")) { @@ -480,25 +423,28 @@ void AliTRDmcmSim::Draw(Option_t* const option) // H - plot hits // T - plot tracklets + if( !CheckInitialized() ) + return; + TString opt = option; TH2F *hist = new TH2F("mcmdata", Form("Data of MCM %i on ROB %i in detector %i", \ fMcmPos, fRobPos, fDetector), \ - fNADC, -0.5, fNADC-.5, fNTimeBin, -.5, fNTimeBin-.5); + fgkNADC, -0.5, fgkNADC-.5, fNTimeBin, -.5, fNTimeBin-.5); hist->GetXaxis()->SetTitle("ADC Channel"); hist->GetYaxis()->SetTitle("Timebin"); hist->SetStats(kFALSE); if (opt.Contains("R")) { for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { - for (Int_t iAdc = 0; iAdc < fNADC; iAdc++) { + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) { hist->SetBinContent(iAdc+1, iTimeBin+1, fADCR[iAdc][iTimeBin] >> fgkAddDigits); } } } else { for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { - for (Int_t iAdc = 0; iAdc < fNADC; iAdc++) { + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) { hist->SetBinContent(iAdc+1, iTimeBin+1, fADCF[iAdc][iTimeBin] >> fgkAddDigits); } } @@ -518,13 +464,19 @@ void AliTRDmcmSim::Draw(Option_t* const option) if (opt.Contains("T")) { TLine *trklLines = new TLine[4]; for (Int_t iTrkl = 0; iTrkl < fTrackletArray->GetEntries(); iTrkl++) { - AliTRDpadPlane *pp = fGeo->GetPadPlane(fDetector); AliTRDtrackletMCM *trkl = (AliTRDtrackletMCM*) (*fTrackletArray)[iTrkl]; - Float_t offset = pp->GetColPos(fFeeParam->GetPadColFromADC(fRobPos, fMcmPos, 19)) + 19 * pp->GetWidthIPad(); - trklLines[iTrkl].SetX1((offset - trkl->GetY()) / pp->GetWidthIPad()); - trklLines[iTrkl].SetY1(0); - trklLines[iTrkl].SetX2((offset - (trkl->GetY() + ((Float_t) trkl->GetdY())*140e-4)) / pp->GetWidthIPad()); - trklLines[iTrkl].SetY2(fNTimeBin - 1); + Float_t padWidth = 0.635 + 0.03 * (fDetector % 6); + Float_t offset = padWidth/256. * ((((((fRobPos & 0x1) << 2) + (fMcmPos & 0x3)) * 18) << 8) - ((18*4*2 - 18*2 - 3) << 7)); // revert adding offset in FitTracklet + Int_t ndrift = fTrapConfig->GetDmem(0xc025, fDetector, fRobPos, fMcmPos) >> 5; + Float_t slope = trkl->GetdY() * 140e-4 / ndrift; + + Int_t t0 = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFS); + Int_t t1 = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFE); + + trklLines[iTrkl].SetX1((offset - (trkl->GetY() - slope * t0)) / padWidth); // ??? sign? + trklLines[iTrkl].SetY1(t0); + trklLines[iTrkl].SetX2((offset - (trkl->GetY() - slope * t1)) / padWidth); // ??? sign? + trklLines[iTrkl].SetY2(t1); trklLines[iTrkl].SetLineColor(2); trklLines[iTrkl].SetLineWidth(2); printf("Tracklet %i: y = %f, dy = %f, offset = %f\n", iTrkl, trkl->GetY(), (trkl->GetdY() * 140e-4), offset); @@ -533,7 +485,7 @@ void AliTRDmcmSim::Draw(Option_t* const option) } } -void AliTRDmcmSim::SetData( Int_t iadc, Int_t* const adc ) +void AliTRDmcmSim::SetData( Int_t adc, Int_t* const data ) { // // Store ADC data into array of raw data @@ -541,18 +493,18 @@ void AliTRDmcmSim::SetData( Int_t iadc, Int_t* const adc ) if( !CheckInitialized() ) return; - if( iadc < 0 || iadc >= fNADC ) { - //Log (Form ("Error: iadc is out of range (should be 0 to %d).", fNADC-1)); + if( adc < 0 || adc >= fgkNADC ) { + AliError(Form ("Error: ADC %i is out of range (0 .. %d).", adc, fgkNADC-1)); return; } for( Int_t it = 0 ; it < fNTimeBin ; it++ ) { - fADCR[iadc][it] = (Int_t) (adc[it]) << fgkAddDigits; - fADCF[iadc][it] = (Int_t) (adc[it]) << fgkAddDigits; + fADCR[adc][it] = (Int_t) (data[it]) << fgkAddDigits; + fADCF[adc][it] = (Int_t) (data[it]) << fgkAddDigits; } } -void AliTRDmcmSim::SetData( Int_t iadc, Int_t it, Int_t adc ) +void AliTRDmcmSim::SetData( Int_t adc, Int_t it, Int_t data ) { // // Store ADC data into array of raw data @@ -560,85 +512,108 @@ void AliTRDmcmSim::SetData( Int_t iadc, Int_t it, Int_t adc ) if( !CheckInitialized() ) return; - if( iadc < 0 || iadc >= fNADC ) { - //Log (Form ("Error: iadc is out of range (should be 0 to %d).", fNADC-1)); + if( adc < 0 || adc >= fgkNADC ) { + AliError(Form ("Error: ADC %i is out of range (0 .. %d).", adc, fgkNADC-1)); return; } - fADCR[iadc][it] = adc << fgkAddDigits; - fADCF[iadc][it] = adc << fgkAddDigits; + fADCR[adc][it] = data << fgkAddDigits; + fADCF[adc][it] = data << fgkAddDigits; } void AliTRDmcmSim::SetData(AliTRDarrayADC* const adcArray, AliTRDdigitsManager *digitsManager) { // Set the ADC data from an AliTRDarrayADC - if (!fInitialized) { - AliError("Called uninitialized! Nothing done!"); + if( !CheckInitialized() ) return; - } fDigitsManager = digitsManager; + if (fDigitsManager) { + for (Int_t iDict = 0; iDict < 3; iDict++) { + AliTRDarrayDictionary *newDict = (AliTRDarrayDictionary*) fDigitsManager->GetDictionary(fDetector, iDict); + if (fDict[iDict] != 0x0 && newDict != 0x0) { + + if (fDict[iDict] == newDict) + continue; - if (fNTimeBin != adcArray->GetNtime()) { - SetNTimebins(adcArray->GetNtime()); + fDict[iDict] = newDict; + + if (fDict[iDict]->GetDim() == 0) { + AliError(Form("Dictionary %i of det. %i has dim. 0", fDetector, iDict)); + continue; + } + fDict[iDict]->Expand(); + } + else { + fDict[iDict] = newDict; + if (fDict[iDict]) + fDict[iDict]->Expand(); + } + } } - Int_t offset = (fMcmPos % 4) * 21 + (fRobPos % 2) * 84; - -// Int_t firstAdc = 0; -// Int_t lastAdc = fNADC-1; -// -// while (GetCol(firstAdc) < 0) { -// for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { -// fADCR[firstAdc][iTimeBin] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); -// fADCF[firstAdc][iTimeBin] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); -// } -// firstAdc++; -// } -// -// while (GetCol(lastAdc) < 0) { -// for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { -// fADCR[lastAdc][iTimeBin] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); -// fADCF[lastAdc][iTimeBin] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); -// } -// lastAdc--; -// } + if (fNTimeBin != adcArray->GetNtime()) + SetNTimebins(adcArray->GetNtime()); + + Int_t offset = (fMcmPos % 4 + 1) * 21 + (fRobPos % 2) * 84 - 1; for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { - for (Int_t iAdc = 0; iAdc < fNADC; iAdc++) { - Int_t value = adcArray->GetDataByAdcCol(GetRow(), 20-iAdc + offset, iTimeBin); - if (value < 0 || (20-iAdc + offset < 1) || (20-iAdc + offset > 165)) { - fADCR[iAdc][iTimeBin] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) { + Int_t value = adcArray->GetDataByAdcCol(GetRow(), offset - iAdc, iTimeBin); + if (value < 0 || (offset - iAdc < 1) || (offset - iAdc > 165)) { + fADCR[iAdc][iTimeBin] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFPNP) + (fgAddBaseline << fgkAddDigits); fADCF[iAdc][iTimeBin] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); } else { - fADCR[iAdc][iTimeBin] = (adcArray->GetData(GetRow(), GetCol(iAdc), iTimeBin) + fgAddBaseline) << fgkAddDigits; - fADCF[iAdc][iTimeBin] = (adcArray->GetData(GetRow(), GetCol(iAdc), iTimeBin) + fgAddBaseline) << fgkAddDigits; + fZSMap[iAdc] = 0; + fADCR[iAdc][iTimeBin] = (value << fgkAddDigits) + (fgAddBaseline << fgkAddDigits); + fADCF[iAdc][iTimeBin] = (value << fgkAddDigits) + (fgAddBaseline << fgkAddDigits); } } } } -void AliTRDmcmSim::SetDataPedestal( Int_t iadc ) +void AliTRDmcmSim::SetDataPedestal( Int_t adc ) { // // Store ADC data into array of raw data // - if( !CheckInitialized() ) return; + if( !CheckInitialized() ) + return; - if( iadc < 0 || iadc >= fNADC ) { + if( adc < 0 || adc >= fgkNADC ) { return; } for( Int_t it = 0 ; it < fNTimeBin ; it++ ) { - fADCR[iadc][it] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); - fADCF[iadc][it] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); + fADCR[adc][it] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFPNP) + (fgAddBaseline << fgkAddDigits); + fADCF[adc][it] = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kTPFP) + (fgAddBaseline << fgkAddDigits); } } -Int_t AliTRDmcmSim::GetCol( Int_t iadc ) +Bool_t AliTRDmcmSim::GetHit(Int_t index, Int_t &channel, Int_t &timebin, Int_t &qtot, Int_t &ypos, Float_t &y, Int_t &label) const +{ + // retrieve the MC hit information (not available in TRAP hardware) + + if (index < 0 || index >= fNHits) + return kFALSE; + + channel = fHits[index].fChannel; + timebin = fHits[index].fTimebin; + qtot = fHits[index].fQtot; + ypos = fHits[index].fYpos; + y = (Float_t) ((((((fRobPos & 0x1) << 2) + (fMcmPos & 0x3)) * 18) << 8) - ((18*4*2 - 18*2 - 1) << 7) - + (channel << 8) - ypos) + * (0.635 + 0.03 * (fDetector % 6)) + / 256.0; + label = fHits[index].fLabel; + + return kTRUE; +} + +Int_t AliTRDmcmSim::GetCol( Int_t adc ) { // // Return column id of the pad for the given ADC channel @@ -647,14 +622,14 @@ Int_t AliTRDmcmSim::GetCol( Int_t iadc ) if( !CheckInitialized() ) return -1; - Int_t col = fFeeParam->GetPadColFromADC(fRobPos, fMcmPos, iadc); + Int_t col = fFeeParam->GetPadColFromADC(fRobPos, fMcmPos, adc); if (col < 0 || col >= fFeeParam->GetNcol()) return -1; else return col; } -Int_t AliTRDmcmSim::ProduceRawStream( UInt_t *buf, Int_t maxSize, UInt_t iEv) +Int_t AliTRDmcmSim::ProduceRawStream( UInt_t *buf, Int_t bufSize, UInt_t iEv) const { // // Produce raw data stream from this MCM and put in buf @@ -662,6 +637,9 @@ Int_t AliTRDmcmSim::ProduceRawStream( UInt_t *buf, Int_t maxSize, UInt_t iEv) // with -1 * number of overflowed words // + if( !CheckInitialized() ) + return 0; + UInt_t x; Int_t nw = 0; // Number of written words Int_t of = 0; // Number of overflowed words @@ -669,20 +647,19 @@ Int_t AliTRDmcmSim::ProduceRawStream( UInt_t *buf, Int_t maxSize, UInt_t iEv) Int_t **adc; Int_t nActiveADC = 0; // number of activated ADC bits in a word - if( !CheckInitialized() ) return 0; + if( !CheckInitialized() ) + return 0; - if( fFeeParam->GetRAWstoreRaw() ) { + if (fTrapConfig->GetTrapReg(AliTRDtrapConfig::kEBSF) != 0) // store unfiltered data adc = fADCR; - } else { + else adc = fADCF; - } - + // Produce MCM header x = (1<<31) | (fRobPos << 28) | (fMcmPos << 24) | ((iEv % 0x100000) << 4) | 0xC; - if (nw < maxSize) { + if (nw < bufSize) { buf[nw++] = x; - //printf("\nMCM header: %X ",x); } else { of++; @@ -692,18 +669,16 @@ Int_t AliTRDmcmSim::ProduceRawStream( UInt_t *buf, Int_t maxSize, UInt_t iEv) // n : unused , c : ADC count, m : selected ADCs if( rawVer >= 3 ) { x = 0; - for( Int_t iAdc = 0 ; iAdc < fNADC ; iAdc++ ) { - if( fZSM1Dim[iAdc] == 0 ) { // 0 means not suppressed + for( Int_t iAdc = 0 ; iAdc < fgkNADC ; iAdc++ ) { + if( ~fZSMap[iAdc] != 0 ) { // 0 means not suppressed x = x | (1 << (iAdc+4) ); // last 4 digit reserved for 1100=0xc nActiveADC++; // number of 1 in mmm....m } } x = x | (1 << 30) | ( ( 0x3FFFFFFC ) & (~(nActiveADC) << 25) ) | 0xC; // nn = 01, ccccc are inverted, 0xc=1100 - //printf("nActiveADC=%d=%08X, inverted=%X ",nActiveADC,nActiveADC,x ); - if (nw < maxSize) { + if (nw < bufSize) { buf[nw++] = x; - //printf("ADC mask: %X nMask=%d ADC data: ",x,nActiveADC); } else { of++; @@ -716,16 +691,15 @@ Int_t AliTRDmcmSim::ProduceRawStream( UInt_t *buf, Int_t maxSize, UInt_t iEv) UInt_t aa=0, a1=0, a2=0, a3=0; for (Int_t iAdc = 0; iAdc < 21; iAdc++ ) { - if( rawVer>= 3 && fZSM1Dim[iAdc] != 0 ) continue; // Zero Suppression, 0 means not suppressed + if( rawVer>= 3 && ~fZSMap[iAdc] == 0 ) continue; // Zero Suppression, 0 means not suppressed aa = !(iAdc & 1) + 2; for (Int_t iT = 0; iT < fNTimeBin; iT+=3 ) { a1 = ((iT ) < fNTimeBin ) ? adc[iAdc][iT ] >> fgkAddDigits : 0; a2 = ((iT + 1) < fNTimeBin ) ? adc[iAdc][iT+1] >> fgkAddDigits : 0; a3 = ((iT + 2) < fNTimeBin ) ? adc[iAdc][iT+2] >> fgkAddDigits : 0; x = (a3 << 22) | (a2 << 12) | (a1 << 2) | aa; - if (nw < maxSize) { + if (nw < bufSize) { buf[nw++] = x; - //printf("%08X ",x); } else { of++; @@ -736,7 +710,7 @@ Int_t AliTRDmcmSim::ProduceRawStream( UInt_t *buf, Int_t maxSize, UInt_t iEv) if( of != 0 ) return -of; else return nw; } -Int_t AliTRDmcmSim::ProduceTrackletStream( UInt_t *buf, Int_t maxSize ) +Int_t AliTRDmcmSim::ProduceTrackletStream( UInt_t *buf, Int_t bufSize ) { // // Produce tracklet data stream from this MCM and put in buf @@ -744,16 +718,17 @@ Int_t AliTRDmcmSim::ProduceTrackletStream( UInt_t *buf, Int_t maxSize ) // with -1 * number of overflowed words // + if( !CheckInitialized() ) + return 0; + Int_t nw = 0; // Number of written words Int_t of = 0; // Number of overflowed words - if( !CheckInitialized() ) return 0; - // Produce tracklet data. A maximum of four 32 Bit words will be written per MCM // fMCMT is filled continuously until no more tracklet words available for (Int_t iTracklet = 0; iTracklet < fTrackletArray->GetEntriesFast(); iTracklet++) { - if (nw < maxSize) + if (nw < bufSize) buf[nw++] = ((AliTRDtrackletMCM*) (*fTrackletArray)[iTracklet])->GetTrackletWord(); else of++; @@ -772,10 +747,8 @@ void AliTRDmcmSim::Filter() // sequentially for parameter tuning. // - if( !CheckInitialized() ) { - AliError("got called before initialization! Nothing done!"); + if( !CheckInitialized() ) return; - } // Apply filters sequentially. Bypass is handled by filters // since counters and internal registers may be updated even @@ -790,17 +763,15 @@ void AliTRDmcmSim::Filter() // Crosstalk filter not implemented. } -void AliTRDmcmSim::FilterPedestalInit() +void AliTRDmcmSim::FilterPedestalInit(Int_t baseline) { // Initializes the pedestal filter assuming that the input has // been constant for a long time (compared to the time constant). -// UShort_t fpnp = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFPNP); // 0..511 -> 0..127.75, pedestal at the output UShort_t fptc = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFPTC); // 0..3, 0 - fastest, 3 - slowest - UShort_t shifts[4] = {11, 14, 17, 21}; //??? where to take shifts from? - for (Int_t iAdc = 0; iAdc < fNADC; iAdc++) - fPedAcc[iAdc] = (fSimParam->GetADCbaseline() << 2) * (1<GetTrapReg(AliTRDtrapConfig::kFPNP); // 0..511 -> 0..127.75, pedestal at the output UShort_t fptc = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFPTC); // 0..3, 0 - fastest, 3 - slowest - UShort_t fpby = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFPBY); // 0..1 the bypass, active low - UShort_t shifts[4] = {11, 14, 17, 21}; //??? where to come from + UShort_t fpby = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFPBY); // 0..1 bypass, active low UShort_t accumulatorShifted; Int_t correction; @@ -820,16 +790,16 @@ UShort_t AliTRDmcmSim::FilterPedestalNextSample(Int_t adc, Int_t timebin, UShort inpAdd = value + fpnp; - if (fpby == 0) //??? before or after update of accumulator - return value; - - accumulatorShifted = (fPedAcc[adc] >> shifts[fptc]) & 0x3FF; // 10 bits + accumulatorShifted = (fPedAcc[adc] >> fgkFPshifts[fptc]) & 0x3FF; // 10 bits if (timebin == 0) // the accumulator is disabled in the drift time { correction = (value & 0x3FF) - accumulatorShifted; fPedAcc[adc] = (fPedAcc[adc] + correction) & 0x7FFFFFFF; // 31 bits } + if (fpby == 0) + return value; + if (inpAdd <= accumulatorShifted) return 0; else @@ -854,7 +824,7 @@ void AliTRDmcmSim::FilterPedestal() // the input has been stable for a sufficiently long time. for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { - for (Int_t iAdc = 0; iAdc < fNADC; iAdc++) { + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) { fADCF[iAdc][iTimeBin] = FilterPedestalNextSample(iAdc, iTimeBin, fADCR[iAdc][iTimeBin]); } } @@ -865,7 +835,7 @@ void AliTRDmcmSim::FilterGainInit() // Initializes the gain filter. In this case, only threshold // counters are reset. - for (Int_t iAdc = 0; iAdc < fNADC; iAdc++) { + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) { // these are counters which in hardware continue // until maximum or reset fGainCounterA[iAdc] = 0; @@ -886,33 +856,35 @@ UShort_t AliTRDmcmSim::FilterGainNextSample(Int_t adc, UShort_t value) UShort_t fgta = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFGTA); // 20; UShort_t fgtb = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFGTB); // 2060; - UInt_t tmp; + UInt_t corr; // corrected value value &= 0xFFF; - tmp = (value * fgf) >> 11; - if (tmp > 0xFFF) tmp = 0xFFF; - - if (fgby == 1) - value = AddUintClipping(tmp, fga, 12); + corr = (value * fgf) >> 11; + corr = corr > 0xfff ? 0xfff : corr; + corr = AddUintClipping(corr, fga, 12); // Update threshold counters // not really useful as they are cleared with every new event - if ((fGainCounterA[adc] == 0x3FFFFFF) || (fGainCounterB[adc] == 0x3FFFFFF)) + if (!((fGainCounterA[adc] == 0x3FFFFFF) || (fGainCounterB[adc] == 0x3FFFFFF))) + // stop when full { - if (value >= fgtb) + if (corr >= fgtb) fGainCounterB[adc]++; - else if (value >= fgta) + else if (corr >= fgta) fGainCounterA[adc]++; } - return value; + if (fgby == 1) + return corr; + else + return value; } void AliTRDmcmSim::FilterGain() { // Read data from fADCF and apply gain filter. - for (Int_t iAdc = 0; iAdc < fNADC; iAdc++) { + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) { for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { fADCF[iAdc][iTimeBin] = FilterGainNextSample(iAdc, fADCF[iAdc][iTimeBin]); } @@ -940,13 +912,22 @@ void AliTRDmcmSim::FilterTailInit(Int_t baseline) Float_t kt, ql, qs; UShort_t aout; + + if (baseline < 0) + baseline = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFPNP); - kt = kdc * baseline; - aout = baseline - (UShort_t) kt; ql = lambdaL * (1 - lambdaS) * alphaL; qs = lambdaS * (1 - lambdaL) * (1 - alphaL); - for (Int_t iAdc = 0; iAdc < fNADC; iAdc++) { + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) { + Int_t value = baseline & 0xFFF; + Int_t corr = (value * fTrapConfig->GetTrapReg(AliTRDtrapConfig::TrapReg_t(AliTRDtrapConfig::kFGF0 + iAdc))) >> 11; + corr = corr > 0xfff ? 0xfff : corr; + corr = AddUintClipping(corr, fTrapConfig->GetTrapReg(AliTRDtrapConfig::TrapReg_t(AliTRDtrapConfig::kFGA0 + iAdc)), 12); + + kt = kdc * baseline; + aout = baseline - (UShort_t) kt; + fTailAmplLong[iAdc] = (UShort_t) (aout * ql / (ql + qs)); fTailAmplShort[iAdc] = (UShort_t) (aout * qs / (ql + qs)); } @@ -959,62 +940,53 @@ UShort_t AliTRDmcmSim::FilterTailNextSample(Int_t adc, UShort_t value) // history of the filter. // exponents and weight calculated from configuration - UShort_t alphaLong = 0x3ff & fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFTAL); // the weight of the long component - UShort_t lambdaLong = (1 << 10) | (1 << 9) | (fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFTLL) & 0x1FF); // the multiplier - UShort_t lambdaShort = (0 << 10) | (1 << 9) | (fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFTLS) & 0x1FF); // the multiplier - - Float_t lambdaL = lambdaLong * 1.0 / (1 << 11); - Float_t lambdaS = lambdaShort * 1.0 / (1 << 11); - Float_t alphaL = alphaLong * 1.0 / (1 << 11); - Float_t qup, qdn; - qup = (1 - lambdaL) * (1 - lambdaS); - qdn = 1 - lambdaS * alphaL - lambdaL * (1 - alphaL); -// Float_t kdc = qup/qdn; + UShort_t alphaLong = 0x3ff & fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFTAL); // the weight of the long component + UShort_t lambdaLong = (1 << 10) | (1 << 9) | (fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFTLL) & 0x1FF); // the multiplier of the long component + UShort_t lambdaShort = (0 << 10) | (1 << 9) | (fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFTLS) & 0x1FF); // the multiplier of the short component - UInt_t aDiff; - UInt_t alInpv; + // intermediate signals + UInt_t aDiff; + UInt_t alInpv; UShort_t aQ; - UInt_t tmp; + UInt_t tmp; UShort_t inpVolt = value & 0xFFF; // 12 bits + // add the present generator outputs + aQ = AddUintClipping(fTailAmplLong[adc], fTailAmplShort[adc], 12); + + // calculate the difference between the input and the generated signal + if (inpVolt > aQ) + aDiff = inpVolt - aQ; + else + aDiff = 0; + + // the inputs to the two generators, weighted + alInpv = (aDiff * alphaLong) >> 11; + + // the new values of the registers, used next time + // long component + tmp = AddUintClipping(fTailAmplLong[adc], alInpv, 12); + tmp = (tmp * lambdaLong) >> 11; + fTailAmplLong[adc] = tmp & 0xFFF; + // short component + tmp = AddUintClipping(fTailAmplShort[adc], aDiff - alInpv, 12); + tmp = (tmp * lambdaShort) >> 11; + fTailAmplShort[adc] = tmp & 0xFFF; + + // the output of the filter if (fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFTBY) == 0) // bypass mode, active low return value; else - { - // add the present generator outputs - aQ = AddUintClipping(fTailAmplLong[adc], fTailAmplShort[adc], 12); - - // calculate the difference between the input the generated signal - if (inpVolt > aQ) - aDiff = inpVolt - aQ; - else - aDiff = 0; - - // the inputs to the two generators, weighted - alInpv = (aDiff * alphaLong) >> 11; - - // the new values of the registers, used next time - // long component - tmp = AddUintClipping(fTailAmplLong[adc], alInpv, 12); - tmp = (tmp * lambdaLong) >> 11; - fTailAmplLong[adc] = tmp & 0xFFF; - // short component - tmp = AddUintClipping(fTailAmplShort[adc], aDiff - alInpv, 12); - tmp = (tmp * lambdaShort) >> 11; - fTailAmplShort[adc] = tmp & 0xFFF; - - // the output of the filter return aDiff; - } } void AliTRDmcmSim::FilterTail() { - // Apply tail filter + // Apply tail cancellation filter to all data. for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { - for (Int_t iAdc = 0; iAdc < fNADC; iAdc++) { + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) { fADCF[iAdc][iTimeBin] = FilterTailNextSample(iAdc, fADCF[iAdc][iTimeBin]); } } @@ -1024,126 +996,88 @@ void AliTRDmcmSim::ZSMapping() { // // Zero Suppression Mapping implemented in TRAP chip + // only implemented for up to 30 timebins // // See detail TRAP manual "Data Indication" section: // http://www.kip.uni-heidelberg.de/ti/TRD/doc/trap/TRAP-UserManual.pdf // - //??? values should come from TRAPconfig - Int_t eBIS = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kEBIS); // TRAP default = 0x4 (Tis=4) - Int_t eBIT = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kEBIT); // TRAP default = 0x28 (Tit=40) - Int_t eBIL = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kEBIL); // TRAP default = 0xf0 - // (lookup table accept (I2,I1,I0)=(111) - // or (110) or (101) or (100)) - Int_t eBIN = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kEBIN); // TRAP default = 1 (no neighbor sensitivity) - Int_t ep = 0; // fTrapConfig->GetTrapReg(AliTRDtrapConfig::kFPNP); //??? really subtracted here + if( !CheckInitialized() ) + return; + + Int_t eBIS = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kEBIS); + Int_t eBIT = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kEBIT); + Int_t eBIL = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kEBIL); + Int_t eBIN = fTrapConfig->GetTrapReg(AliTRDtrapConfig::kEBIN); Int_t **adc = fADCF; - if( !CheckInitialized() ) { - AliError("got called uninitialized! Nothing done!"); - return; - } + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) + fZSMap[iAdc] = -1; for( Int_t it = 0 ; it < fNTimeBin ; it++ ) { - for( Int_t iadc = 1 ; iadc < fNADC-1; iadc++ ) { - - // Get ADC data currently in filter buffer - Int_t ap = adc[iadc-1][it] - ep; // previous - Int_t ac = adc[iadc ][it] - ep; // current - Int_t an = adc[iadc+1][it] - ep; // next - - // evaluate three conditions - Int_t i0 = ( ac >= ap && ac >= an ) ? 0 : 1; // peak center detection - Int_t i1 = ( ap + ac + an > eBIT ) ? 0 : 1; // cluster - Int_t i2 = ( ac > eBIS ) ? 0 : 1; // absolute large peak - - Int_t i = i2 * 4 + i1 * 2 + i0; // Bit position in lookup table - Int_t d = (eBIL >> i) & 1; // Looking up (here d=0 means true - // and d=1 means false according to TRAP manual) - - fZSM[iadc][it] &= d; - if( eBIN == 0 ) { // turn on neighboring ADCs - fZSM[iadc-1][it] &= d; - fZSM[iadc+1][it] &= d; - } + Int_t iAdc; // current ADC channel + Int_t ap; + Int_t ac; + Int_t an; + Int_t mask; + Int_t supp; // suppression of the current channel (low active) + + // ----- first channel ----- + iAdc = 0; + + ap = 0; // previous + ac = adc[iAdc ][it]; // current + an = adc[iAdc+1][it]; // next + + mask = ( ac >= ap && ac >= an ) ? 0 : 0x1; // peak center detection + mask += ( ap + ac + an > eBIT ) ? 0 : 0x2; // cluster + mask += ( ac > eBIS ) ? 0 : 0x4; // absolute large peak + + supp = (eBIL >> mask) & 1; + + fZSMap[iAdc] &= ~((1-supp) << it); + if( eBIN == 0 ) { // neighbour sensitivity + fZSMap[iAdc+1] &= ~((1-supp) << it); } - } - - // do 1 dim projection - for( Int_t iadc = 0 ; iadc < fNADC; iadc++ ) { - for( Int_t it = 0 ; it < fNTimeBin ; it++ ) { - fZSM1Dim[iadc] &= fZSM[iadc][it]; + + // ----- last channel ----- + iAdc = fgkNADC - 1; + + ap = adc[iAdc-1][it]; // previous + ac = adc[iAdc ][it]; // current + an = 0; // next + + mask = ( ac >= ap && ac >= an ) ? 0 : 0x1; // peak center detection + mask += ( ap + ac + an > eBIT ) ? 0 : 0x2; // cluster + mask += ( ac > eBIS ) ? 0 : 0x4; // absolute large peak + + supp = (eBIL >> mask) & 1; + + fZSMap[iAdc] &= ~((1-supp) << it); + if( eBIN == 0 ) { // neighbour sensitivity + fZSMap[iAdc-1] &= ~((1-supp) << it); } - } -} - -void AliTRDmcmSim::DumpData( const char * const f, const char * const target ) -{ - // - // Dump data stored (for debugging). - // target should contain one or multiple of the following characters - // R for raw data - // F for filtered data - // Z for zero suppression map - // S Raw dat astream - // other characters are simply ignored - // - - UInt_t tempbuf[1024]; - - if( !CheckInitialized() ) return; - - std::ofstream of( f, std::ios::out | std::ios::app ); - of << Form("AliTRDmcmSim::DumpData det=%03d sm=%02d stack=%d layer=%d rob=%d mcm=%02d\n", - fDetector, fGeo->GetSector(fDetector), fGeo->GetStack(fDetector), - fGeo->GetSector(fDetector), fRobPos, fMcmPos ); - - for( Int_t t=0 ; target[t] != 0 ; t++ ) { - switch( target[t] ) { - case 'R' : - case 'r' : - of << Form("fADCR (raw ADC data)\n"); - for( Int_t iadc = 0 ; iadc < fNADC; iadc++ ) { - of << Form(" ADC %02d: ", iadc); - for( Int_t it = 0 ; it < fNTimeBin ; it++ ) { - of << Form("% 4d", fADCR[iadc][it]); - } - of << Form("\n"); - } - break; - case 'F' : - case 'f' : - of << Form("fADCF (filtered ADC data)\n"); - for( Int_t iadc = 0 ; iadc < fNADC; iadc++ ) { - of << Form(" ADC %02d: ", iadc); - for( Int_t it = 0 ; it < fNTimeBin ; it++ ) { - of << Form("% 4d", fADCF[iadc][it]); - } - of << Form("\n"); - } - break; - case 'Z' : - case 'z' : - of << Form("fZSM and fZSM1Dim (Zero Suppression Map)\n"); - for( Int_t iadc = 0 ; iadc < fNADC; iadc++ ) { - of << Form(" ADC %02d: ", iadc); - if( fZSM1Dim[iadc] == 0 ) { of << " R " ; } else { of << " . "; } // R:read .:suppressed - for( Int_t it = 0 ; it < fNTimeBin ; it++ ) { - if( fZSM[iadc][it] == 0 ) { of << " R"; } else { of << " ."; } // R:read .:suppressed - } - of << Form("\n"); - } - break; - case 'S' : - case 's' : - Int_t s = ProduceRawStream( tempbuf, 1024 ); - of << Form("Stream for Raw Simulation size=%d rawver=%d\n", s, fFeeParam->GetRAWversion()); - of << Form(" address data\n"); - for( Int_t i = 0 ; i < s ; i++ ) { - of << Form(" %04x %08x\n", i, tempbuf[i]); + + // ----- middle channels ----- + for( iAdc = 1 ; iAdc < fgkNADC-1; iAdc++ ) { + ap = adc[iAdc-1][it]; // previous + ac = adc[iAdc ][it]; // current + an = adc[iAdc+1][it]; // next + + mask = ( ac >= ap && ac >= an ) ? 0 : 0x1; // peak center detection + mask += ( ap + ac + an > eBIT ) ? 0 : 0x2; // cluster + mask += ( ac > eBIS ) ? 0 : 0x4; // absolute large peak + + supp = (eBIL >> mask) & 1; + + fZSMap[iAdc] &= ~((1-supp) << it); + if( eBIN == 0 ) { // neighbour sensitivity + fZSMap[iAdc-1] &= ~((1-supp) << it); + fZSMap[iAdc+1] &= ~((1-supp) << it); } } + } } @@ -1189,14 +1123,6 @@ void AliTRDmcmSim::CalcFitreg() // Requires 12-bit data from fADCF which means Filter() // has to be called before even if all filters are bypassed. - //??? - // TRAP parameters: - const UShort_t lutPos[128] = { // move later to some other file - 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, - 16, 16, 16, 17, 17, 18, 18, 19, 19, 19, 20, 20, 20, 21, 21, 22, 22, 22, 23, 23, 23, 24, 24, 24, 24, 25, 25, 25, 26, 26, 26, 26, - 27, 27, 27, 27, 27, 27, 27, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 27, 27, 27, 27, 26, - 26, 26, 26, 25, 25, 25, 24, 24, 23, 23, 22, 22, 21, 21, 20, 20, 19, 18, 18, 17, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 7}; - //??? to be clarified: UInt_t adcMask = 0xffffffff; @@ -1216,7 +1142,7 @@ void AliTRDmcmSim::CalcFitreg() // reset the fit registers fNHits = 0; - for (adcch = 0; adcch < fNADC-2; adcch++) // due to border channels + for (adcch = 0; adcch < fgkNADC-2; adcch++) // due to border channels { fFitReg[adcch].fNhits = 0; fFitReg[adcch].fQ0 = 0; @@ -1232,7 +1158,7 @@ void AliTRDmcmSim::CalcFitreg() { // first find the hit candidates and store the total cluster charge in qTotal array // in case of not hit store 0 there. - for (adcch = 0; adcch < fNADC-2; adcch++) { + for (adcch = 0; adcch < fgkNADC-2; adcch++) { if ( ( (adcMask >> adcch) & 7) == 7) //??? all 3 channels are present in case of ZS { adcLeft = fADCF[adcch ][timebin]; @@ -1255,7 +1181,8 @@ void AliTRDmcmSim::CalcFitreg() } else qTotal[adcch] = 0; //jkl - AliDebug(10,Form("ch %2d qTotal %5d",adcch, qTotal[adcch])); + if (qTotal[adcch] != 0) + AliDebug(10,Form("ch %2d qTotal %5d",adcch, qTotal[adcch])); } fromLeft = -1; @@ -1354,8 +1281,8 @@ void AliTRDmcmSim::CalcFitreg() continue; ypos = 128*(adcLeft - adcRight) / adcCentral; if (ypos < 0) ypos = -ypos; - // make the correction using the LUT - ypos = ypos + lutPos[ypos & 0x7F]; + // make the correction using the position LUT + ypos = ypos + fTrapConfig->GetTrapReg((AliTRDtrapConfig::TrapReg_t) (AliTRDtrapConfig::kTPL00 + (ypos & 0x7F))); if (adcLeft > adcRight) ypos = -ypos; // label calculation @@ -1372,20 +1299,12 @@ void AliTRDmcmSim::CalcFitreg() padcol[2] = fFeeParam->GetPadColFromADC(fRobPos, fMcmPos, adcch+2); Int_t padrow = fFeeParam->GetPadRowFromMCM(fRobPos, fMcmPos); for (Int_t iDict = 0; iDict < 3; iDict++) { - if (!fDigitsManager->UsesDictionaries() || fDigitsManager->GetDictionary(fDetector, iDict) == 0) { - AliError("Cannot get dictionary"); + if (!fDict[iDict]) continue; - } - AliTRDarrayDictionary *dict = (AliTRDarrayDictionary*) fDigitsManager->GetDictionary(fDetector, iDict); - if (dict->GetDim() == 0) { - AliError(Form("Dictionary %i of det. %i has dim. 0", fDetector, iDict)); - continue; - } - dict->Expand(); for (Int_t iPad = 0; iPad < 3; iPad++) { if (padcol[iPad] < 0) continue; - Int_t currLabel = dict->GetData(padrow, padcol[iPad], timebin); //fDigitsManager->GetTrack(iDict, padrow, padcol, timebin, fDetector); + Int_t currLabel = fDict[iDict]->GetData(padrow, padcol[iPad], timebin); //fDigitsManager->GetTrack(iDict, padrow, padcol, timebin, fDetector); AliDebug(10, Form("Read label: %4i for det: %3i, row: %i, col: %i, tb: %i\n", currLabel, fDetector, padrow, padcol[iPad], timebin)); for (Int_t iLabel = 0; iLabel < nLabels; iLabel++) { if (currLabel == label[iLabel]) { @@ -1412,6 +1331,19 @@ void AliTRDmcmSim::CalcFitreg() } } } + + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) { + if (fFitReg[iAdc].fNhits != 0) { + AliDebug(2, Form("fitreg[%i]: nHits = %i, sumX = %i, sumY = %i, sumX2 = %i, sumY2 = %i, sumXY = %i", iAdc, + fFitReg[iAdc].fNhits, + fFitReg[iAdc].fSumX, + fFitReg[iAdc].fSumY, + fFitReg[iAdc].fSumX2, + fFitReg[iAdc].fSumY2, + fFitReg[iAdc].fSumXY + )); + } + } } void AliTRDmcmSim::TrackletSelection() @@ -1503,7 +1435,6 @@ void AliTRDmcmSim::FitTracklet() Int_t ndriftDp = 5; // decimal places for drift time Long64_t shift = ((Long64_t) 1 << 32); - // calculated in fitred.asm Int_t padrow = ((fRobPos >> 1) << 2) | (fMcmPos >> 2); Int_t yoffs = (((((fRobPos & 0x1) << 2) + (fMcmPos & 0x3)) * 18) << 8) - @@ -1512,37 +1443,9 @@ void AliTRDmcmSim::FitTracklet() Int_t layer = fDetector % 6; UInt_t scaleY = (UInt_t) ((0.635 + 0.03 * layer)/(256.0 * 160.0e-4) * shift); UInt_t scaleD = (UInt_t) ((0.635 + 0.03 * layer)/(256.0 * 140.0e-4) * shift); - // previously taken from geometry: - // UInt_t scaleYold = (UInt_t) (shift * (pp->GetWidthIPad() / (256 * 160e-4))); - // UInt_t scaleDold = (UInt_t) (shift * (pp->GetWidthIPad() / (256 * 140e-4))); - - - // should come from trapConfig (DMEM) - AliTRDpadPlane *pp = fGeo->GetPadPlane(fDetector); - Float_t scaleSlope = (256 / pp->GetWidthIPad()) * (1 << decPlaces); // only used for calculation of corrections and cut - Int_t ndrift = 20 << ndriftDp; //??? value in simulation? - Int_t deflCorr = (Int_t) (TMath::Tan(fCommonParam->GetOmegaTau(fCal->GetVdriftAverage(fDetector))) * fGeo->CdrHght() * scaleSlope); // -370; - Int_t tiltCorr = (Int_t) (pp->GetRowPos(padrow) / fGeo->GetTime0(fDetector % 6) * fGeo->CdrHght() * scaleSlope * - TMath::Tan(pp->GetTiltingAngle() / 180. * TMath::Pi())); -// printf("vdrift av.: %f\n", fCal->GetVdriftAverage(fDetector)); -// printf("chamber height: %f\n", fGeo->CdrHght()); -// printf("omega tau: %f\n", fCommonParam->GetOmegaTau(fCal->GetVdriftAverage(fDetector))); -// printf("deflection correction: %i\n", deflCorr); - Float_t ptcut = 2.3; - AliMagF* fld = (AliMagF *) TGeoGlobalMagField::Instance()->GetField(); - Double_t bz = 0; - if (fld) { - bz = 0.1 * fld->SolenoidField(); // kGauss -> Tesla - } -// printf("Bz: %f\n", bz); - Float_t x0 = fGeo->GetTime0(fDetector % 6); - Float_t y0 = pp->GetColPos(fFeeParam->GetPadColFromADC(fRobPos, fMcmPos, 10)); - Float_t alphaMax = TMath::ASin( (TMath::Sqrt(TMath::Power(x0/100., 2) + TMath::Power(y0/100., 2)) * - 0.3 * TMath::Abs(bz) ) / (2 * ptcut)); -// printf("alpha max: %f\n", alphaMax * 180/TMath::Pi()); - Int_t minslope = -1 * (Int_t) (fGeo->CdrHght() * TMath::Tan(TMath::ATan(y0/x0) + alphaMax) / 140.e-4); - Int_t maxslope = -1 * (Int_t) (fGeo->CdrHght() * TMath::Tan(TMath::ATan(y0/x0) - alphaMax) / 140.e-4); + Int_t deflCorr = fTrapConfig->GetDmem(0xc022, fDetector, fRobPos, fMcmPos); + Int_t ndrift = fTrapConfig->GetDmem(0xc025, fDetector, fRobPos, fMcmPos); // local variables for calculation Long64_t mult, temp, denom; //??? @@ -1586,7 +1489,6 @@ void AliTRDmcmSim::FitTracklet() sumXY = fit0->fSumXY + fit1->fSumXY + 256*fit1->fSumX; slope = nHits*sumXY - sumX * sumY; - AliDebug(5, Form("slope from fitreg: %i", slope)); offset = sumX2*sumY - sumX * sumXY; temp = mult * slope; slope = temp >> 32; // take the upper 32 bits @@ -1595,27 +1497,31 @@ void AliTRDmcmSim::FitTracklet() offset = temp >> 32; // take the upper 32 bits offset = offset + yoffs; - AliDebug(5, Form("slope: %i, slope * ndrift: %i, deflCorr: %i, tiltCorr: %i", slope, slope * ndrift, deflCorr, tiltCorr)); - slope = ((slope * ndrift) >> ndriftDp) + deflCorr + tiltCorr; + AliDebug(10, Form("slope = %i, slope * ndrift = %i, deflCorr: %i", + slope, slope * ndrift, deflCorr)); + slope = ((slope * ndrift) >> ndriftDp) + deflCorr; offset = offset - (fFitPtr[cpu] << (8 + decPlaces)); - AliDebug(5, Form("Det: %3i, ROB: %i, MCM: %2i: deflection: %i, min: %i, max: %i", fDetector, fRobPos, fMcmPos, slope, minslope, maxslope)); temp = slope; temp = temp * scaleD; slope = (temp >> 32); - AliDebug(5, Form("slope after scaling: %i", slope)); - temp = offset; temp = temp * scaleY; offset = (temp >> 32); // rounding, like in the TRAP slope = (slope + rndAdd) >> decPlaces; - AliDebug(5, Form("slope after shifting: %i", slope)); offset = (offset + rndAdd) >> decPlaces; + AliDebug(5, Form("Det: %3i, ROB: %i, MCM: %2i: deflection: %i, min: %i, max: %i", + fDetector, fRobPos, fMcmPos, slope, + fTrapConfig->GetDmem(0xc030 + 2*fFitPtr[cpu], fDetector, fRobPos, fMcmPos), + fTrapConfig->GetDmem(0xc031 + 2*fFitPtr[cpu], fDetector, fRobPos, fMcmPos))); + Bool_t rejected = kFALSE; - if ((slope < minslope) || (slope > maxslope)) + // deflection range table from DMEM + if ((slope < fTrapConfig->GetDmem(0xc030 + 2*fFitPtr[cpu], fDetector, fRobPos, fMcmPos)) || + (slope > fTrapConfig->GetDmem(0xc031 + 2*fFitPtr[cpu], fDetector, fRobPos, fMcmPos))) rejected = kTRUE; if (rejected && GetApplyCut()) @@ -1636,13 +1542,9 @@ void AliTRDmcmSim::FitTracklet() AliWarning("Overflow in offset"); offset = offset & 0x1FFF; // 13 bit - Float_t length = TMath::Sqrt(1 + (pp->GetRowPos(padrow) * pp->GetRowPos(padrow) + - (fFeeParam->GetPadColFromADC(fRobPos, fMcmPos, 10) * pp->GetWidthIPad() * - fFeeParam->GetPadColFromADC(fRobPos, fMcmPos, 10) * pp->GetWidthIPad())) / - (fGeo->GetTime0(fDetector % 6)*fGeo->GetTime0(fDetector % 6))); + qTotal = 0; // set to zero as long as no reasonable PID calculation is available + // before: GetPID(q0/length/fgChargeNorm, q1/length/fgChargeNorm); - // qTotal = (q1 / nHits) >> 1; - qTotal = GetPID(q0/length/fgChargeNorm, q1/length/fgChargeNorm); if (qTotal > 0xff) AliWarning("Overflow in charge"); qTotal = qTotal & 0xFF; // 8 bit, exactly like in the TRAP program @@ -1706,65 +1608,6 @@ void AliTRDmcmSim::FitTracklet() } } -Int_t AliTRDmcmSim::GetPID(Float_t q0, Float_t q1) -{ - // get PID from accumulated charges q0 and q1 - - Int_t binQ0 = (Int_t) (q0 * fgPidNBinsQ0) + 1; - Int_t binQ1 = (Int_t) (q1 * fgPidNBinsQ1) + 1; - binQ0 = binQ0 >= fgPidNBinsQ0 ? fgPidNBinsQ0-1 : binQ0; - binQ1 = binQ1 >= fgPidNBinsQ0 ? fgPidNBinsQ0-1 : binQ1; - - return fgPidLut[binQ0*fgPidNBinsQ1+binQ1]; -} - -void AliTRDmcmSim::SetPIDlut(Int_t *lut, Int_t nbinsq0, Int_t nbinsq1) -{ - // set a user-defined PID LUT - - if (fgPidLutDelete) - delete [] fgPidLut; - - fgPidLutDelete = kFALSE; - fgPidLut = lut; - fgPidNBinsQ0 = nbinsq0; - fgPidNBinsQ1 = nbinsq1; -} - -void AliTRDmcmSim::SetPIDlut(TH2F *lut) -{ - // set a user-defined PID LUT from a 2D histogram - - if (fgPidLutDelete) - delete [] fgPidLut; - - fgPidNBinsQ0 = lut->GetNbinsX(); - fgPidNBinsQ1 = lut->GetNbinsY(); - - fgPidLut = new Int_t[fgPidNBinsQ0*fgPidNBinsQ1]; - - for (Int_t ix = 0; ix < fgPidNBinsQ0; ix++) { - for (Int_t iy = 0; iy < fgPidNBinsQ1; iy++) { - fgPidLut[ix*fgPidNBinsQ1 + iy] = (Int_t) (256. * lut->GetBinContent(ix, iy)); - } - } - - fgPidLutDelete = kTRUE; -} - -void AliTRDmcmSim::SetPIDlutDefault() -{ - // use the default PID LUT - - if (fgPidLutDelete ) - delete [] fgPidLut; - - fgPidLutDelete = kFALSE; - fgPidLut = *fgPidLutDefault; - fgPidNBinsQ0 = 40; - fgPidNBinsQ1 = 50; -} - void AliTRDmcmSim::Tracklet() { // Run the tracklet calculation by calling sequentially: @@ -1815,10 +1658,8 @@ Bool_t AliTRDmcmSim::StoreTracklets() for (Int_t iTracklet = 0; iTracklet < fTrackletArray->GetEntriesFast(); iTracklet++) { trkl = ((AliTRDtrackletMCM*) (*fTrackletArray)[iTracklet]); trkbranch->SetAddress(&trkl); -// printf("filling tracklet 0x%08x\n", trkl->GetTrackletWord()); trkbranch->Fill(); } - dl->WriteData("OVERWRITE"); return kTRUE; } @@ -1829,45 +1670,31 @@ void AliTRDmcmSim::WriteData(AliTRDarrayADC *digits) // EBSF = 1: unfiltered data; EBSF = 0: filtered data // zero-suppressed valued are written as -1 to digits - if (!fInitialized) { - AliError("Called uninitialized! Nothing done!"); + if( !CheckInitialized() ) return; - } - -// Int_t firstAdc = 0; -// Int_t lastAdc = fNADC - 1; -// -// while (GetCol(firstAdc) < 0) -// firstAdc++; -// -// while (GetCol(lastAdc) < 0) -// lastAdc--; - Int_t offset = (fMcmPos % 4) * 21 + (fRobPos % 2) * 84; + Int_t offset = (fMcmPos % 4 + 1) * 21 + (fRobPos % 2) * 84 - 1; if (fTrapConfig->GetTrapReg(AliTRDtrapConfig::kEBSF) != 0) // store unfiltered data { - for (Int_t iAdc = 0; iAdc < fNADC; iAdc++) { - if (fZSM1Dim[iAdc] == 1) { + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) { + if (~fZSMap[iAdc] == 0) { for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { - digits->SetDataByAdcCol(GetRow(), 20-iAdc + offset, iTimeBin, -1); -// printf("suppressed: %i, %i, %i, %i, now: %i\n", fDetector, GetRow(), GetCol(iAdc), iTimeBin, -// digits->GetData(GetRow(), GetCol(iAdc), iTimeBin)); + digits->SetDataByAdcCol(GetRow(), offset - iAdc, iTimeBin, -1); } } } } else { - for (Int_t iAdc = 0; iAdc < fNADC; iAdc++) { - if (fZSM1Dim[iAdc] == 0) { + for (Int_t iAdc = 0; iAdc < fgkNADC; iAdc++) { + if (~fZSMap[iAdc] != 0) { for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { - digits->SetDataByAdcCol(GetRow(), 20-iAdc + offset, iTimeBin, (fADCF[iAdc][iTimeBin] >> fgkAddDigits) - fgAddBaseline); + digits->SetDataByAdcCol(GetRow(), offset - iAdc, iTimeBin, (fADCF[iAdc][iTimeBin] >> fgkAddDigits) - fgAddBaseline); } } else { for (Int_t iTimeBin = 0; iTimeBin < fNTimeBin; iTimeBin++) { - digits->SetDataByAdcCol(GetRow(), 20-iAdc + offset, iTimeBin, -1); -// printf("suppressed: %i, %i, %i, %i\n", fDetector, GetRow(), GetCol(iAdc), iTimeBin); + digits->SetDataByAdcCol(GetRow(), offset - iAdc, iTimeBin, -1); } } } @@ -1934,7 +1761,6 @@ void AliTRDmcmSim::Sort3(UShort_t idx1i, UShort_t idx2i, UShort_t idx3i, \ if (val1i > val2i) sel=4; else sel=0; if (val2i > val3i) sel=sel + 2; if (val3i > val1i) sel=sel + 1; - //printf("input channels %d %d %d, charges %d %d %d sel=%d\n",idx1i, idx2i, idx3i, val1i, val2i, val3i, sel); switch(sel) { case 6 : // 1 > 2 > 3 => 1 2 3 @@ -1996,7 +1822,6 @@ void AliTRDmcmSim::Sort3(UShort_t idx1i, UShort_t idx2i, UShort_t idx3i, \ AliError("ERROR in Sort3!!!\n"); break; } -// printf("output channels %d %d %d, charges %d %d %d \n",*idx1o, *idx2o, *idx3o, *val1o, *val2o, *val3o); } void AliTRDmcmSim::Sort6To4(UShort_t idx1i, UShort_t idx2i, UShort_t idx3i, UShort_t idx4i, UShort_t idx5i, UShort_t idx6i, \ @@ -2051,8 +1876,112 @@ void AliTRDmcmSim::Sort6To2Worst(UShort_t idx1i, UShort_t idx2i, UShort_t idx Sort3(idx21s, idx22s, idx23s, val21s, val22s, val23s, &dummy1, &dummy2, idx6o, &dummy3, &dummy4, &dummy5); -// printf("idx21s=%d, idx23as=%d, idx22s=%d, idx23bs=%d, idx5o=%d, idx6o=%d\n", -// idx21s, idx23as, idx22s, idx23bs, *idx5o, *idx6o); } +// ----- I/O implementation ----- + +ostream& AliTRDmcmSim::text(ostream& os) +{ + // manipulator to activate output in text format (default) + + os.iword(fgkFormatIndex) = 0; + return os; +} + +ostream& AliTRDmcmSim::cfdat(ostream& os) +{ + // manipulator to activate output in CFDAT format + // to send to the FEE via SCSN + + os.iword(fgkFormatIndex) = 1; + return os; +} + +ostream& AliTRDmcmSim::raw(ostream& os) +{ + // manipulator to activate output as raw data dump + + os.iword(fgkFormatIndex) = 2; + return os; +} + +ostream& operator<<(ostream& os, const AliTRDmcmSim& mcm) +{ + // output implementation + + // no output for non-initialized MCM + if (!mcm.CheckInitialized()) + return os; + + // ----- human-readable output ----- + if (os.iword(AliTRDmcmSim::fgkFormatIndex) == 0) { + + os << "MCM " << mcm.fMcmPos << " on ROB " << mcm.fRobPos << + " in detector " << mcm.fDetector << std::endl; + + os << "----- Unfiltered ADC data (10 bit) -----" << std::endl; + os << "ch "; + for (Int_t iChannel = 0; iChannel < mcm.fgkNADC; iChannel++) + os << std::setw(5) << iChannel; + os << std::endl; + for (Int_t iTimeBin = 0; iTimeBin < mcm.fNTimeBin; iTimeBin++) { + os << "tb " << std::setw(2) << iTimeBin << ":"; + for (Int_t iChannel = 0; iChannel < mcm.fgkNADC; iChannel++) { + os << std::setw(5) << (mcm.fADCR[iChannel][iTimeBin] >> mcm.fgkAddDigits); + } + os << std::endl; + } + + os << "----- Filtered ADC data (10+2 bit) -----" << std::endl; + os << "ch "; + for (Int_t iChannel = 0; iChannel < mcm.fgkNADC; iChannel++) + os << std::setw(4) << iChannel + << ((~mcm.fZSMap[iChannel] != 0) ? "!" : " "); + os << std::endl; + for (Int_t iTimeBin = 0; iTimeBin < mcm.fNTimeBin; iTimeBin++) { + os << "tb " << std::setw(2) << iTimeBin << ":"; + for (Int_t iChannel = 0; iChannel < mcm.fgkNADC; iChannel++) { + os << std::setw(4) << (mcm.fADCF[iChannel][iTimeBin]) + << (((mcm.fZSMap[iChannel] & (1 << iTimeBin)) == 0) ? "!" : " "); + } + os << std::endl; + } + } + + // ----- CFDAT output ----- + else if(os.iword(AliTRDmcmSim::fgkFormatIndex) == 1) { + Int_t dest = 127; + Int_t addrOffset = 0x2000; + Int_t addrStep = 0x80; + + for (Int_t iTimeBin = 0; iTimeBin < mcm.fNTimeBin; iTimeBin++) { + for (Int_t iChannel = 0; iChannel < mcm.fgkNADC; iChannel++) { + os << std::setw(5) << 10 + << std::setw(5) << addrOffset + iChannel * addrStep + iTimeBin + << std::setw(5) << (mcm.fADCF[iChannel][iTimeBin]) + << std::setw(5) << dest << std::endl; + } + os << std::endl; + } + } + + // ----- raw data ouptut ----- + else if (os.iword(AliTRDmcmSim::fgkFormatIndex) == 2) { + Int_t bufSize = 300; + UInt_t *buf = new UInt_t[bufSize]; + + Int_t bufLength = mcm.ProduceRawStream(&buf[0], bufSize); + + for (Int_t i = 0; i < bufLength; i++) + std::cout << "0x" << std::hex << buf[i] << std::endl; + + delete [] buf; + } + + else { + os << "unknown format set" << std::endl; + } + + return os; +} diff --git a/TRD/AliTRDmcmSim.h b/TRD/AliTRDmcmSim.h index 91bfd0e685e..4964c715980 100644 --- a/TRD/AliTRDmcmSim.h +++ b/TRD/AliTRDmcmSim.h @@ -11,21 +11,17 @@ // // /////////////////////////////////////////////////////// -#include -#include "AliTRDCommonParam.h" -#include "AliTRDcalibDB.h" +#include +class TObject; class TClonesArray; class TH2F; class AliRunLoader; class AliTRDfeeParam; -class AliTRDSimParam; class AliTRDtrapConfig; -class AliTRDcalibDB; -class AliTRDgeometry; -class AliTRDpadPlane; class AliTRDarrayADC; +class AliTRDarrayDictionary; class AliTRDdigitsManager; class AliTRDmcmSim : public TObject { @@ -33,40 +29,49 @@ class AliTRDmcmSim : public TObject { AliTRDmcmSim(); virtual ~AliTRDmcmSim(); - void Init( Int_t cha, Int_t rob, Int_t mcm, Bool_t newEvent = kFALSE ); // Initialize MCM by the position parameters - void Reset(); // clears filter registers and internal data - void SetNTimebins(Int_t ntimebins); + void Init(Int_t det, Int_t rob, Int_t mcm, Bool_t newEvent = kFALSE); + // Initialize MCM by the position parameters + + void Reset(); + // clears filter registers and internal data Bool_t LoadMCM(AliRunLoader* const runloader, Int_t det, Int_t rob, Int_t mcm); + void NoiseTest(Int_t nsamples, Int_t mean, Int_t sigma, Int_t inputGain = 1, Int_t inputTail = 2); - Int_t GetDataRaw(Int_t iadc, Int_t timebin) const { return (fADCR[iadc][timebin] >> 2); } // Get unfiltered ADC data - Int_t GetDataFiltered(Int_t iadc, Int_t timebin) const { return (fADCF[iadc][timebin] >> 2); } // Get filtered ADC data + Int_t GetDataRaw(Int_t iadc, Int_t timebin) const { return (fADCR[iadc][timebin] >> 2); } + // Get unfiltered ADC data + Int_t GetDataFiltered(Int_t iadc, Int_t timebin) const { return (fADCF[iadc][timebin] >> 2); } + // Get filtered ADC data + void SetData(Int_t iadc, Int_t *adc); // Set ADC data with array - void SetData(Int_t iadc, Int_t it, Int_t adc ); // Set ADC data + void SetData(Int_t iadc, Int_t it, Int_t adc); // Set ADC data void SetData(AliTRDarrayADC *adcArray, AliTRDdigitsManager *digitsManager = 0x0); // Set ADC data from adcArray - void SetDataPedestal(Int_t iadc ); // Fill ADC data with pedestal values - static void SetApplyCut(Bool_t applyCut) { fgApplyCut = applyCut; } + void SetDataPedestal(Int_t iadc); // Fill ADC data with pedestal values - static Float_t GetChargeNorm() { return fgChargeNorm; } - static void SetChargeNorm(Float_t chargenorm) { fgChargeNorm = chargenorm; } + static Bool_t GetApplyCut() { return fgApplyCut; } + static void SetApplyCut(Bool_t applyCut) { fgApplyCut = applyCut; } - static Int_t GetAddBaseline() { return fgAddBaseline; } - static void SetAddBaseline(Int_t baseline) { fgAddBaseline = baseline; } + static Int_t GetAddBaseline() { return fgAddBaseline; } + static void SetAddBaseline(Int_t baseline) { fgAddBaseline = baseline; } + // Additional baseline which is added for the processing + // in the TRAP and removed when writing back the data. + // This is needed to run with TRAP parameters set for a + // different baseline but it will not change the baseline + // of the output. Int_t GetDetector() const { return fDetector; }; // Returns Chamber ID (0-539) - Int_t GetRobPos() const { return fRobPos; }; // Returns ROB position (0-7) - Int_t GetMcmPos() const { return fMcmPos; }; // Returns MCM position (0-17) (16,17 are mergers) - Int_t GetRow() const { return fRow; }; // Returns Row number on chamber where the MCM is sitting - Int_t GetCol( Int_t iadc ); // Get corresponding column (0-143) from for ADC channel iadc = [0:20] + Int_t GetRobPos() const { return fRobPos; }; // Returns ROB position (0-7) + Int_t GetMcmPos() const { return fMcmPos; }; // Returns MCM position (0-17) (16,17 are mergers) + Int_t GetRow() const { return fRow; }; // Returns Row number on chamber where the MCM is sitting + Int_t GetCol( Int_t iadc ); // Get corresponding column (0-143) from for ADC channel iadc = [0:20] // for the ADC/Col mapping, see: http://wiki.kip.uni-heidelberg.de/ti/TRD/index.php/Image:ROB_MCM_numbering.pdf - static Bool_t GetApplyCut() { return fgApplyCut; } void WriteData(AliTRDarrayADC *digits); Bool_t StoreTracklets(); // Stores tracklets via runloader - Int_t ProduceRawStream( UInt_t *buf, Int_t bufsize, UInt_t iEv = 0 ); // Produce raw data stream - Read data format + Int_t ProduceRawStream( UInt_t *buf, Int_t bufsize, UInt_t iEv = 0 ) const; // Produce raw data stream - Real data format Int_t ProduceTrackletStream( UInt_t *buf, Int_t bufsize ); // produce the tracklet stream for this MCM // different stages of processing in the TRAP @@ -80,13 +85,13 @@ class AliTRDmcmSim : public TObject { void FilterTail(); // Apply tail filter // filter initialization (resets internal registers) - void FilterPedestalInit(); + void FilterPedestalInit(Int_t baseline = 10); void FilterGainInit(); - void FilterTailInit(Int_t baseline); //??? automatic baseline?? + void FilterTailInit(Int_t baseline = -1); // feed single sample to individual filter // this changes the internal registers - // all filters operate on 12-bit values! + // all filters operate on (10+2)-bit values! UShort_t FilterPedestalNextSample(Int_t adc, Int_t timebin, UShort_t value); UShort_t FilterGainNextSample(Int_t adc, UShort_t value); UShort_t FilterTailNextSample(Int_t adc, UShort_t value); @@ -97,54 +102,57 @@ class AliTRDmcmSim : public TObject { void TrackletSelection(); void FitTracklet(); - static Int_t GetPIDNBinsQ0() { return fgPidNBinsQ0; } - static Int_t GetPIDNBinsQ1() { return fgPidNBinsQ1; } - static Int_t GetPID(Float_t q0, Float_t q1); - - static void SetPIDlut(TH2F *lut); - static void SetPIDlut(Int_t *lut, Int_t nbinsq0, Int_t nbinsq1); - static void SetPIDlutDefault(); - + Int_t GetNHits() const { return fNHits; } + Bool_t GetHit(Int_t index, Int_t &channel, Int_t &timebin, Int_t &qtot, Int_t &ypos, Float_t &y, Int_t &label) const; TClonesArray* GetTrackletArray() const { return fTrackletArray; } // data display void Print(Option_t* const option="") const; // print stored data to stdout void Draw(Option_t* const option =""); // draw data (ADC data, hits and tracklets) - void DumpData( const char *const f, const char *const target ); // Dump data stored (only for debugging) + + friend std::ostream& operator<<(std::ostream &os, const AliTRDmcmSim &mcm); // data output using ostream (e.g. cout << mcm;) + static ostream& cfdat(ostream &os); // manipulator to activate cfdat output + static ostream& raw (ostream &os); // manipulator to activate raw output + static ostream& text (ostream &os); // manipulator to activate text output protected: - Bool_t CheckInitialized(); // Check whether the class is initialized + Bool_t CheckInitialized() const; // Check whether the class is initialized - Bool_t fInitialized; // Status whether the class is initialized or not - Int_t fMaxTracklets; // maximum number of tracklet-words submitted per mcm **new** //??? - Int_t fDetector; // Chamber ID + void SetNTimebins(Int_t ntimebins); // allocate data arrays corr. to the no. of timebins + + static const Int_t fgkFormatIndex; // index for format settings in stream + + static const Int_t fgkNADC; // Number of ADC + static const Int_t fgkMaxTracklets = 4; // maximum number of tracklet-words submitted per MCM (one per CPU) + static const Int_t fgkAddDigits = 2; // additional digits used for internal representation of ADC data + // all internal data as after data control block (i.e. 12 bit), s. TRAP manual + static const Int_t fgkNCPU = 4; // Number of CPUs in the TRAP + static const Int_t fgkNHitsMC = 100; // maximum number of hits for which MC information is kept + + static const UShort_t fgkFPshifts[4]; // shifts for pedestal filter + + + Bool_t fInitialized; // memory is allocated if initialized + Int_t fDetector; // Chamber ID Int_t fRobPos; // ROB Position on chamber Int_t fMcmPos; // MCM Position on chamber Int_t fRow; // Pad row number (0-11 or 0-15) of the MCM on chamber - Int_t fNADC; // Number of ADC (usually 21) //??? static const - Int_t fNTimeBin; // Number of Timebins (variable) //??? why stored here? taken from TRAPconfig + Int_t fNTimeBin; // Number of timebins currently allocated Int_t **fADCR; // Array with MCM ADC values (Raw, 12 bit) Int_t **fADCF; // Array with MCM ADC values (Filtered, 12 bit) - UInt_t *fMCMT; // tracklet word for one mcm/trap-chip **new** //??? needed? + UInt_t *fMCMT; // tracklet word for one mcm/trap-chip TClonesArray *fTrackletArray; // Array of AliTRDtrackletMCM which contains MC information in addition to the tracklet word - Int_t **fZSM; // Zero suppression map - Int_t *fZSM1Dim; // Zero suppression map (1 dimensional projection) + Int_t *fZSMap; // Zero suppression map (1 dimensional projection) - static const Int_t fgkAddDigits = 2; // additional digits used for internal representation - // all internal data as after data control block (i.e. 12 bit), s. TRAP manual - static const Int_t fgkNCPU = 4; // Number of CPUs in the TRAP Int_t fFitPtr[fgkNCPU]; // pointer to the tracklet to be calculated by CPU i - static const Int_t fgkNHitsMC = 100; // maximum number of hits for which MC information is kept // Parameter classes AliTRDfeeParam *fFeeParam; // FEE parameters AliTRDtrapConfig *fTrapConfig; // TRAP config - AliTRDSimParam *fSimParam; // Simulation parameters - AliTRDCommonParam *fCommonParam; // common parameters - AliTRDcalibDB *fCal; // Calibration interface - AliTRDgeometry *fGeo; // Geometry AliTRDdigitsManager *fDigitsManager; // pointer to digits manager used for MC label calculation + AliTRDarrayDictionary* fDict[3]; // pointers to label dictionaries + // internal filter registers UInt_t* fPedAcc; // Accumulator for pedestal filter @@ -166,17 +174,17 @@ class AliTRDmcmSim : public TObject { // tracklet calculation struct FitReg_t { // pointer to the 18 fit registers - Int_t fNhits; // number of hits + Int_t fNhits; // number of hits UInt_t fQ0; // charge accumulated in first window UInt_t fQ1; // charge accumulated in second window UInt_t fSumX; // sum x - Int_t fSumY; // sum y + Int_t fSumY; // sum y UInt_t fSumX2; // sum x**2 UInt_t fSumY2; // sum y**2 - Int_t fSumXY; // sum x*y + Int_t fSumXY; // sum x*y } *fFitReg; - //??? cleaning up + // Sort functions as in TRAP void Sort2(UShort_t idx1i, UShort_t idx2i, UShort_t val1i, UShort_t val2i, UShort_t *idx1o, UShort_t *idx2o, UShort_t *val1o, UShort_t *val2o) const; void Sort3(UShort_t idx1i, UShort_t idx2i, UShort_t idx3i, @@ -191,7 +199,8 @@ class AliTRDmcmSim : public TObject { UShort_t val1i, UShort_t val2i, UShort_t val3i, UShort_t val4i, UShort_t val5i, UShort_t val6i, UShort_t *idx5o, UShort_t *idx6o); - UInt_t AddUintClipping(UInt_t a, UInt_t b, UInt_t nbits) const; // Add a and b (unsigned) with clipping to the maximum value representable by nbits + UInt_t AddUintClipping(UInt_t a, UInt_t b, UInt_t nbits) const; + // Add a and b (unsigned) with clipping to the maximum value representable by nbits private: AliTRDmcmSim(const AliTRDmcmSim &m); // not implemented @@ -201,14 +210,9 @@ class AliTRDmcmSim : public TObject { static Int_t fgAddBaseline; // add baseline to the ADC values - static Float_t fgChargeNorm; // normalization factor for charge (for PID) - static Int_t fgPidNBinsQ0; // number of bins in the PID LUT for Q0 - static Int_t fgPidNBinsQ1; // number of bins in the PID LUT for Q1 - static Int_t fgPidLutDefault[40][50]; // the default PID LUT - static Int_t *fgPidLut; // pointer to user defined PID LUT - static Bool_t fgPidLutDelete; // owns the LUT - - ClassDef(AliTRDmcmSim,4) + ClassDef(AliTRDmcmSim,6) }; +std::ostream& operator<<(std::ostream& os, const AliTRDmcmSim& mcm); + #endif diff --git a/TRD/AliTRDtrapConfig.cxx b/TRD/AliTRDtrapConfig.cxx index 9325889faa9..dbb23ef0291 100644 --- a/TRD/AliTRDtrapConfig.cxx +++ b/TRD/AliTRDtrapConfig.cxx @@ -21,937 +21,1203 @@ // // //////////////////////////////////////////////////////////////////////////// -#include "AliLog.h" - -#include "AliTRDgeometry.h" -#include "AliTRDfeeParam.h" -#include "AliTRDtrapConfig.h" - -#include -#include -#include - -ClassImp(AliTRDtrapConfig) - -AliTRDtrapConfig* AliTRDtrapConfig::fgInstance = 0x0; -const Int_t AliTRDtrapConfig::fgkMaxMcm = AliTRDfeeParam::GetNmcmRob() + 2; - -AliTRDtrapConfig::AliTRDtrapConfig() : - TObject() -{ - // default constructor, initializing array of TRAP registers - - // Name Address Nbits Reset Value - fRegs[kSML0] = SimpleReg_t("SML0", 0x0A00, 15, 0x4050 ); // Global state machine - fRegs[kSML1] = SimpleReg_t("SML1", 0x0A01, 15, 0x4200 ); - fRegs[kSML2] = SimpleReg_t("SML2", 0x0A02, 15, 0x4384 ); - fRegs[kSMMODE] = SimpleReg_t("SMMODE", 0x0A03, 16, 0xF0E2 ); - fRegs[kNITM0] = SimpleReg_t("NITM0", 0x0A08, 14, 0x3FFF ); - fRegs[kNITM1] = SimpleReg_t("NITM1", 0x0A09, 14, 0x3FFF ); - fRegs[kNITM2] = SimpleReg_t("NITM2", 0x0A0A, 14, 0x3FFF ); - fRegs[kNIP4D] = SimpleReg_t("NIP4D", 0x0A0B, 7, 0x7F ); - fRegs[kCPU0CLK] = SimpleReg_t("CPU0CLK", 0x0A20, 5, 0x07 ); - fRegs[kCPU1CLK] = SimpleReg_t("CPU1CLK", 0x0A22, 5, 0x07 ); - fRegs[kCPU2CLK] = SimpleReg_t("CPU2CLK", 0x0A24, 5, 0x07 ); - fRegs[kCPU3CLK] = SimpleReg_t("CPU3CLK", 0x0A26, 5, 0x07 ); - fRegs[kNICLK] = SimpleReg_t("NICLK", 0x0A28, 5, 0x07 ); - fRegs[kFILCLK] = SimpleReg_t("FILCLK", 0x0A2A, 5, 0x07 ); - fRegs[kPRECLK] = SimpleReg_t("PRECLK", 0x0A2C, 5, 0x07 ); - fRegs[kADCEN] = SimpleReg_t("ADCEN", 0x0A2E, 5, 0x07 ); - fRegs[kNIODE] = SimpleReg_t("NIODE", 0x0A30, 5, 0x07 ); - fRegs[kNIOCE] = SimpleReg_t("NIOCE", 0x0A32, 6, 0x21 ); // bit 5 is status bit (read-only)! - fRegs[kNIIDE] = SimpleReg_t("NIIDE", 0x0A34, 5, 0x07 ); - fRegs[kNIICE] = SimpleReg_t("NIICE", 0x0A36, 5, 0x07 ); - fRegs[kARBTIM] = SimpleReg_t("ARBTIM", 0x0A3F, 4, 0x0 ); // Arbiter - fRegs[kIA0IRQ0] = SimpleReg_t("IA0IRQ0", 0x0B00, 12, 0x000 ); // IVT of CPU0 - fRegs[kIA0IRQ1] = SimpleReg_t("IA0IRQ1", 0x0B01, 12, 0x000 ); - fRegs[kIA0IRQ2] = SimpleReg_t("IA0IRQ2", 0x0B02, 12, 0x000 ); - fRegs[kIA0IRQ3] = SimpleReg_t("IA0IRQ3", 0x0B03, 12, 0x000 ); - fRegs[kIA0IRQ4] = SimpleReg_t("IA0IRQ4", 0x0B04, 12, 0x000 ); - fRegs[kIA0IRQ5] = SimpleReg_t("IA0IRQ5", 0x0B05, 12, 0x000 ); - fRegs[kIA0IRQ6] = SimpleReg_t("IA0IRQ6", 0x0B06, 12, 0x000 ); - fRegs[kIA0IRQ7] = SimpleReg_t("IA0IRQ7", 0x0B07, 12, 0x000 ); - fRegs[kIA0IRQ8] = SimpleReg_t("IA0IRQ8", 0x0B08, 12, 0x000 ); - fRegs[kIA0IRQ9] = SimpleReg_t("IA0IRQ9", 0x0B09, 12, 0x000 ); - fRegs[kIA0IRQA] = SimpleReg_t("IA0IRQA", 0x0B0A, 12, 0x000 ); - fRegs[kIA0IRQB] = SimpleReg_t("IA0IRQB", 0x0B0B, 12, 0x000 ); - fRegs[kIA0IRQC] = SimpleReg_t("IA0IRQC", 0x0B0C, 12, 0x000 ); - fRegs[kIRQSW0] = SimpleReg_t("IRQSW0", 0x0B0D, 13, 0x1FFF ); - fRegs[kIRQHW0] = SimpleReg_t("IRQHW0", 0x0B0E, 13, 0x0000 ); - fRegs[kIRQHL0] = SimpleReg_t("IRQHL0", 0x0B0F, 13, 0x0000 ); - fRegs[kIA1IRQ0] = SimpleReg_t("IA1IRQ0", 0x0B20, 12, 0x000 ); // IVT of CPU1 - fRegs[kIA1IRQ1] = SimpleReg_t("IA1IRQ1", 0x0B21, 12, 0x000 ); - fRegs[kIA1IRQ2] = SimpleReg_t("IA1IRQ2", 0x0B22, 12, 0x000 ); - fRegs[kIA1IRQ3] = SimpleReg_t("IA1IRQ3", 0x0B23, 12, 0x000 ); - fRegs[kIA1IRQ4] = SimpleReg_t("IA1IRQ4", 0x0B24, 12, 0x000 ); - fRegs[kIA1IRQ5] = SimpleReg_t("IA1IRQ5", 0x0B25, 12, 0x000 ); - fRegs[kIA1IRQ6] = SimpleReg_t("IA1IRQ6", 0x0B26, 12, 0x000 ); - fRegs[kIA1IRQ7] = SimpleReg_t("IA1IRQ7", 0x0B27, 12, 0x000 ); - fRegs[kIA1IRQ8] = SimpleReg_t("IA1IRQ8", 0x0B28, 12, 0x000 ); - fRegs[kIA1IRQ9] = SimpleReg_t("IA1IRQ9", 0x0B29, 12, 0x000 ); - fRegs[kIA1IRQA] = SimpleReg_t("IA1IRQA", 0x0B2A, 12, 0x000 ); - fRegs[kIA1IRQB] = SimpleReg_t("IA1IRQB", 0x0B2B, 12, 0x000 ); - fRegs[kIA1IRQC] = SimpleReg_t("IA1IRQC", 0x0B2C, 12, 0x000 ); - fRegs[kIRQSW1] = SimpleReg_t("IRQSW1", 0x0B2D, 13, 0x1FFF ); - fRegs[kIRQHW1] = SimpleReg_t("IRQHW1", 0x0B2E, 13, 0x0000 ); - fRegs[kIRQHL1] = SimpleReg_t("IRQHL1", 0x0B2F, 13, 0x0000 ); - fRegs[kIA2IRQ0] = SimpleReg_t("IA2IRQ0", 0x0B40, 12, 0x000 ); // IVT of CPU2 - fRegs[kIA2IRQ1] = SimpleReg_t("IA2IRQ1", 0x0B41, 12, 0x000 ); - fRegs[kIA2IRQ2] = SimpleReg_t("IA2IRQ2", 0x0B42, 12, 0x000 ); - fRegs[kIA2IRQ3] = SimpleReg_t("IA2IRQ3", 0x0B43, 12, 0x000 ); - fRegs[kIA2IRQ4] = SimpleReg_t("IA2IRQ4", 0x0B44, 12, 0x000 ); - fRegs[kIA2IRQ5] = SimpleReg_t("IA2IRQ5", 0x0B45, 12, 0x000 ); - fRegs[kIA2IRQ6] = SimpleReg_t("IA2IRQ6", 0x0B46, 12, 0x000 ); - fRegs[kIA2IRQ7] = SimpleReg_t("IA2IRQ7", 0x0B47, 12, 0x000 ); - fRegs[kIA2IRQ8] = SimpleReg_t("IA2IRQ8", 0x0B48, 12, 0x000 ); - fRegs[kIA2IRQ9] = SimpleReg_t("IA2IRQ9", 0x0B49, 12, 0x000 ); - fRegs[kIA2IRQA] = SimpleReg_t("IA2IRQA", 0x0B4A, 12, 0x000 ); - fRegs[kIA2IRQB] = SimpleReg_t("IA2IRQB", 0x0B4B, 12, 0x000 ); - fRegs[kIA2IRQC] = SimpleReg_t("IA2IRQC", 0x0B4C, 12, 0x000 ); - fRegs[kIRQSW2] = SimpleReg_t("IRQSW2", 0x0B4D, 13, 0x1FFF ); - fRegs[kIRQHW2] = SimpleReg_t("IRQHW2", 0x0B4E, 13, 0x0000 ); - fRegs[kIRQHL2] = SimpleReg_t("IRQHL2", 0x0B4F, 13, 0x0000 ); - fRegs[kIA3IRQ0] = SimpleReg_t("IA3IRQ0", 0x0B60, 12, 0x000 ); // IVT of CPU3 - fRegs[kIA3IRQ1] = SimpleReg_t("IA3IRQ1", 0x0B61, 12, 0x000 ); - fRegs[kIA3IRQ2] = SimpleReg_t("IA3IRQ2", 0x0B62, 12, 0x000 ); - fRegs[kIA3IRQ3] = SimpleReg_t("IA3IRQ3", 0x0B63, 12, 0x000 ); - fRegs[kIA3IRQ4] = SimpleReg_t("IA3IRQ4", 0x0B64, 12, 0x000 ); - fRegs[kIA3IRQ5] = SimpleReg_t("IA3IRQ5", 0x0B65, 12, 0x000 ); - fRegs[kIA3IRQ6] = SimpleReg_t("IA3IRQ6", 0x0B66, 12, 0x000 ); - fRegs[kIA3IRQ7] = SimpleReg_t("IA3IRQ7", 0x0B67, 12, 0x000 ); - fRegs[kIA3IRQ8] = SimpleReg_t("IA3IRQ8", 0x0B68, 12, 0x000 ); - fRegs[kIA3IRQ9] = SimpleReg_t("IA3IRQ9", 0x0B69, 12, 0x000 ); - fRegs[kIA3IRQA] = SimpleReg_t("IA3IRQA", 0x0B6A, 12, 0x000 ); - fRegs[kIA3IRQB] = SimpleReg_t("IA3IRQB", 0x0B6B, 12, 0x000 ); - fRegs[kIA3IRQC] = SimpleReg_t("IA3IRQC", 0x0B6C, 12, 0x000 ); - fRegs[kIRQSW3] = SimpleReg_t("IRQSW3", 0x0B6D, 13, 0x1FFF ); - fRegs[kIRQHW3] = SimpleReg_t("IRQHW3", 0x0B6E, 13, 0x0000 ); - fRegs[kIRQHL3] = SimpleReg_t("IRQHL3", 0x0B6F, 13, 0x0000 ); - fRegs[kCTGDINI] = SimpleReg_t("CTGDINI", 0x0B80, 32, 0x00000000 ); // Global Counter/Timer - fRegs[kCTGCTRL] = SimpleReg_t("CTGCTRL", 0x0B81, 12, 0xE3F ); - fRegs[kC08CPU0] = SimpleReg_t("C08CPU0", 0x0C00, 32, 0x00000000 ); // CPU constants - fRegs[kC09CPU0] = SimpleReg_t("C09CPU0", 0x0C01, 32, 0x00000000 ); - fRegs[kC10CPU0] = SimpleReg_t("C10CPU0", 0x0C02, 32, 0x00000000 ); - fRegs[kC11CPU0] = SimpleReg_t("C11CPU0", 0x0C03, 32, 0x00000000 ); - fRegs[kC12CPUA] = SimpleReg_t("C12CPUA", 0x0C04, 32, 0x00000000 ); - fRegs[kC13CPUA] = SimpleReg_t("C13CPUA", 0x0C05, 32, 0x00000000 ); - fRegs[kC14CPUA] = SimpleReg_t("C14CPUA", 0x0C06, 32, 0x00000000 ); - fRegs[kC15CPUA] = SimpleReg_t("C15CPUA", 0x0C07, 32, 0x00000000 ); - fRegs[kC08CPU1] = SimpleReg_t("C08CPU1", 0x0C08, 32, 0x00000000 ); - fRegs[kC09CPU1] = SimpleReg_t("C09CPU1", 0x0C09, 32, 0x00000000 ); - fRegs[kC10CPU1] = SimpleReg_t("C10CPU1", 0x0C0A, 32, 0x00000000 ); - fRegs[kC11CPU1] = SimpleReg_t("C11CPU1", 0x0C0B, 32, 0x00000000 ); - fRegs[kC08CPU2] = SimpleReg_t("C08CPU2", 0x0C10, 32, 0x00000000 ); - fRegs[kC09CPU2] = SimpleReg_t("C09CPU2", 0x0C11, 32, 0x00000000 ); - fRegs[kC10CPU2] = SimpleReg_t("C10CPU2", 0x0C12, 32, 0x00000000 ); - fRegs[kC11CPU2] = SimpleReg_t("C11CPU2", 0x0C13, 32, 0x00000000 ); - fRegs[kC08CPU3] = SimpleReg_t("C08CPU3", 0x0C18, 32, 0x00000000 ); - fRegs[kC09CPU3] = SimpleReg_t("C09CPU3", 0x0C19, 32, 0x00000000 ); - fRegs[kC10CPU3] = SimpleReg_t("C10CPU3", 0x0C1A, 32, 0x00000000 ); - fRegs[kC11CPU3] = SimpleReg_t("C11CPU3", 0x0C1B, 32, 0x00000000 ); - fRegs[kNMOD] = SimpleReg_t("NMOD", 0x0D40, 6, 0x08 ); // NI interface - fRegs[kNDLY] = SimpleReg_t("NDLY", 0x0D41, 30, 0x24924924 ); - fRegs[kNED] = SimpleReg_t("NED", 0x0D42, 16, 0xA240 ); - fRegs[kNTRO] = SimpleReg_t("NTRO", 0x0D43, 18, 0x3FFFC ); - fRegs[kNRRO] = SimpleReg_t("NRRO", 0x0D44, 18, 0x3FFFC ); - fRegs[kNES] = SimpleReg_t("NES", 0x0D45, 32, 0x00000000 ); - fRegs[kNTP] = SimpleReg_t("NTP", 0x0D46, 32, 0x0000FFFF ); - fRegs[kNBND] = SimpleReg_t("NBND", 0x0D47, 16, 0x6020 ); - fRegs[kNP0] = SimpleReg_t("NP0", 0x0D48, 11, 0x44C ); - fRegs[kNP1] = SimpleReg_t("NP1", 0x0D49, 11, 0x44C ); - fRegs[kNP2] = SimpleReg_t("NP2", 0x0D4A, 11, 0x44C ); - fRegs[kNP3] = SimpleReg_t("NP3", 0x0D4B, 11, 0x44C ); - fRegs[kNCUT] = SimpleReg_t("NCUT", 0x0D4C, 32, 0xFFFFFFFF ); - fRegs[kTPPT0] = SimpleReg_t("TPPT0", 0x3000, 7, 0x01 ); // Filter and Preprocessor - fRegs[kTPFS] = SimpleReg_t("TPFS", 0x3001, 7, 0x05 ); - fRegs[kTPFE] = SimpleReg_t("TPFE", 0x3002, 7, 0x14 ); - fRegs[kTPPGR] = SimpleReg_t("TPPGR", 0x3003, 7, 0x15 ); - fRegs[kTPPAE] = SimpleReg_t("TPPAE", 0x3004, 7, 0x1E ); - fRegs[kTPQS0] = SimpleReg_t("TPQS0", 0x3005, 7, 0x00 ); - fRegs[kTPQE0] = SimpleReg_t("TPQE0", 0x3006, 7, 0x0A ); - fRegs[kTPQS1] = SimpleReg_t("TPQS1", 0x3007, 7, 0x0B ); - fRegs[kTPQE1] = SimpleReg_t("TPQE1", 0x3008, 7, 0x14 ); - fRegs[kEBD] = SimpleReg_t("EBD", 0x3009, 3, 0x0 ); - fRegs[kEBAQA] = SimpleReg_t("EBAQA", 0x300A, 7, 0x00 ); - fRegs[kEBSIA] = SimpleReg_t("EBSIA", 0x300B, 7, 0x20 ); - fRegs[kEBSF] = SimpleReg_t("EBSF", 0x300C, 1, 0x1 ); - fRegs[kEBSIM] = SimpleReg_t("EBSIM", 0x300D, 1, 0x1 ); - fRegs[kEBPP] = SimpleReg_t("EBPP", 0x300E, 1, 0x1 ); - fRegs[kEBPC] = SimpleReg_t("EBPC", 0x300F, 1, 0x1 ); - fRegs[kEBIS] = SimpleReg_t("EBIS", 0x3014, 10, 0x005 ); - fRegs[kEBIT] = SimpleReg_t("EBIT", 0x3015, 12, 0x028 ); - fRegs[kEBIL] = SimpleReg_t("EBIL", 0x3016, 8, 0xF0 ); - fRegs[kEBIN] = SimpleReg_t("EBIN", 0x3017, 1, 0x1 ); - fRegs[kFLBY] = SimpleReg_t("FLBY", 0x3018, 1, 0x0 ); - fRegs[kFPBY] = SimpleReg_t("FPBY", 0x3019, 1, 0x0 ); - fRegs[kFGBY] = SimpleReg_t("FGBY", 0x301A, 1, 0x0 ); - fRegs[kFTBY] = SimpleReg_t("FTBY", 0x301B, 1, 0x0 ); - fRegs[kFCBY] = SimpleReg_t("FCBY", 0x301C, 1, 0x0 ); - fRegs[kFPTC] = SimpleReg_t("FPTC", 0x3020, 2, 0x3 ); - fRegs[kFPNP] = SimpleReg_t("FPNP", 0x3021, 9, 0x078 ); - fRegs[kFPCL] = SimpleReg_t("FPCL", 0x3022, 1, 0x1 ); - fRegs[kFGTA] = SimpleReg_t("FGTA", 0x3028, 12, 0x014 ); - fRegs[kFGTB] = SimpleReg_t("FGTB", 0x3029, 12, 0x80C ); - fRegs[kFGCL] = SimpleReg_t("FGCL", 0x302A, 1, 0x1 ); - fRegs[kFTAL] = SimpleReg_t("FTAL", 0x3030, 10, 0x0F6 ); - fRegs[kFTLL] = SimpleReg_t("FTLL", 0x3031, 9, 0x11D ); - fRegs[kFTLS] = SimpleReg_t("FTLS", 0x3032, 9, 0x0D3 ); - fRegs[kFCW1] = SimpleReg_t("FCW1", 0x3038, 8, 0x1E ); - fRegs[kFCW2] = SimpleReg_t("FCW2", 0x3039, 8, 0xD4 ); - fRegs[kFCW3] = SimpleReg_t("FCW3", 0x303A, 8, 0xE6 ); - fRegs[kFCW4] = SimpleReg_t("FCW4", 0x303B, 8, 0x4A ); - fRegs[kFCW5] = SimpleReg_t("FCW5", 0x303C, 8, 0xEF ); - fRegs[kTPFP] = SimpleReg_t("TPFP", 0x3040, 9, 0x037 ); - fRegs[kTPHT] = SimpleReg_t("TPHT", 0x3041, 14, 0x00A0 ); - fRegs[kTPVT] = SimpleReg_t("TPVT", 0x3042, 6, 0x00 ); - fRegs[kTPVBY] = SimpleReg_t("TPVBY", 0x3043, 1, 0x0 ); - fRegs[kTPCT] = SimpleReg_t("TPCT", 0x3044, 5, 0x08 ); - fRegs[kTPCL] = SimpleReg_t("TPCL", 0x3045, 5, 0x01 ); - fRegs[kTPCBY] = SimpleReg_t("TPCBY", 0x3046, 1, 0x1 ); - fRegs[kTPD] = SimpleReg_t("TPD", 0x3047, 4, 0xF ); - fRegs[kTPCI0] = SimpleReg_t("TPCI0", 0x3048, 5, 0x00 ); - fRegs[kTPCI1] = SimpleReg_t("TPCI1", 0x3049, 5, 0x00 ); - fRegs[kTPCI2] = SimpleReg_t("TPCI2", 0x304A, 5, 0x00 ); - fRegs[kTPCI3] = SimpleReg_t("TPCI3", 0x304B, 5, 0x00 ); - fRegs[kADCMSK] = SimpleReg_t("ADCMSK", 0x3050, 21, 0x1FFFFF ); - fRegs[kADCINB] = SimpleReg_t("ADCINB", 0x3051, 2, 0x2 ); - fRegs[kADCDAC] = SimpleReg_t("ADCDAC", 0x3052, 5, 0x10 ); - fRegs[kADCPAR] = SimpleReg_t("ADCPAR", 0x3053, 18, 0x195EF ); - fRegs[kADCTST] = SimpleReg_t("ADCTST", 0x3054, 2, 0x0 ); - fRegs[kSADCAZ] = SimpleReg_t("SADCAZ", 0x3055, 1, 0x1 ); - fRegs[kFGF0] = SimpleReg_t("FGF0", 0x3080, 9, 0x000 ); - fRegs[kFGF1] = SimpleReg_t("FGF1", 0x3081, 9, 0x000 ); - fRegs[kFGF2] = SimpleReg_t("FGF2", 0x3082, 9, 0x000 ); - fRegs[kFGF3] = SimpleReg_t("FGF3", 0x3083, 9, 0x000 ); - fRegs[kFGF4] = SimpleReg_t("FGF4", 0x3084, 9, 0x000 ); - fRegs[kFGF5] = SimpleReg_t("FGF5", 0x3085, 9, 0x000 ); - fRegs[kFGF6] = SimpleReg_t("FGF6", 0x3086, 9, 0x000 ); - fRegs[kFGF7] = SimpleReg_t("FGF7", 0x3087, 9, 0x000 ); - fRegs[kFGF8] = SimpleReg_t("FGF8", 0x3088, 9, 0x000 ); - fRegs[kFGF9] = SimpleReg_t("FGF9", 0x3089, 9, 0x000 ); - fRegs[kFGF10] = SimpleReg_t("FGF10", 0x308A, 9, 0x000 ); - fRegs[kFGF11] = SimpleReg_t("FGF11", 0x308B, 9, 0x000 ); - fRegs[kFGF12] = SimpleReg_t("FGF12", 0x308C, 9, 0x000 ); - fRegs[kFGF13] = SimpleReg_t("FGF13", 0x308D, 9, 0x000 ); - fRegs[kFGF14] = SimpleReg_t("FGF14", 0x308E, 9, 0x000 ); - fRegs[kFGF15] = SimpleReg_t("FGF15", 0x308F, 9, 0x000 ); - fRegs[kFGF16] = SimpleReg_t("FGF16", 0x3090, 9, 0x000 ); - fRegs[kFGF17] = SimpleReg_t("FGF17", 0x3091, 9, 0x000 ); - fRegs[kFGF18] = SimpleReg_t("FGF18", 0x3092, 9, 0x000 ); - fRegs[kFGF19] = SimpleReg_t("FGF19", 0x3093, 9, 0x000 ); - fRegs[kFGF20] = SimpleReg_t("FGF20", 0x3094, 9, 0x000 ); - fRegs[kFGA0] = SimpleReg_t("FGA0", 0x30A0, 6, 0x00 ); - fRegs[kFGA1] = SimpleReg_t("FGA1", 0x30A1, 6, 0x00 ); - fRegs[kFGA2] = SimpleReg_t("FGA2", 0x30A2, 6, 0x00 ); - fRegs[kFGA3] = SimpleReg_t("FGA3", 0x30A3, 6, 0x00 ); - fRegs[kFGA4] = SimpleReg_t("FGA4", 0x30A4, 6, 0x00 ); - fRegs[kFGA5] = SimpleReg_t("FGA5", 0x30A5, 6, 0x00 ); - fRegs[kFGA6] = SimpleReg_t("FGA6", 0x30A6, 6, 0x00 ); - fRegs[kFGA7] = SimpleReg_t("FGA7", 0x30A7, 6, 0x00 ); - fRegs[kFGA8] = SimpleReg_t("FGA8", 0x30A8, 6, 0x00 ); - fRegs[kFGA9] = SimpleReg_t("FGA9", 0x30A9, 6, 0x00 ); - fRegs[kFGA10] = SimpleReg_t("FGA10", 0x30AA, 6, 0x00 ); - fRegs[kFGA11] = SimpleReg_t("FGA11", 0x30AB, 6, 0x00 ); - fRegs[kFGA12] = SimpleReg_t("FGA12", 0x30AC, 6, 0x00 ); - fRegs[kFGA13] = SimpleReg_t("FGA13", 0x30AD, 6, 0x00 ); - fRegs[kFGA14] = SimpleReg_t("FGA14", 0x30AE, 6, 0x00 ); - fRegs[kFGA15] = SimpleReg_t("FGA15", 0x30AF, 6, 0x00 ); - fRegs[kFGA16] = SimpleReg_t("FGA16", 0x30B0, 6, 0x00 ); - fRegs[kFGA17] = SimpleReg_t("FGA17", 0x30B1, 6, 0x00 ); - fRegs[kFGA18] = SimpleReg_t("FGA18", 0x30B2, 6, 0x00 ); - fRegs[kFGA19] = SimpleReg_t("FGA19", 0x30B3, 6, 0x00 ); - fRegs[kFGA20] = SimpleReg_t("FGA20", 0x30B4, 6, 0x00 ); - fRegs[kFLL00] = SimpleReg_t("FLL00", 0x3100, 6, 0x00 ); // non-linearity table, 64 x 6 bits - fRegs[kFLL01] = SimpleReg_t("FLL01", 0x3101, 6, 0x00 ); - fRegs[kFLL02] = SimpleReg_t("FLL02", 0x3102, 6, 0x00 ); - fRegs[kFLL03] = SimpleReg_t("FLL03", 0x3103, 6, 0x00 ); - fRegs[kFLL04] = SimpleReg_t("FLL04", 0x3104, 6, 0x00 ); - fRegs[kFLL05] = SimpleReg_t("FLL05", 0x3105, 6, 0x00 ); - fRegs[kFLL06] = SimpleReg_t("FLL06", 0x3106, 6, 0x00 ); - fRegs[kFLL07] = SimpleReg_t("FLL07", 0x3107, 6, 0x00 ); - fRegs[kFLL08] = SimpleReg_t("FLL08", 0x3108, 6, 0x00 ); - fRegs[kFLL09] = SimpleReg_t("FLL09", 0x3109, 6, 0x00 ); - fRegs[kFLL0A] = SimpleReg_t("FLL0A", 0x310A, 6, 0x00 ); - fRegs[kFLL0B] = SimpleReg_t("FLL0B", 0x310B, 6, 0x00 ); - fRegs[kFLL0C] = SimpleReg_t("FLL0C", 0x310C, 6, 0x00 ); - fRegs[kFLL0D] = SimpleReg_t("FLL0D", 0x310D, 6, 0x00 ); - fRegs[kFLL0E] = SimpleReg_t("FLL0E", 0x310E, 6, 0x00 ); - fRegs[kFLL0F] = SimpleReg_t("FLL0F", 0x310F, 6, 0x00 ); - fRegs[kFLL10] = SimpleReg_t("FLL10", 0x3110, 6, 0x00 ); - fRegs[kFLL11] = SimpleReg_t("FLL11", 0x3111, 6, 0x00 ); - fRegs[kFLL12] = SimpleReg_t("FLL12", 0x3112, 6, 0x00 ); - fRegs[kFLL13] = SimpleReg_t("FLL13", 0x3113, 6, 0x00 ); - fRegs[kFLL14] = SimpleReg_t("FLL14", 0x3114, 6, 0x00 ); - fRegs[kFLL15] = SimpleReg_t("FLL15", 0x3115, 6, 0x00 ); - fRegs[kFLL16] = SimpleReg_t("FLL16", 0x3116, 6, 0x00 ); - fRegs[kFLL17] = SimpleReg_t("FLL17", 0x3117, 6, 0x00 ); - fRegs[kFLL18] = SimpleReg_t("FLL18", 0x3118, 6, 0x00 ); - fRegs[kFLL19] = SimpleReg_t("FLL19", 0x3119, 6, 0x00 ); - fRegs[kFLL1A] = SimpleReg_t("FLL1A", 0x311A, 6, 0x00 ); - fRegs[kFLL1B] = SimpleReg_t("FLL1B", 0x311B, 6, 0x00 ); - fRegs[kFLL1C] = SimpleReg_t("FLL1C", 0x311C, 6, 0x00 ); - fRegs[kFLL1D] = SimpleReg_t("FLL1D", 0x311D, 6, 0x00 ); - fRegs[kFLL1E] = SimpleReg_t("FLL1E", 0x311E, 6, 0x00 ); - fRegs[kFLL1F] = SimpleReg_t("FLL1F", 0x311F, 6, 0x00 ); - fRegs[kFLL20] = SimpleReg_t("FLL20", 0x3120, 6, 0x00 ); - fRegs[kFLL21] = SimpleReg_t("FLL21", 0x3121, 6, 0x00 ); - fRegs[kFLL22] = SimpleReg_t("FLL22", 0x3122, 6, 0x00 ); - fRegs[kFLL23] = SimpleReg_t("FLL23", 0x3123, 6, 0x00 ); - fRegs[kFLL24] = SimpleReg_t("FLL24", 0x3124, 6, 0x00 ); - fRegs[kFLL25] = SimpleReg_t("FLL25", 0x3125, 6, 0x00 ); - fRegs[kFLL26] = SimpleReg_t("FLL26", 0x3126, 6, 0x00 ); - fRegs[kFLL27] = SimpleReg_t("FLL27", 0x3127, 6, 0x00 ); - fRegs[kFLL28] = SimpleReg_t("FLL28", 0x3128, 6, 0x00 ); - fRegs[kFLL29] = SimpleReg_t("FLL29", 0x3129, 6, 0x00 ); - fRegs[kFLL2A] = SimpleReg_t("FLL2A", 0x312A, 6, 0x00 ); - fRegs[kFLL2B] = SimpleReg_t("FLL2B", 0x312B, 6, 0x00 ); - fRegs[kFLL2C] = SimpleReg_t("FLL2C", 0x312C, 6, 0x00 ); - fRegs[kFLL2D] = SimpleReg_t("FLL2D", 0x312D, 6, 0x00 ); - fRegs[kFLL2E] = SimpleReg_t("FLL2E", 0x312E, 6, 0x00 ); - fRegs[kFLL2F] = SimpleReg_t("FLL2F", 0x312F, 6, 0x00 ); - fRegs[kFLL30] = SimpleReg_t("FLL30", 0x3130, 6, 0x00 ); - fRegs[kFLL31] = SimpleReg_t("FLL31", 0x3131, 6, 0x00 ); - fRegs[kFLL32] = SimpleReg_t("FLL32", 0x3132, 6, 0x00 ); - fRegs[kFLL33] = SimpleReg_t("FLL33", 0x3133, 6, 0x00 ); - fRegs[kFLL34] = SimpleReg_t("FLL34", 0x3134, 6, 0x00 ); - fRegs[kFLL35] = SimpleReg_t("FLL35", 0x3135, 6, 0x00 ); - fRegs[kFLL36] = SimpleReg_t("FLL36", 0x3136, 6, 0x00 ); - fRegs[kFLL37] = SimpleReg_t("FLL37", 0x3137, 6, 0x00 ); - fRegs[kFLL38] = SimpleReg_t("FLL38", 0x3138, 6, 0x00 ); - fRegs[kFLL39] = SimpleReg_t("FLL39", 0x3139, 6, 0x00 ); - fRegs[kFLL3A] = SimpleReg_t("FLL3A", 0x313A, 6, 0x00 ); - fRegs[kFLL3B] = SimpleReg_t("FLL3B", 0x313B, 6, 0x00 ); - fRegs[kFLL3C] = SimpleReg_t("FLL3C", 0x313C, 6, 0x00 ); - fRegs[kFLL3D] = SimpleReg_t("FLL3D", 0x313D, 6, 0x00 ); - fRegs[kFLL3E] = SimpleReg_t("FLL3E", 0x313E, 6, 0x00 ); - fRegs[kFLL3F] = SimpleReg_t("FLL3F", 0x313F, 6, 0x00 ); - fRegs[kPASADEL] = SimpleReg_t("PASADEL", 0x3158, 8, 0xFF ); // end of non-lin table - fRegs[kPASAPHA] = SimpleReg_t("PASAPHA", 0x3159, 6, 0x3F ); - fRegs[kPASAPRA] = SimpleReg_t("PASAPRA", 0x315A, 6, 0x0F ); - fRegs[kPASADAC] = SimpleReg_t("PASADAC", 0x315B, 8, 0x80 ); - fRegs[kPASACHM] = SimpleReg_t("PASACHM", 0x315C, 19, 0x7FFFF ); - fRegs[kPASASTL] = SimpleReg_t("PASASTL", 0x315D, 8, 0xFF ); - fRegs[kPASAPR1] = SimpleReg_t("PASAPR1", 0x315E, 1, 0x0 ); - fRegs[kPASAPR0] = SimpleReg_t("PASAPR0", 0x315F, 1, 0x0 ); - fRegs[kSADCTRG] = SimpleReg_t("SADCTRG", 0x3161, 1, 0x0 ); - fRegs[kSADCRUN] = SimpleReg_t("SADCRUN", 0x3162, 1, 0x0 ); - fRegs[kSADCPWR] = SimpleReg_t("SADCPWR", 0x3163, 3, 0x7 ); - fRegs[kL0TSIM] = SimpleReg_t("L0TSIM", 0x3165, 14, 0x0050 ); - fRegs[kSADCEC] = SimpleReg_t("SADCEC", 0x3166, 7, 0x00 ); - fRegs[kSADCMC] = SimpleReg_t("SADCMC", 0x3170, 8, 0xC0 ); - fRegs[kSADCOC] = SimpleReg_t("SADCOC", 0x3171, 8, 0x19 ); - fRegs[kSADCGTB] = SimpleReg_t("SADCGTB", 0x3172, 32, 0x37737700 ); - fRegs[kSEBDEN] = SimpleReg_t("SEBDEN", 0x3178, 3, 0x0 ); - fRegs[kSEBDOU] = SimpleReg_t("SEBDOU", 0x3179, 3, 0x0 ); - fRegs[kTPL00] = SimpleReg_t("TPL00", 0x3180, 5, 0x00 ); // pos table, 128 x 5 bits - fRegs[kTPL01] = SimpleReg_t("TPL01", 0x3181, 5, 0x00 ); - fRegs[kTPL02] = SimpleReg_t("TPL02", 0x3182, 5, 0x00 ); - fRegs[kTPL03] = SimpleReg_t("TPL03", 0x3183, 5, 0x00 ); - fRegs[kTPL04] = SimpleReg_t("TPL04", 0x3184, 5, 0x00 ); - fRegs[kTPL05] = SimpleReg_t("TPL05", 0x3185, 5, 0x00 ); - fRegs[kTPL06] = SimpleReg_t("TPL06", 0x3186, 5, 0x00 ); - fRegs[kTPL07] = SimpleReg_t("TPL07", 0x3187, 5, 0x00 ); - fRegs[kTPL08] = SimpleReg_t("TPL08", 0x3188, 5, 0x00 ); - fRegs[kTPL09] = SimpleReg_t("TPL09", 0x3189, 5, 0x00 ); - fRegs[kTPL0A] = SimpleReg_t("TPL0A", 0x318A, 5, 0x00 ); - fRegs[kTPL0B] = SimpleReg_t("TPL0B", 0x318B, 5, 0x00 ); - fRegs[kTPL0C] = SimpleReg_t("TPL0C", 0x318C, 5, 0x00 ); - fRegs[kTPL0D] = SimpleReg_t("TPL0D", 0x318D, 5, 0x00 ); - fRegs[kTPL0E] = SimpleReg_t("TPL0E", 0x318E, 5, 0x00 ); - fRegs[kTPL0F] = SimpleReg_t("TPL0F", 0x318F, 5, 0x00 ); - fRegs[kTPL10] = SimpleReg_t("TPL10", 0x3190, 5, 0x00 ); - fRegs[kTPL11] = SimpleReg_t("TPL11", 0x3191, 5, 0x00 ); - fRegs[kTPL12] = SimpleReg_t("TPL12", 0x3192, 5, 0x00 ); - fRegs[kTPL13] = SimpleReg_t("TPL13", 0x3193, 5, 0x00 ); - fRegs[kTPL14] = SimpleReg_t("TPL14", 0x3194, 5, 0x00 ); - fRegs[kTPL15] = SimpleReg_t("TPL15", 0x3195, 5, 0x00 ); - fRegs[kTPL16] = SimpleReg_t("TPL16", 0x3196, 5, 0x00 ); - fRegs[kTPL17] = SimpleReg_t("TPL17", 0x3197, 5, 0x00 ); - fRegs[kTPL18] = SimpleReg_t("TPL18", 0x3198, 5, 0x00 ); - fRegs[kTPL19] = SimpleReg_t("TPL19", 0x3199, 5, 0x00 ); - fRegs[kTPL1A] = SimpleReg_t("TPL1A", 0x319A, 5, 0x00 ); - fRegs[kTPL1B] = SimpleReg_t("TPL1B", 0x319B, 5, 0x00 ); - fRegs[kTPL1C] = SimpleReg_t("TPL1C", 0x319C, 5, 0x00 ); - fRegs[kTPL1D] = SimpleReg_t("TPL1D", 0x319D, 5, 0x00 ); - fRegs[kTPL1E] = SimpleReg_t("TPL1E", 0x319E, 5, 0x00 ); - fRegs[kTPL1F] = SimpleReg_t("TPL1F", 0x319F, 5, 0x00 ); - fRegs[kTPL20] = SimpleReg_t("TPL20", 0x31A0, 5, 0x00 ); - fRegs[kTPL21] = SimpleReg_t("TPL21", 0x31A1, 5, 0x00 ); - fRegs[kTPL22] = SimpleReg_t("TPL22", 0x31A2, 5, 0x00 ); - fRegs[kTPL23] = SimpleReg_t("TPL23", 0x31A3, 5, 0x00 ); - fRegs[kTPL24] = SimpleReg_t("TPL24", 0x31A4, 5, 0x00 ); - fRegs[kTPL25] = SimpleReg_t("TPL25", 0x31A5, 5, 0x00 ); - fRegs[kTPL26] = SimpleReg_t("TPL26", 0x31A6, 5, 0x00 ); - fRegs[kTPL27] = SimpleReg_t("TPL27", 0x31A7, 5, 0x00 ); - fRegs[kTPL28] = SimpleReg_t("TPL28", 0x31A8, 5, 0x00 ); - fRegs[kTPL29] = SimpleReg_t("TPL29", 0x31A9, 5, 0x00 ); - fRegs[kTPL2A] = SimpleReg_t("TPL2A", 0x31AA, 5, 0x00 ); - fRegs[kTPL2B] = SimpleReg_t("TPL2B", 0x31AB, 5, 0x00 ); - fRegs[kTPL2C] = SimpleReg_t("TPL2C", 0x31AC, 5, 0x00 ); - fRegs[kTPL2D] = SimpleReg_t("TPL2D", 0x31AD, 5, 0x00 ); - fRegs[kTPL2E] = SimpleReg_t("TPL2E", 0x31AE, 5, 0x00 ); - fRegs[kTPL2F] = SimpleReg_t("TPL2F", 0x31AF, 5, 0x00 ); - fRegs[kTPL30] = SimpleReg_t("TPL30", 0x31B0, 5, 0x00 ); - fRegs[kTPL31] = SimpleReg_t("TPL31", 0x31B1, 5, 0x00 ); - fRegs[kTPL32] = SimpleReg_t("TPL32", 0x31B2, 5, 0x00 ); - fRegs[kTPL33] = SimpleReg_t("TPL33", 0x31B3, 5, 0x00 ); - fRegs[kTPL34] = SimpleReg_t("TPL34", 0x31B4, 5, 0x00 ); - fRegs[kTPL35] = SimpleReg_t("TPL35", 0x31B5, 5, 0x00 ); - fRegs[kTPL36] = SimpleReg_t("TPL36", 0x31B6, 5, 0x00 ); - fRegs[kTPL37] = SimpleReg_t("TPL37", 0x31B7, 5, 0x00 ); - fRegs[kTPL38] = SimpleReg_t("TPL38", 0x31B8, 5, 0x00 ); - fRegs[kTPL39] = SimpleReg_t("TPL39", 0x31B9, 5, 0x00 ); - fRegs[kTPL3A] = SimpleReg_t("TPL3A", 0x31BA, 5, 0x00 ); - fRegs[kTPL3B] = SimpleReg_t("TPL3B", 0x31BB, 5, 0x00 ); - fRegs[kTPL3C] = SimpleReg_t("TPL3C", 0x31BC, 5, 0x00 ); - fRegs[kTPL3D] = SimpleReg_t("TPL3D", 0x31BD, 5, 0x00 ); - fRegs[kTPL3E] = SimpleReg_t("TPL3E", 0x31BE, 5, 0x00 ); - fRegs[kTPL3F] = SimpleReg_t("TPL3F", 0x31BF, 5, 0x00 ); - fRegs[kTPL40] = SimpleReg_t("TPL40", 0x31C0, 5, 0x00 ); - fRegs[kTPL41] = SimpleReg_t("TPL41", 0x31C1, 5, 0x00 ); - fRegs[kTPL42] = SimpleReg_t("TPL42", 0x31C2, 5, 0x00 ); - fRegs[kTPL43] = SimpleReg_t("TPL43", 0x31C3, 5, 0x00 ); - fRegs[kTPL44] = SimpleReg_t("TPL44", 0x31C4, 5, 0x00 ); - fRegs[kTPL45] = SimpleReg_t("TPL45", 0x31C5, 5, 0x00 ); - fRegs[kTPL46] = SimpleReg_t("TPL46", 0x31C6, 5, 0x00 ); - fRegs[kTPL47] = SimpleReg_t("TPL47", 0x31C7, 5, 0x00 ); - fRegs[kTPL48] = SimpleReg_t("TPL48", 0x31C8, 5, 0x00 ); - fRegs[kTPL49] = SimpleReg_t("TPL49", 0x31C9, 5, 0x00 ); - fRegs[kTPL4A] = SimpleReg_t("TPL4A", 0x31CA, 5, 0x00 ); - fRegs[kTPL4B] = SimpleReg_t("TPL4B", 0x31CB, 5, 0x00 ); - fRegs[kTPL4C] = SimpleReg_t("TPL4C", 0x31CC, 5, 0x00 ); - fRegs[kTPL4D] = SimpleReg_t("TPL4D", 0x31CD, 5, 0x00 ); - fRegs[kTPL4E] = SimpleReg_t("TPL4E", 0x31CE, 5, 0x00 ); - fRegs[kTPL4F] = SimpleReg_t("TPL4F", 0x31CF, 5, 0x00 ); - fRegs[kTPL50] = SimpleReg_t("TPL50", 0x31D0, 5, 0x00 ); - fRegs[kTPL51] = SimpleReg_t("TPL51", 0x31D1, 5, 0x00 ); - fRegs[kTPL52] = SimpleReg_t("TPL52", 0x31D2, 5, 0x00 ); - fRegs[kTPL53] = SimpleReg_t("TPL53", 0x31D3, 5, 0x00 ); - fRegs[kTPL54] = SimpleReg_t("TPL54", 0x31D4, 5, 0x00 ); - fRegs[kTPL55] = SimpleReg_t("TPL55", 0x31D5, 5, 0x00 ); - fRegs[kTPL56] = SimpleReg_t("TPL56", 0x31D6, 5, 0x00 ); - fRegs[kTPL57] = SimpleReg_t("TPL57", 0x31D7, 5, 0x00 ); - fRegs[kTPL58] = SimpleReg_t("TPL58", 0x31D8, 5, 0x00 ); - fRegs[kTPL59] = SimpleReg_t("TPL59", 0x31D9, 5, 0x00 ); - fRegs[kTPL5A] = SimpleReg_t("TPL5A", 0x31DA, 5, 0x00 ); - fRegs[kTPL5B] = SimpleReg_t("TPL5B", 0x31DB, 5, 0x00 ); - fRegs[kTPL5C] = SimpleReg_t("TPL5C", 0x31DC, 5, 0x00 ); - fRegs[kTPL5D] = SimpleReg_t("TPL5D", 0x31DD, 5, 0x00 ); - fRegs[kTPL5E] = SimpleReg_t("TPL5E", 0x31DE, 5, 0x00 ); - fRegs[kTPL5F] = SimpleReg_t("TPL5F", 0x31DF, 5, 0x00 ); - fRegs[kTPL60] = SimpleReg_t("TPL60", 0x31E0, 5, 0x00 ); - fRegs[kTPL61] = SimpleReg_t("TPL61", 0x31E1, 5, 0x00 ); - fRegs[kTPL62] = SimpleReg_t("TPL62", 0x31E2, 5, 0x00 ); - fRegs[kTPL63] = SimpleReg_t("TPL63", 0x31E3, 5, 0x00 ); - fRegs[kTPL64] = SimpleReg_t("TPL64", 0x31E4, 5, 0x00 ); - fRegs[kTPL65] = SimpleReg_t("TPL65", 0x31E5, 5, 0x00 ); - fRegs[kTPL66] = SimpleReg_t("TPL66", 0x31E6, 5, 0x00 ); - fRegs[kTPL67] = SimpleReg_t("TPL67", 0x31E7, 5, 0x00 ); - fRegs[kTPL68] = SimpleReg_t("TPL68", 0x31E8, 5, 0x00 ); - fRegs[kTPL69] = SimpleReg_t("TPL69", 0x31E9, 5, 0x00 ); - fRegs[kTPL6A] = SimpleReg_t("TPL6A", 0x31EA, 5, 0x00 ); - fRegs[kTPL6B] = SimpleReg_t("TPL6B", 0x31EB, 5, 0x00 ); - fRegs[kTPL6C] = SimpleReg_t("TPL6C", 0x31EC, 5, 0x00 ); - fRegs[kTPL6D] = SimpleReg_t("TPL6D", 0x31ED, 5, 0x00 ); - fRegs[kTPL6E] = SimpleReg_t("TPL6E", 0x31EE, 5, 0x00 ); - fRegs[kTPL6F] = SimpleReg_t("TPL6F", 0x31EF, 5, 0x00 ); - fRegs[kTPL70] = SimpleReg_t("TPL70", 0x31F0, 5, 0x00 ); - fRegs[kTPL71] = SimpleReg_t("TPL71", 0x31F1, 5, 0x00 ); - fRegs[kTPL72] = SimpleReg_t("TPL72", 0x31F2, 5, 0x00 ); - fRegs[kTPL73] = SimpleReg_t("TPL73", 0x31F3, 5, 0x00 ); - fRegs[kTPL74] = SimpleReg_t("TPL74", 0x31F4, 5, 0x00 ); - fRegs[kTPL75] = SimpleReg_t("TPL75", 0x31F5, 5, 0x00 ); - fRegs[kTPL76] = SimpleReg_t("TPL76", 0x31F6, 5, 0x00 ); - fRegs[kTPL77] = SimpleReg_t("TPL77", 0x31F7, 5, 0x00 ); - fRegs[kTPL78] = SimpleReg_t("TPL78", 0x31F8, 5, 0x00 ); - fRegs[kTPL79] = SimpleReg_t("TPL79", 0x31F9, 5, 0x00 ); - fRegs[kTPL7A] = SimpleReg_t("TPL7A", 0x31FA, 5, 0x00 ); - fRegs[kTPL7B] = SimpleReg_t("TPL7B", 0x31FB, 5, 0x00 ); - fRegs[kTPL7C] = SimpleReg_t("TPL7C", 0x31FC, 5, 0x00 ); - fRegs[kTPL7D] = SimpleReg_t("TPL7D", 0x31FD, 5, 0x00 ); - fRegs[kTPL7E] = SimpleReg_t("TPL7E", 0x31FE, 5, 0x00 ); - fRegs[kTPL7F] = SimpleReg_t("TPL7F", 0x31FF, 5, 0x00 ); - fRegs[kMEMRW] = SimpleReg_t("MEMRW", 0xD000, 7, 0x79 ); // end of pos table - fRegs[kMEMCOR] = SimpleReg_t("MEMCOR", 0xD001, 9, 0x000 ); - fRegs[kDMDELA] = SimpleReg_t("DMDELA", 0xD002, 4, 0x8 ); - fRegs[kDMDELS] = SimpleReg_t("DMDELS", 0xD003, 4, 0x8 ); - - InitRegs(); -} - - -AliTRDtrapConfig* AliTRDtrapConfig::Instance() -{ - // return a pointer to an instance of this class - - if (!fgInstance) { - fgInstance = new AliTRDtrapConfig(); - fgInstance->LoadConfig(); - } - - return fgInstance; -} - - -void AliTRDtrapConfig::InitRegs(void) -{ - // Reset the content of all TRAP registers to the reset values (see TRAP User Manual) - - for (Int_t iReg = 0; iReg < kLastReg; iReg++) { - - fRegisterValue[iReg].individualValue = 0x0; - - fRegisterValue[iReg].globalValue = GetRegResetValue((TrapReg_t) iReg); - fRegisterValue[iReg].state = RegValue_t::kGlobal; - } -} - -void AliTRDtrapConfig::ResetRegs(void) -{ - // Reset the content of all TRAP registers to the reset values (see TRAP User Manual) - - for (Int_t iReg = 0; iReg < kLastReg; iReg++) { - if(fRegisterValue[iReg].state == RegValue_t::kIndividual) { - if (fRegisterValue[iReg].individualValue) { - delete [] fRegisterValue[iReg].individualValue; - fRegisterValue[iReg].individualValue = 0x0; - } - } - - fRegisterValue[iReg].globalValue = GetRegResetValue((TrapReg_t) iReg); - fRegisterValue[iReg].state = RegValue_t::kGlobal; - // printf("%-8s: 0x%08x\n", GetRegName((TrapReg_t) iReg), fRegisterValue[iReg].globalValue); - } -} - - -Int_t AliTRDtrapConfig::GetTrapReg(TrapReg_t reg, Int_t det, Int_t rob, Int_t mcm) -{ - // get the value of an individual TRAP register - // if it is individual for TRAPs a valid TRAP has to be specified - - if ((reg < 0) || (reg >= kLastReg)) { - AliError("Non-existing register requested"); - return -1; - } - else { - if (fRegisterValue[reg].state == RegValue_t::kGlobal) { - return fRegisterValue[reg].globalValue; - } - else if (fRegisterValue[reg].state == RegValue_t::kIndividual) { - if((det >= 0 && det < AliTRDgeometry::Ndet()) && - (rob >= 0 && rob < AliTRDfeeParam::GetNrobC1()) && - (mcm >= 0 && mcm < fgkMaxMcm)) { - return fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm]; - } - else { - AliError("Invalid MCM specified or register is individual"); - return -1; - } - } - else { // should never be reached - AliError("MCM register status neither kGlobal nor kIndividual"); - return -1; - } - } - return -1; -} - - -Bool_t AliTRDtrapConfig::SetTrapReg(TrapReg_t reg, Int_t value) -{ - // set a global value for the given TRAP register, - // i.e. the same value for all TRAPs - - if (fRegisterValue[reg].state == RegValue_t::kGlobal) { - fRegisterValue[reg].globalValue = value; - return kTRUE; - } - else { - AliError("Register has individual values"); - } - return kFALSE; -} - - -Bool_t AliTRDtrapConfig::SetTrapReg(TrapReg_t reg, Int_t value, Int_t det) -{ - // set a global value for the given TRAP register, - // i.e. the same value for all TRAPs - - if (fRegisterValue[reg].state == RegValue_t::kGlobal) { - fRegisterValue[reg].globalValue = value; - return kTRUE; - } - else if (fRegisterValue[reg].state == RegValue_t::kIndividual) { - // if the register is in idividual mode but a broadcast is requested, the selected register is - // set to value for all MCMs on the chamber - - if( (det>=0 && det= 0 && det < AliTRDgeometry::Ndet()) && - (rob >= 0 && rob < AliTRDfeeParam::GetNrobC1()) && - (mcm >= 0 && mcm < fgkMaxMcm) ) { - if (fRegisterValue[reg].state == RegValue_t::kGlobal) { - Int_t defaultValue = fRegisterValue[reg].globalValue; - - fRegisterValue[reg].state = RegValue_t::kIndividual; - fRegisterValue[reg].individualValue = new Int_t[AliTRDgeometry::Ndet()*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm]; - - for(Int_t i = 0; i < AliTRDgeometry::Ndet()*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm; i++) - fRegisterValue[reg].individualValue[i] = defaultValue; // set the requested register of all MCMs to the value previously stored - - fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm] = value; - } - else if (fRegisterValue[reg].state == RegValue_t::kIndividual) { - fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm] = value; - } - else { // should never be reached - AliError("MCM register status neither kGlobal nor kIndividual"); - return kFALSE; - } - } - else { - AliError("Invalid value for det, ROB or MCM selected"); - return kFALSE; - } - - return kTRUE; -} - - -Bool_t AliTRDtrapConfig::LoadConfig() -{ - // load a set of TRAP register values (configuration) - // here a default set is implemented for testing - // for a detailed description of the registers see the TRAP manual - - // pedestal filter - SetTrapReg(kFPNP, 4*10); - SetTrapReg(kFPTC, 0); - SetTrapReg(kFPBY, 0); // bypassed! - - // gain filter - for (Int_t adc = 0; adc < 20; adc++) { - SetTrapReg(TrapReg_t(kFGA0+adc), 40); - SetTrapReg(TrapReg_t(kFGF0+adc), 15); - } - SetTrapReg(kFGTA, 20); - SetTrapReg(kFGTB, 2060); - SetTrapReg(kFGBY, 0); // bypassed! - - // tail cancellation - SetTrapReg(kFTAL, 267); - SetTrapReg(kFTLL, 356); - SetTrapReg(kFTLS, 387); - SetTrapReg(kFTBY, 0); - - // tracklet calculation - SetTrapReg(kTPQS0, 5); - SetTrapReg(kTPQE0, 10); - SetTrapReg(kTPQS1, 11); - SetTrapReg(kTPQE1, 20); - SetTrapReg(kTPFS, 5); - SetTrapReg(kTPFE, 20); - SetTrapReg(kTPVBY, 0); - SetTrapReg(kTPVT, 10); - SetTrapReg(kTPHT, 60); - SetTrapReg(kTPFP, 10); - SetTrapReg(kTPCL, 1); - SetTrapReg(kTPCT, 8); - - // event buffer - SetTrapReg(kEBSF, 1); // 0: store filtered; 1: store unfiltered - // zs applied to data stored in event buffer (sel. by EBSF) - SetTrapReg(kEBIS, 15 << 2); // single indicator threshold (plus two digits) - SetTrapReg(kEBIT, 30 << 2); // sum indicator threshold (plus two digits) - SetTrapReg(kEBIL, 0xf0); // lookup table - SetTrapReg(kEBIN, 0); // neighbour sensitivity - - // raw data - SetTrapReg(kNES, (0x0000 << 16) | 0x1000); - - return kTRUE; -} - - -Bool_t AliTRDtrapConfig::LoadConfig(Int_t det, TString filename) -{ - // load a TRAP configuration from a file - // The file format is the format created by the standalone - // command coder: scc / show_cfdat - // which are two tools to inspect/export configurations from wingDB - - ResetRegs(); // does not really make sense here??? - - std::ifstream infile; - infile.open(filename.Data(), std::ifstream::in); - if (!infile.is_open()) { - AliError("Can not open MCM configuration file"); - return kFALSE; - } - - Int_t cmd, extali, addr, data; - Int_t no; - char tmp; - - while(infile.good()) { - cmd=-1; - extali=-1; - addr=-1; - data=-1; - infile >> std::skipws >> no >> tmp >> cmd >> extali >> addr >> data; - // std::cout << "no: " << no << ", cmd " << cmd << ", extali " << extali << ", addr " << addr << ", data " << data << endl; - - if(cmd!=-1 && extali!=-1 && addr != -1 && data!= -1) { - AddValues(det, cmd, extali, addr, data); - } - else if(!infile.eof() && !infile.good()) { - infile.clear(); - infile.ignore(256, '\n'); - } - - if(!infile.eof()) - infile.clear(); - } - - infile.close(); - - return kTRUE; -} - - -Bool_t AliTRDtrapConfig::PrintTrapReg(TrapReg_t reg, Int_t det, Int_t rob, Int_t mcm) -{ - // print the value stored in the given register - // if it is individual a valid MCM has to be specified - - if (fRegisterValue[reg].state == RegValue_t::kGlobal) { - printf("%s (%i bits) at 0x%08x is 0x%08x and resets to: 0x%08x (currently global mode)\n", - GetRegName((TrapReg_t) reg), - GetRegNBits((TrapReg_t) reg), - GetRegAddress((TrapReg_t) reg), - fRegisterValue[reg].globalValue, - GetRegResetValue((TrapReg_t) reg)); - } - else if (fRegisterValue[reg].state == RegValue_t::kIndividual) { - if((det >= 0 && det < AliTRDgeometry::Ndet()) && - (rob >= 0 && rob < AliTRDfeeParam::GetNrobC1()) && - (mcm >= 0 && mcm < fgkMaxMcm)) { - printf("%s (%i bits) at 0x%08x is 0x%08x and resets to: 0x%08x (currently individual mode)\n", - GetRegName((TrapReg_t) reg), - GetRegNBits((TrapReg_t) reg), - GetRegAddress((TrapReg_t) reg), - fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm], - GetRegResetValue((TrapReg_t) reg)); - } - else { - AliError("Register value is MCM-specific: Invalid detector, ROB or MCM requested"); - return kFALSE; - } - } - else { // should never be reached - AliError("MCM register status neither kGlobal nor kIndividual"); - return kFALSE; - } - return kTRUE; -} - - -Bool_t AliTRDtrapConfig::PrintTrapAddr(Int_t addr, Int_t det, Int_t rob, Int_t mcm) -{ - // print the value stored at the given address in the MCM chip - TrapReg_t reg = GetRegByAddress(addr); - if (reg >= 0 && reg < kLastReg) { - return PrintTrapReg(reg, det, rob, mcm); - } - else { - AliError(Form("There is no register at address 0x%08x in the simulator", addr)); - return kFALSE; - } -} - - -Bool_t AliTRDtrapConfig::AddValues(UInt_t det, UInt_t cmd, UInt_t extali, UInt_t addr, UInt_t data) -{ - // transfer the informations provided by LoadConfig to the internal class variables - - if(cmd != fgkScsnCmdWrite) { - AliError(Form("Invalid command received: %i", cmd)); - return kFALSE; - } - - TrapReg_t mcmReg = GetRegByAddress(addr); - - if(mcmReg >= 0 && mcmReg < kLastReg) { - Int_t rocType = AliTRDgeometry::GetStack(det) == 2 ? 0 : 1; - - for(Int_t linkPair=0; linkPair>7), (fMcmlist[i]&0x7F)); - i++; - } - } - } - return kTRUE; - } - else - return kFALSE; -} - - -Int_t AliTRDtrapConfig::ExtAliToAli( UInt_t dest, UShort_t linkpair, UShort_t rocType) -{ - // Converts an extended ALICE ID which identifies a single MCM or a group of MCMs to - // the corresponding list of MCMs. Only broadcasts (127) are encoded as 127 - // The return value is the number of MCMs in the list - - fMcmlist[0]=-1; - - Short_t nmcm = 0; - UInt_t mcm, rob, robAB; - UInt_t cmA = 0, cmB = 0; // Chipmask for each A and B side - - // Default chipmask for 4 linkpairs (each bit correponds each alice-mcm) - static const UInt_t gkChipmaskDefLp[4] = { 0x1FFFF, 0x1FFFF, 0x3FFFF, 0x1FFFF }; - - rob = dest >> 7; // Extract ROB pattern from dest. - mcm = dest & 0x07F; // Extract MCM pattern from dest. - robAB = GetRobAB( rob, linkpair ); // Get which ROB sides are selected. - - // Abort if no ROB is selected - if( robAB == 0 ) { - return 0; - } - - // Special case - if( mcm == 127 ) { - if( robAB == 3 ) { // This is very special 127 can stay only if two ROBs are selected - fMcmlist[0]=127; // broadcase to ALL - fMcmlist[1]=-1; - return 1; - } - cmA = cmB = 0x3FFFF; - } else if( (mcm & 0x40) != 0 ) { // If top bit is 1 but not 127, this is chip group. - if( (mcm & 0x01) != 0 ) { cmA |= 0x04444; cmB |= 0x04444; } // chip_cmrg - if( (mcm & 0x02) != 0 ) { cmA |= 0x10000; cmB |= 0x10000; } // chip_bmrg - if( (mcm & 0x04) != 0 && rocType == 0 ) { cmA |= 0x20000; cmB |= 0x20000; } // chip_hm3 - if( (mcm & 0x08) != 0 && rocType == 1 ) { cmA |= 0x20000; cmB |= 0x20000; } // chip_hm4 - if( (mcm & 0x10) != 0 ) { cmA |= 0x01111; cmB |= 0x08888; } // chip_edge - if( (mcm & 0x20) != 0 ) { cmA |= 0x0aaaa; cmB |= 0x03333; } // chip_norm - } else { // Otherwise, this is normal chip ID, turn on only one chip. - cmA = 1 << mcm; - cmB = 1 << mcm; - } - - // Mask non-existing MCMs - cmA &= gkChipmaskDefLp[linkpair]; - cmB &= gkChipmaskDefLp[linkpair]; - // Remove if only one side is selected - if( robAB == 1 ) - cmB = 0; - if( robAB == 2 ) - cmA = 0; - if( robAB == 4 && linkpair != 2 ) - cmA = cmB = 0; // Restrict to only T3A and T3B - - // Finally convert chipmask to list of slaves - nmcm = ChipmaskToMCMlist( cmA, cmB, linkpair ); - - return nmcm; -} - - -Short_t AliTRDtrapConfig::GetRobAB( UShort_t robsel, UShort_t linkpair ) const -{ - // Converts the ROB part of the extended ALICE ID to robs - - if( (robsel & 0x8) != 0 ) { // 1000 .. direct ROB selection. Only one of the 8 ROBs are used. - robsel = robsel & 7; - if( (robsel % 2) == 0 && (robsel / 2) == linkpair ) - return 1; // Even means A side (position 0,2,4,6) - if( (robsel % 2) == 1 && (robsel / 2) == linkpair ) - return 2; // Odd means B side (position 1,3,5,7) - return 0; - } - - // ROB group - if( robsel == 0 ) { return 3; } // Both ROB - if( robsel == 1 ) { return 1; } // A-side ROB - if( robsel == 2 ) { return 2; } // B-side ROB - if( robsel == 3 ) { return 3; } // Both ROB - if( robsel == 4 ) { return 4; } // Only T3A and T3B - // Other number 5 to 7 are ignored (not defined) - - return 0; -} - - -Short_t AliTRDtrapConfig::ChipmaskToMCMlist( Int_t cmA, Int_t cmB, UShort_t linkpair ) -{ - // Converts the chipmask to a list of MCMs - - Short_t nmcm = 0; - Short_t i; - for( i = 0 ; i < fgkMaxMcm ; i++ ) { - if( (cmA & (1 << i)) != 0 ) { - fMcmlist[nmcm] = ((linkpair*2) << 7) | i; - ++nmcm; - } - if( (cmB & (1 << i)) != 0 ) { - fMcmlist[nmcm] = ((linkpair*2+1) << 7) | i; - ++nmcm; - } - } - - fMcmlist[nmcm]=-1; - return nmcm; -} - - -AliTRDtrapConfig::TrapReg_t AliTRDtrapConfig::GetRegByAddress(Int_t address) const -{ +#include "AliLog.h" + +#include "AliTRDgeometry.h" +#include "AliTRDfeeParam.h" +#include "AliTRDtrapConfig.h" + +#include +#include +#include + +ClassImp(AliTRDtrapConfig) + +AliTRDtrapConfig* AliTRDtrapConfig::fgInstance = 0x0; +const Int_t AliTRDtrapConfig::fgkMaxMcm = AliTRDfeeParam::GetNmcmRob() + 2; +const Int_t AliTRDtrapConfig::fgkDmemStartAddress = 0xc000; + +AliTRDtrapConfig::AliTRDtrapConfig() : + TObject() +{ + // default constructor, initializing array of TRAP registers + + // Name Address Nbits Reset Value + fRegs[kSML0] = SimpleReg_t("SML0", 0x0A00, 15, 0x4050 ); // Global state machine + fRegs[kSML1] = SimpleReg_t("SML1", 0x0A01, 15, 0x4200 ); + fRegs[kSML2] = SimpleReg_t("SML2", 0x0A02, 15, 0x4384 ); + fRegs[kSMMODE] = SimpleReg_t("SMMODE", 0x0A03, 16, 0xF0E2 ); + fRegs[kNITM0] = SimpleReg_t("NITM0", 0x0A08, 14, 0x3FFF ); + fRegs[kNITM1] = SimpleReg_t("NITM1", 0x0A09, 14, 0x3FFF ); + fRegs[kNITM2] = SimpleReg_t("NITM2", 0x0A0A, 14, 0x3FFF ); + fRegs[kNIP4D] = SimpleReg_t("NIP4D", 0x0A0B, 7, 0x7F ); + fRegs[kCPU0CLK] = SimpleReg_t("CPU0CLK", 0x0A20, 5, 0x07 ); + fRegs[kCPU1CLK] = SimpleReg_t("CPU1CLK", 0x0A22, 5, 0x07 ); + fRegs[kCPU2CLK] = SimpleReg_t("CPU2CLK", 0x0A24, 5, 0x07 ); + fRegs[kCPU3CLK] = SimpleReg_t("CPU3CLK", 0x0A26, 5, 0x07 ); + fRegs[kNICLK] = SimpleReg_t("NICLK", 0x0A28, 5, 0x07 ); + fRegs[kFILCLK] = SimpleReg_t("FILCLK", 0x0A2A, 5, 0x07 ); + fRegs[kPRECLK] = SimpleReg_t("PRECLK", 0x0A2C, 5, 0x07 ); + fRegs[kADCEN] = SimpleReg_t("ADCEN", 0x0A2E, 5, 0x07 ); + fRegs[kNIODE] = SimpleReg_t("NIODE", 0x0A30, 5, 0x07 ); + fRegs[kNIOCE] = SimpleReg_t("NIOCE", 0x0A32, 6, 0x21 ); // bit 5 is status bit (read-only)! + fRegs[kNIIDE] = SimpleReg_t("NIIDE", 0x0A34, 5, 0x07 ); + fRegs[kNIICE] = SimpleReg_t("NIICE", 0x0A36, 5, 0x07 ); + fRegs[kARBTIM] = SimpleReg_t("ARBTIM", 0x0A3F, 4, 0x0 ); // Arbiter + fRegs[kIA0IRQ0] = SimpleReg_t("IA0IRQ0", 0x0B00, 12, 0x000 ); // IVT of CPU0 + fRegs[kIA0IRQ1] = SimpleReg_t("IA0IRQ1", 0x0B01, 12, 0x000 ); + fRegs[kIA0IRQ2] = SimpleReg_t("IA0IRQ2", 0x0B02, 12, 0x000 ); + fRegs[kIA0IRQ3] = SimpleReg_t("IA0IRQ3", 0x0B03, 12, 0x000 ); + fRegs[kIA0IRQ4] = SimpleReg_t("IA0IRQ4", 0x0B04, 12, 0x000 ); + fRegs[kIA0IRQ5] = SimpleReg_t("IA0IRQ5", 0x0B05, 12, 0x000 ); + fRegs[kIA0IRQ6] = SimpleReg_t("IA0IRQ6", 0x0B06, 12, 0x000 ); + fRegs[kIA0IRQ7] = SimpleReg_t("IA0IRQ7", 0x0B07, 12, 0x000 ); + fRegs[kIA0IRQ8] = SimpleReg_t("IA0IRQ8", 0x0B08, 12, 0x000 ); + fRegs[kIA0IRQ9] = SimpleReg_t("IA0IRQ9", 0x0B09, 12, 0x000 ); + fRegs[kIA0IRQA] = SimpleReg_t("IA0IRQA", 0x0B0A, 12, 0x000 ); + fRegs[kIA0IRQB] = SimpleReg_t("IA0IRQB", 0x0B0B, 12, 0x000 ); + fRegs[kIA0IRQC] = SimpleReg_t("IA0IRQC", 0x0B0C, 12, 0x000 ); + fRegs[kIRQSW0] = SimpleReg_t("IRQSW0", 0x0B0D, 13, 0x1FFF ); + fRegs[kIRQHW0] = SimpleReg_t("IRQHW0", 0x0B0E, 13, 0x0000 ); + fRegs[kIRQHL0] = SimpleReg_t("IRQHL0", 0x0B0F, 13, 0x0000 ); + fRegs[kIA1IRQ0] = SimpleReg_t("IA1IRQ0", 0x0B20, 12, 0x000 ); // IVT of CPU1 + fRegs[kIA1IRQ1] = SimpleReg_t("IA1IRQ1", 0x0B21, 12, 0x000 ); + fRegs[kIA1IRQ2] = SimpleReg_t("IA1IRQ2", 0x0B22, 12, 0x000 ); + fRegs[kIA1IRQ3] = SimpleReg_t("IA1IRQ3", 0x0B23, 12, 0x000 ); + fRegs[kIA1IRQ4] = SimpleReg_t("IA1IRQ4", 0x0B24, 12, 0x000 ); + fRegs[kIA1IRQ5] = SimpleReg_t("IA1IRQ5", 0x0B25, 12, 0x000 ); + fRegs[kIA1IRQ6] = SimpleReg_t("IA1IRQ6", 0x0B26, 12, 0x000 ); + fRegs[kIA1IRQ7] = SimpleReg_t("IA1IRQ7", 0x0B27, 12, 0x000 ); + fRegs[kIA1IRQ8] = SimpleReg_t("IA1IRQ8", 0x0B28, 12, 0x000 ); + fRegs[kIA1IRQ9] = SimpleReg_t("IA1IRQ9", 0x0B29, 12, 0x000 ); + fRegs[kIA1IRQA] = SimpleReg_t("IA1IRQA", 0x0B2A, 12, 0x000 ); + fRegs[kIA1IRQB] = SimpleReg_t("IA1IRQB", 0x0B2B, 12, 0x000 ); + fRegs[kIA1IRQC] = SimpleReg_t("IA1IRQC", 0x0B2C, 12, 0x000 ); + fRegs[kIRQSW1] = SimpleReg_t("IRQSW1", 0x0B2D, 13, 0x1FFF ); + fRegs[kIRQHW1] = SimpleReg_t("IRQHW1", 0x0B2E, 13, 0x0000 ); + fRegs[kIRQHL1] = SimpleReg_t("IRQHL1", 0x0B2F, 13, 0x0000 ); + fRegs[kIA2IRQ0] = SimpleReg_t("IA2IRQ0", 0x0B40, 12, 0x000 ); // IVT of CPU2 + fRegs[kIA2IRQ1] = SimpleReg_t("IA2IRQ1", 0x0B41, 12, 0x000 ); + fRegs[kIA2IRQ2] = SimpleReg_t("IA2IRQ2", 0x0B42, 12, 0x000 ); + fRegs[kIA2IRQ3] = SimpleReg_t("IA2IRQ3", 0x0B43, 12, 0x000 ); + fRegs[kIA2IRQ4] = SimpleReg_t("IA2IRQ4", 0x0B44, 12, 0x000 ); + fRegs[kIA2IRQ5] = SimpleReg_t("IA2IRQ5", 0x0B45, 12, 0x000 ); + fRegs[kIA2IRQ6] = SimpleReg_t("IA2IRQ6", 0x0B46, 12, 0x000 ); + fRegs[kIA2IRQ7] = SimpleReg_t("IA2IRQ7", 0x0B47, 12, 0x000 ); + fRegs[kIA2IRQ8] = SimpleReg_t("IA2IRQ8", 0x0B48, 12, 0x000 ); + fRegs[kIA2IRQ9] = SimpleReg_t("IA2IRQ9", 0x0B49, 12, 0x000 ); + fRegs[kIA2IRQA] = SimpleReg_t("IA2IRQA", 0x0B4A, 12, 0x000 ); + fRegs[kIA2IRQB] = SimpleReg_t("IA2IRQB", 0x0B4B, 12, 0x000 ); + fRegs[kIA2IRQC] = SimpleReg_t("IA2IRQC", 0x0B4C, 12, 0x000 ); + fRegs[kIRQSW2] = SimpleReg_t("IRQSW2", 0x0B4D, 13, 0x1FFF ); + fRegs[kIRQHW2] = SimpleReg_t("IRQHW2", 0x0B4E, 13, 0x0000 ); + fRegs[kIRQHL2] = SimpleReg_t("IRQHL2", 0x0B4F, 13, 0x0000 ); + fRegs[kIA3IRQ0] = SimpleReg_t("IA3IRQ0", 0x0B60, 12, 0x000 ); // IVT of CPU3 + fRegs[kIA3IRQ1] = SimpleReg_t("IA3IRQ1", 0x0B61, 12, 0x000 ); + fRegs[kIA3IRQ2] = SimpleReg_t("IA3IRQ2", 0x0B62, 12, 0x000 ); + fRegs[kIA3IRQ3] = SimpleReg_t("IA3IRQ3", 0x0B63, 12, 0x000 ); + fRegs[kIA3IRQ4] = SimpleReg_t("IA3IRQ4", 0x0B64, 12, 0x000 ); + fRegs[kIA3IRQ5] = SimpleReg_t("IA3IRQ5", 0x0B65, 12, 0x000 ); + fRegs[kIA3IRQ6] = SimpleReg_t("IA3IRQ6", 0x0B66, 12, 0x000 ); + fRegs[kIA3IRQ7] = SimpleReg_t("IA3IRQ7", 0x0B67, 12, 0x000 ); + fRegs[kIA3IRQ8] = SimpleReg_t("IA3IRQ8", 0x0B68, 12, 0x000 ); + fRegs[kIA3IRQ9] = SimpleReg_t("IA3IRQ9", 0x0B69, 12, 0x000 ); + fRegs[kIA3IRQA] = SimpleReg_t("IA3IRQA", 0x0B6A, 12, 0x000 ); + fRegs[kIA3IRQB] = SimpleReg_t("IA3IRQB", 0x0B6B, 12, 0x000 ); + fRegs[kIA3IRQC] = SimpleReg_t("IA3IRQC", 0x0B6C, 12, 0x000 ); + fRegs[kIRQSW3] = SimpleReg_t("IRQSW3", 0x0B6D, 13, 0x1FFF ); + fRegs[kIRQHW3] = SimpleReg_t("IRQHW3", 0x0B6E, 13, 0x0000 ); + fRegs[kIRQHL3] = SimpleReg_t("IRQHL3", 0x0B6F, 13, 0x0000 ); + fRegs[kCTGDINI] = SimpleReg_t("CTGDINI", 0x0B80, 32, 0x00000000 ); // Global Counter/Timer + fRegs[kCTGCTRL] = SimpleReg_t("CTGCTRL", 0x0B81, 12, 0xE3F ); + fRegs[kC08CPU0] = SimpleReg_t("C08CPU0", 0x0C00, 32, 0x00000000 ); // CPU constants + fRegs[kC09CPU0] = SimpleReg_t("C09CPU0", 0x0C01, 32, 0x00000000 ); + fRegs[kC10CPU0] = SimpleReg_t("C10CPU0", 0x0C02, 32, 0x00000000 ); + fRegs[kC11CPU0] = SimpleReg_t("C11CPU0", 0x0C03, 32, 0x00000000 ); + fRegs[kC12CPUA] = SimpleReg_t("C12CPUA", 0x0C04, 32, 0x00000000 ); + fRegs[kC13CPUA] = SimpleReg_t("C13CPUA", 0x0C05, 32, 0x00000000 ); + fRegs[kC14CPUA] = SimpleReg_t("C14CPUA", 0x0C06, 32, 0x00000000 ); + fRegs[kC15CPUA] = SimpleReg_t("C15CPUA", 0x0C07, 32, 0x00000000 ); + fRegs[kC08CPU1] = SimpleReg_t("C08CPU1", 0x0C08, 32, 0x00000000 ); + fRegs[kC09CPU1] = SimpleReg_t("C09CPU1", 0x0C09, 32, 0x00000000 ); + fRegs[kC10CPU1] = SimpleReg_t("C10CPU1", 0x0C0A, 32, 0x00000000 ); + fRegs[kC11CPU1] = SimpleReg_t("C11CPU1", 0x0C0B, 32, 0x00000000 ); + fRegs[kC08CPU2] = SimpleReg_t("C08CPU2", 0x0C10, 32, 0x00000000 ); + fRegs[kC09CPU2] = SimpleReg_t("C09CPU2", 0x0C11, 32, 0x00000000 ); + fRegs[kC10CPU2] = SimpleReg_t("C10CPU2", 0x0C12, 32, 0x00000000 ); + fRegs[kC11CPU2] = SimpleReg_t("C11CPU2", 0x0C13, 32, 0x00000000 ); + fRegs[kC08CPU3] = SimpleReg_t("C08CPU3", 0x0C18, 32, 0x00000000 ); + fRegs[kC09CPU3] = SimpleReg_t("C09CPU3", 0x0C19, 32, 0x00000000 ); + fRegs[kC10CPU3] = SimpleReg_t("C10CPU3", 0x0C1A, 32, 0x00000000 ); + fRegs[kC11CPU3] = SimpleReg_t("C11CPU3", 0x0C1B, 32, 0x00000000 ); + fRegs[kNMOD] = SimpleReg_t("NMOD", 0x0D40, 6, 0x08 ); // NI interface + fRegs[kNDLY] = SimpleReg_t("NDLY", 0x0D41, 30, 0x24924924 ); + fRegs[kNED] = SimpleReg_t("NED", 0x0D42, 16, 0xA240 ); + fRegs[kNTRO] = SimpleReg_t("NTRO", 0x0D43, 18, 0x3FFFC ); + fRegs[kNRRO] = SimpleReg_t("NRRO", 0x0D44, 18, 0x3FFFC ); + fRegs[kNES] = SimpleReg_t("NES", 0x0D45, 32, 0x00000000 ); + fRegs[kNTP] = SimpleReg_t("NTP", 0x0D46, 32, 0x0000FFFF ); + fRegs[kNBND] = SimpleReg_t("NBND", 0x0D47, 16, 0x6020 ); + fRegs[kNP0] = SimpleReg_t("NP0", 0x0D48, 11, 0x44C ); + fRegs[kNP1] = SimpleReg_t("NP1", 0x0D49, 11, 0x44C ); + fRegs[kNP2] = SimpleReg_t("NP2", 0x0D4A, 11, 0x44C ); + fRegs[kNP3] = SimpleReg_t("NP3", 0x0D4B, 11, 0x44C ); + fRegs[kNCUT] = SimpleReg_t("NCUT", 0x0D4C, 32, 0xFFFFFFFF ); + fRegs[kTPPT0] = SimpleReg_t("TPPT0", 0x3000, 7, 0x01 ); // Filter and Preprocessor + fRegs[kTPFS] = SimpleReg_t("TPFS", 0x3001, 7, 0x05 ); + fRegs[kTPFE] = SimpleReg_t("TPFE", 0x3002, 7, 0x14 ); + fRegs[kTPPGR] = SimpleReg_t("TPPGR", 0x3003, 7, 0x15 ); + fRegs[kTPPAE] = SimpleReg_t("TPPAE", 0x3004, 7, 0x1E ); + fRegs[kTPQS0] = SimpleReg_t("TPQS0", 0x3005, 7, 0x00 ); + fRegs[kTPQE0] = SimpleReg_t("TPQE0", 0x3006, 7, 0x0A ); + fRegs[kTPQS1] = SimpleReg_t("TPQS1", 0x3007, 7, 0x0B ); + fRegs[kTPQE1] = SimpleReg_t("TPQE1", 0x3008, 7, 0x14 ); + fRegs[kEBD] = SimpleReg_t("EBD", 0x3009, 3, 0x0 ); + fRegs[kEBAQA] = SimpleReg_t("EBAQA", 0x300A, 7, 0x00 ); + fRegs[kEBSIA] = SimpleReg_t("EBSIA", 0x300B, 7, 0x20 ); + fRegs[kEBSF] = SimpleReg_t("EBSF", 0x300C, 1, 0x1 ); + fRegs[kEBSIM] = SimpleReg_t("EBSIM", 0x300D, 1, 0x1 ); + fRegs[kEBPP] = SimpleReg_t("EBPP", 0x300E, 1, 0x1 ); + fRegs[kEBPC] = SimpleReg_t("EBPC", 0x300F, 1, 0x1 ); + fRegs[kEBIS] = SimpleReg_t("EBIS", 0x3014, 10, 0x005 ); + fRegs[kEBIT] = SimpleReg_t("EBIT", 0x3015, 12, 0x028 ); + fRegs[kEBIL] = SimpleReg_t("EBIL", 0x3016, 8, 0xF0 ); + fRegs[kEBIN] = SimpleReg_t("EBIN", 0x3017, 1, 0x1 ); + fRegs[kFLBY] = SimpleReg_t("FLBY", 0x3018, 1, 0x0 ); + fRegs[kFPBY] = SimpleReg_t("FPBY", 0x3019, 1, 0x0 ); + fRegs[kFGBY] = SimpleReg_t("FGBY", 0x301A, 1, 0x0 ); + fRegs[kFTBY] = SimpleReg_t("FTBY", 0x301B, 1, 0x0 ); + fRegs[kFCBY] = SimpleReg_t("FCBY", 0x301C, 1, 0x0 ); + fRegs[kFPTC] = SimpleReg_t("FPTC", 0x3020, 2, 0x3 ); + fRegs[kFPNP] = SimpleReg_t("FPNP", 0x3021, 9, 0x078 ); + fRegs[kFPCL] = SimpleReg_t("FPCL", 0x3022, 1, 0x1 ); + fRegs[kFGTA] = SimpleReg_t("FGTA", 0x3028, 12, 0x014 ); + fRegs[kFGTB] = SimpleReg_t("FGTB", 0x3029, 12, 0x80C ); + fRegs[kFGCL] = SimpleReg_t("FGCL", 0x302A, 1, 0x1 ); + fRegs[kFTAL] = SimpleReg_t("FTAL", 0x3030, 10, 0x0F6 ); + fRegs[kFTLL] = SimpleReg_t("FTLL", 0x3031, 9, 0x11D ); + fRegs[kFTLS] = SimpleReg_t("FTLS", 0x3032, 9, 0x0D3 ); + fRegs[kFCW1] = SimpleReg_t("FCW1", 0x3038, 8, 0x1E ); + fRegs[kFCW2] = SimpleReg_t("FCW2", 0x3039, 8, 0xD4 ); + fRegs[kFCW3] = SimpleReg_t("FCW3", 0x303A, 8, 0xE6 ); + fRegs[kFCW4] = SimpleReg_t("FCW4", 0x303B, 8, 0x4A ); + fRegs[kFCW5] = SimpleReg_t("FCW5", 0x303C, 8, 0xEF ); + fRegs[kTPFP] = SimpleReg_t("TPFP", 0x3040, 9, 0x037 ); + fRegs[kTPHT] = SimpleReg_t("TPHT", 0x3041, 14, 0x00A0 ); + fRegs[kTPVT] = SimpleReg_t("TPVT", 0x3042, 6, 0x00 ); + fRegs[kTPVBY] = SimpleReg_t("TPVBY", 0x3043, 1, 0x0 ); + fRegs[kTPCT] = SimpleReg_t("TPCT", 0x3044, 5, 0x08 ); + fRegs[kTPCL] = SimpleReg_t("TPCL", 0x3045, 5, 0x01 ); + fRegs[kTPCBY] = SimpleReg_t("TPCBY", 0x3046, 1, 0x1 ); + fRegs[kTPD] = SimpleReg_t("TPD", 0x3047, 4, 0xF ); + fRegs[kTPCI0] = SimpleReg_t("TPCI0", 0x3048, 5, 0x00 ); + fRegs[kTPCI1] = SimpleReg_t("TPCI1", 0x3049, 5, 0x00 ); + fRegs[kTPCI2] = SimpleReg_t("TPCI2", 0x304A, 5, 0x00 ); + fRegs[kTPCI3] = SimpleReg_t("TPCI3", 0x304B, 5, 0x00 ); + fRegs[kADCMSK] = SimpleReg_t("ADCMSK", 0x3050, 21, 0x1FFFFF ); + fRegs[kADCINB] = SimpleReg_t("ADCINB", 0x3051, 2, 0x2 ); + fRegs[kADCDAC] = SimpleReg_t("ADCDAC", 0x3052, 5, 0x10 ); + fRegs[kADCPAR] = SimpleReg_t("ADCPAR", 0x3053, 18, 0x195EF ); + fRegs[kADCTST] = SimpleReg_t("ADCTST", 0x3054, 2, 0x0 ); + fRegs[kSADCAZ] = SimpleReg_t("SADCAZ", 0x3055, 1, 0x1 ); + fRegs[kFGF0] = SimpleReg_t("FGF0", 0x3080, 9, 0x000 ); + fRegs[kFGF1] = SimpleReg_t("FGF1", 0x3081, 9, 0x000 ); + fRegs[kFGF2] = SimpleReg_t("FGF2", 0x3082, 9, 0x000 ); + fRegs[kFGF3] = SimpleReg_t("FGF3", 0x3083, 9, 0x000 ); + fRegs[kFGF4] = SimpleReg_t("FGF4", 0x3084, 9, 0x000 ); + fRegs[kFGF5] = SimpleReg_t("FGF5", 0x3085, 9, 0x000 ); + fRegs[kFGF6] = SimpleReg_t("FGF6", 0x3086, 9, 0x000 ); + fRegs[kFGF7] = SimpleReg_t("FGF7", 0x3087, 9, 0x000 ); + fRegs[kFGF8] = SimpleReg_t("FGF8", 0x3088, 9, 0x000 ); + fRegs[kFGF9] = SimpleReg_t("FGF9", 0x3089, 9, 0x000 ); + fRegs[kFGF10] = SimpleReg_t("FGF10", 0x308A, 9, 0x000 ); + fRegs[kFGF11] = SimpleReg_t("FGF11", 0x308B, 9, 0x000 ); + fRegs[kFGF12] = SimpleReg_t("FGF12", 0x308C, 9, 0x000 ); + fRegs[kFGF13] = SimpleReg_t("FGF13", 0x308D, 9, 0x000 ); + fRegs[kFGF14] = SimpleReg_t("FGF14", 0x308E, 9, 0x000 ); + fRegs[kFGF15] = SimpleReg_t("FGF15", 0x308F, 9, 0x000 ); + fRegs[kFGF16] = SimpleReg_t("FGF16", 0x3090, 9, 0x000 ); + fRegs[kFGF17] = SimpleReg_t("FGF17", 0x3091, 9, 0x000 ); + fRegs[kFGF18] = SimpleReg_t("FGF18", 0x3092, 9, 0x000 ); + fRegs[kFGF19] = SimpleReg_t("FGF19", 0x3093, 9, 0x000 ); + fRegs[kFGF20] = SimpleReg_t("FGF20", 0x3094, 9, 0x000 ); + fRegs[kFGA0] = SimpleReg_t("FGA0", 0x30A0, 6, 0x00 ); + fRegs[kFGA1] = SimpleReg_t("FGA1", 0x30A1, 6, 0x00 ); + fRegs[kFGA2] = SimpleReg_t("FGA2", 0x30A2, 6, 0x00 ); + fRegs[kFGA3] = SimpleReg_t("FGA3", 0x30A3, 6, 0x00 ); + fRegs[kFGA4] = SimpleReg_t("FGA4", 0x30A4, 6, 0x00 ); + fRegs[kFGA5] = SimpleReg_t("FGA5", 0x30A5, 6, 0x00 ); + fRegs[kFGA6] = SimpleReg_t("FGA6", 0x30A6, 6, 0x00 ); + fRegs[kFGA7] = SimpleReg_t("FGA7", 0x30A7, 6, 0x00 ); + fRegs[kFGA8] = SimpleReg_t("FGA8", 0x30A8, 6, 0x00 ); + fRegs[kFGA9] = SimpleReg_t("FGA9", 0x30A9, 6, 0x00 ); + fRegs[kFGA10] = SimpleReg_t("FGA10", 0x30AA, 6, 0x00 ); + fRegs[kFGA11] = SimpleReg_t("FGA11", 0x30AB, 6, 0x00 ); + fRegs[kFGA12] = SimpleReg_t("FGA12", 0x30AC, 6, 0x00 ); + fRegs[kFGA13] = SimpleReg_t("FGA13", 0x30AD, 6, 0x00 ); + fRegs[kFGA14] = SimpleReg_t("FGA14", 0x30AE, 6, 0x00 ); + fRegs[kFGA15] = SimpleReg_t("FGA15", 0x30AF, 6, 0x00 ); + fRegs[kFGA16] = SimpleReg_t("FGA16", 0x30B0, 6, 0x00 ); + fRegs[kFGA17] = SimpleReg_t("FGA17", 0x30B1, 6, 0x00 ); + fRegs[kFGA18] = SimpleReg_t("FGA18", 0x30B2, 6, 0x00 ); + fRegs[kFGA19] = SimpleReg_t("FGA19", 0x30B3, 6, 0x00 ); + fRegs[kFGA20] = SimpleReg_t("FGA20", 0x30B4, 6, 0x00 ); + fRegs[kFLL00] = SimpleReg_t("FLL00", 0x3100, 6, 0x00 ); // non-linearity table, 64 x 6 bits + fRegs[kFLL01] = SimpleReg_t("FLL01", 0x3101, 6, 0x00 ); + fRegs[kFLL02] = SimpleReg_t("FLL02", 0x3102, 6, 0x00 ); + fRegs[kFLL03] = SimpleReg_t("FLL03", 0x3103, 6, 0x00 ); + fRegs[kFLL04] = SimpleReg_t("FLL04", 0x3104, 6, 0x00 ); + fRegs[kFLL05] = SimpleReg_t("FLL05", 0x3105, 6, 0x00 ); + fRegs[kFLL06] = SimpleReg_t("FLL06", 0x3106, 6, 0x00 ); + fRegs[kFLL07] = SimpleReg_t("FLL07", 0x3107, 6, 0x00 ); + fRegs[kFLL08] = SimpleReg_t("FLL08", 0x3108, 6, 0x00 ); + fRegs[kFLL09] = SimpleReg_t("FLL09", 0x3109, 6, 0x00 ); + fRegs[kFLL0A] = SimpleReg_t("FLL0A", 0x310A, 6, 0x00 ); + fRegs[kFLL0B] = SimpleReg_t("FLL0B", 0x310B, 6, 0x00 ); + fRegs[kFLL0C] = SimpleReg_t("FLL0C", 0x310C, 6, 0x00 ); + fRegs[kFLL0D] = SimpleReg_t("FLL0D", 0x310D, 6, 0x00 ); + fRegs[kFLL0E] = SimpleReg_t("FLL0E", 0x310E, 6, 0x00 ); + fRegs[kFLL0F] = SimpleReg_t("FLL0F", 0x310F, 6, 0x00 ); + fRegs[kFLL10] = SimpleReg_t("FLL10", 0x3110, 6, 0x00 ); + fRegs[kFLL11] = SimpleReg_t("FLL11", 0x3111, 6, 0x00 ); + fRegs[kFLL12] = SimpleReg_t("FLL12", 0x3112, 6, 0x00 ); + fRegs[kFLL13] = SimpleReg_t("FLL13", 0x3113, 6, 0x00 ); + fRegs[kFLL14] = SimpleReg_t("FLL14", 0x3114, 6, 0x00 ); + fRegs[kFLL15] = SimpleReg_t("FLL15", 0x3115, 6, 0x00 ); + fRegs[kFLL16] = SimpleReg_t("FLL16", 0x3116, 6, 0x00 ); + fRegs[kFLL17] = SimpleReg_t("FLL17", 0x3117, 6, 0x00 ); + fRegs[kFLL18] = SimpleReg_t("FLL18", 0x3118, 6, 0x00 ); + fRegs[kFLL19] = SimpleReg_t("FLL19", 0x3119, 6, 0x00 ); + fRegs[kFLL1A] = SimpleReg_t("FLL1A", 0x311A, 6, 0x00 ); + fRegs[kFLL1B] = SimpleReg_t("FLL1B", 0x311B, 6, 0x00 ); + fRegs[kFLL1C] = SimpleReg_t("FLL1C", 0x311C, 6, 0x00 ); + fRegs[kFLL1D] = SimpleReg_t("FLL1D", 0x311D, 6, 0x00 ); + fRegs[kFLL1E] = SimpleReg_t("FLL1E", 0x311E, 6, 0x00 ); + fRegs[kFLL1F] = SimpleReg_t("FLL1F", 0x311F, 6, 0x00 ); + fRegs[kFLL20] = SimpleReg_t("FLL20", 0x3120, 6, 0x00 ); + fRegs[kFLL21] = SimpleReg_t("FLL21", 0x3121, 6, 0x00 ); + fRegs[kFLL22] = SimpleReg_t("FLL22", 0x3122, 6, 0x00 ); + fRegs[kFLL23] = SimpleReg_t("FLL23", 0x3123, 6, 0x00 ); + fRegs[kFLL24] = SimpleReg_t("FLL24", 0x3124, 6, 0x00 ); + fRegs[kFLL25] = SimpleReg_t("FLL25", 0x3125, 6, 0x00 ); + fRegs[kFLL26] = SimpleReg_t("FLL26", 0x3126, 6, 0x00 ); + fRegs[kFLL27] = SimpleReg_t("FLL27", 0x3127, 6, 0x00 ); + fRegs[kFLL28] = SimpleReg_t("FLL28", 0x3128, 6, 0x00 ); + fRegs[kFLL29] = SimpleReg_t("FLL29", 0x3129, 6, 0x00 ); + fRegs[kFLL2A] = SimpleReg_t("FLL2A", 0x312A, 6, 0x00 ); + fRegs[kFLL2B] = SimpleReg_t("FLL2B", 0x312B, 6, 0x00 ); + fRegs[kFLL2C] = SimpleReg_t("FLL2C", 0x312C, 6, 0x00 ); + fRegs[kFLL2D] = SimpleReg_t("FLL2D", 0x312D, 6, 0x00 ); + fRegs[kFLL2E] = SimpleReg_t("FLL2E", 0x312E, 6, 0x00 ); + fRegs[kFLL2F] = SimpleReg_t("FLL2F", 0x312F, 6, 0x00 ); + fRegs[kFLL30] = SimpleReg_t("FLL30", 0x3130, 6, 0x00 ); + fRegs[kFLL31] = SimpleReg_t("FLL31", 0x3131, 6, 0x00 ); + fRegs[kFLL32] = SimpleReg_t("FLL32", 0x3132, 6, 0x00 ); + fRegs[kFLL33] = SimpleReg_t("FLL33", 0x3133, 6, 0x00 ); + fRegs[kFLL34] = SimpleReg_t("FLL34", 0x3134, 6, 0x00 ); + fRegs[kFLL35] = SimpleReg_t("FLL35", 0x3135, 6, 0x00 ); + fRegs[kFLL36] = SimpleReg_t("FLL36", 0x3136, 6, 0x00 ); + fRegs[kFLL37] = SimpleReg_t("FLL37", 0x3137, 6, 0x00 ); + fRegs[kFLL38] = SimpleReg_t("FLL38", 0x3138, 6, 0x00 ); + fRegs[kFLL39] = SimpleReg_t("FLL39", 0x3139, 6, 0x00 ); + fRegs[kFLL3A] = SimpleReg_t("FLL3A", 0x313A, 6, 0x00 ); + fRegs[kFLL3B] = SimpleReg_t("FLL3B", 0x313B, 6, 0x00 ); + fRegs[kFLL3C] = SimpleReg_t("FLL3C", 0x313C, 6, 0x00 ); + fRegs[kFLL3D] = SimpleReg_t("FLL3D", 0x313D, 6, 0x00 ); + fRegs[kFLL3E] = SimpleReg_t("FLL3E", 0x313E, 6, 0x00 ); + fRegs[kFLL3F] = SimpleReg_t("FLL3F", 0x313F, 6, 0x00 ); + fRegs[kPASADEL] = SimpleReg_t("PASADEL", 0x3158, 8, 0xFF ); // end of non-lin table + fRegs[kPASAPHA] = SimpleReg_t("PASAPHA", 0x3159, 6, 0x3F ); + fRegs[kPASAPRA] = SimpleReg_t("PASAPRA", 0x315A, 6, 0x0F ); + fRegs[kPASADAC] = SimpleReg_t("PASADAC", 0x315B, 8, 0x80 ); + fRegs[kPASACHM] = SimpleReg_t("PASACHM", 0x315C, 19, 0x7FFFF ); + fRegs[kPASASTL] = SimpleReg_t("PASASTL", 0x315D, 8, 0xFF ); + fRegs[kPASAPR1] = SimpleReg_t("PASAPR1", 0x315E, 1, 0x0 ); + fRegs[kPASAPR0] = SimpleReg_t("PASAPR0", 0x315F, 1, 0x0 ); + fRegs[kSADCTRG] = SimpleReg_t("SADCTRG", 0x3161, 1, 0x0 ); + fRegs[kSADCRUN] = SimpleReg_t("SADCRUN", 0x3162, 1, 0x0 ); + fRegs[kSADCPWR] = SimpleReg_t("SADCPWR", 0x3163, 3, 0x7 ); + fRegs[kL0TSIM] = SimpleReg_t("L0TSIM", 0x3165, 14, 0x0050 ); + fRegs[kSADCEC] = SimpleReg_t("SADCEC", 0x3166, 7, 0x00 ); + fRegs[kSADCMC] = SimpleReg_t("SADCMC", 0x3170, 8, 0xC0 ); + fRegs[kSADCOC] = SimpleReg_t("SADCOC", 0x3171, 8, 0x19 ); + fRegs[kSADCGTB] = SimpleReg_t("SADCGTB", 0x3172, 32, 0x37737700 ); + fRegs[kSEBDEN] = SimpleReg_t("SEBDEN", 0x3178, 3, 0x0 ); + fRegs[kSEBDOU] = SimpleReg_t("SEBDOU", 0x3179, 3, 0x0 ); + fRegs[kTPL00] = SimpleReg_t("TPL00", 0x3180, 5, 0x00 ); // pos table, 128 x 5 bits + fRegs[kTPL01] = SimpleReg_t("TPL01", 0x3181, 5, 0x00 ); + fRegs[kTPL02] = SimpleReg_t("TPL02", 0x3182, 5, 0x00 ); + fRegs[kTPL03] = SimpleReg_t("TPL03", 0x3183, 5, 0x00 ); + fRegs[kTPL04] = SimpleReg_t("TPL04", 0x3184, 5, 0x00 ); + fRegs[kTPL05] = SimpleReg_t("TPL05", 0x3185, 5, 0x00 ); + fRegs[kTPL06] = SimpleReg_t("TPL06", 0x3186, 5, 0x00 ); + fRegs[kTPL07] = SimpleReg_t("TPL07", 0x3187, 5, 0x00 ); + fRegs[kTPL08] = SimpleReg_t("TPL08", 0x3188, 5, 0x00 ); + fRegs[kTPL09] = SimpleReg_t("TPL09", 0x3189, 5, 0x00 ); + fRegs[kTPL0A] = SimpleReg_t("TPL0A", 0x318A, 5, 0x00 ); + fRegs[kTPL0B] = SimpleReg_t("TPL0B", 0x318B, 5, 0x00 ); + fRegs[kTPL0C] = SimpleReg_t("TPL0C", 0x318C, 5, 0x00 ); + fRegs[kTPL0D] = SimpleReg_t("TPL0D", 0x318D, 5, 0x00 ); + fRegs[kTPL0E] = SimpleReg_t("TPL0E", 0x318E, 5, 0x00 ); + fRegs[kTPL0F] = SimpleReg_t("TPL0F", 0x318F, 5, 0x00 ); + fRegs[kTPL10] = SimpleReg_t("TPL10", 0x3190, 5, 0x00 ); + fRegs[kTPL11] = SimpleReg_t("TPL11", 0x3191, 5, 0x00 ); + fRegs[kTPL12] = SimpleReg_t("TPL12", 0x3192, 5, 0x00 ); + fRegs[kTPL13] = SimpleReg_t("TPL13", 0x3193, 5, 0x00 ); + fRegs[kTPL14] = SimpleReg_t("TPL14", 0x3194, 5, 0x00 ); + fRegs[kTPL15] = SimpleReg_t("TPL15", 0x3195, 5, 0x00 ); + fRegs[kTPL16] = SimpleReg_t("TPL16", 0x3196, 5, 0x00 ); + fRegs[kTPL17] = SimpleReg_t("TPL17", 0x3197, 5, 0x00 ); + fRegs[kTPL18] = SimpleReg_t("TPL18", 0x3198, 5, 0x00 ); + fRegs[kTPL19] = SimpleReg_t("TPL19", 0x3199, 5, 0x00 ); + fRegs[kTPL1A] = SimpleReg_t("TPL1A", 0x319A, 5, 0x00 ); + fRegs[kTPL1B] = SimpleReg_t("TPL1B", 0x319B, 5, 0x00 ); + fRegs[kTPL1C] = SimpleReg_t("TPL1C", 0x319C, 5, 0x00 ); + fRegs[kTPL1D] = SimpleReg_t("TPL1D", 0x319D, 5, 0x00 ); + fRegs[kTPL1E] = SimpleReg_t("TPL1E", 0x319E, 5, 0x00 ); + fRegs[kTPL1F] = SimpleReg_t("TPL1F", 0x319F, 5, 0x00 ); + fRegs[kTPL20] = SimpleReg_t("TPL20", 0x31A0, 5, 0x00 ); + fRegs[kTPL21] = SimpleReg_t("TPL21", 0x31A1, 5, 0x00 ); + fRegs[kTPL22] = SimpleReg_t("TPL22", 0x31A2, 5, 0x00 ); + fRegs[kTPL23] = SimpleReg_t("TPL23", 0x31A3, 5, 0x00 ); + fRegs[kTPL24] = SimpleReg_t("TPL24", 0x31A4, 5, 0x00 ); + fRegs[kTPL25] = SimpleReg_t("TPL25", 0x31A5, 5, 0x00 ); + fRegs[kTPL26] = SimpleReg_t("TPL26", 0x31A6, 5, 0x00 ); + fRegs[kTPL27] = SimpleReg_t("TPL27", 0x31A7, 5, 0x00 ); + fRegs[kTPL28] = SimpleReg_t("TPL28", 0x31A8, 5, 0x00 ); + fRegs[kTPL29] = SimpleReg_t("TPL29", 0x31A9, 5, 0x00 ); + fRegs[kTPL2A] = SimpleReg_t("TPL2A", 0x31AA, 5, 0x00 ); + fRegs[kTPL2B] = SimpleReg_t("TPL2B", 0x31AB, 5, 0x00 ); + fRegs[kTPL2C] = SimpleReg_t("TPL2C", 0x31AC, 5, 0x00 ); + fRegs[kTPL2D] = SimpleReg_t("TPL2D", 0x31AD, 5, 0x00 ); + fRegs[kTPL2E] = SimpleReg_t("TPL2E", 0x31AE, 5, 0x00 ); + fRegs[kTPL2F] = SimpleReg_t("TPL2F", 0x31AF, 5, 0x00 ); + fRegs[kTPL30] = SimpleReg_t("TPL30", 0x31B0, 5, 0x00 ); + fRegs[kTPL31] = SimpleReg_t("TPL31", 0x31B1, 5, 0x00 ); + fRegs[kTPL32] = SimpleReg_t("TPL32", 0x31B2, 5, 0x00 ); + fRegs[kTPL33] = SimpleReg_t("TPL33", 0x31B3, 5, 0x00 ); + fRegs[kTPL34] = SimpleReg_t("TPL34", 0x31B4, 5, 0x00 ); + fRegs[kTPL35] = SimpleReg_t("TPL35", 0x31B5, 5, 0x00 ); + fRegs[kTPL36] = SimpleReg_t("TPL36", 0x31B6, 5, 0x00 ); + fRegs[kTPL37] = SimpleReg_t("TPL37", 0x31B7, 5, 0x00 ); + fRegs[kTPL38] = SimpleReg_t("TPL38", 0x31B8, 5, 0x00 ); + fRegs[kTPL39] = SimpleReg_t("TPL39", 0x31B9, 5, 0x00 ); + fRegs[kTPL3A] = SimpleReg_t("TPL3A", 0x31BA, 5, 0x00 ); + fRegs[kTPL3B] = SimpleReg_t("TPL3B", 0x31BB, 5, 0x00 ); + fRegs[kTPL3C] = SimpleReg_t("TPL3C", 0x31BC, 5, 0x00 ); + fRegs[kTPL3D] = SimpleReg_t("TPL3D", 0x31BD, 5, 0x00 ); + fRegs[kTPL3E] = SimpleReg_t("TPL3E", 0x31BE, 5, 0x00 ); + fRegs[kTPL3F] = SimpleReg_t("TPL3F", 0x31BF, 5, 0x00 ); + fRegs[kTPL40] = SimpleReg_t("TPL40", 0x31C0, 5, 0x00 ); + fRegs[kTPL41] = SimpleReg_t("TPL41", 0x31C1, 5, 0x00 ); + fRegs[kTPL42] = SimpleReg_t("TPL42", 0x31C2, 5, 0x00 ); + fRegs[kTPL43] = SimpleReg_t("TPL43", 0x31C3, 5, 0x00 ); + fRegs[kTPL44] = SimpleReg_t("TPL44", 0x31C4, 5, 0x00 ); + fRegs[kTPL45] = SimpleReg_t("TPL45", 0x31C5, 5, 0x00 ); + fRegs[kTPL46] = SimpleReg_t("TPL46", 0x31C6, 5, 0x00 ); + fRegs[kTPL47] = SimpleReg_t("TPL47", 0x31C7, 5, 0x00 ); + fRegs[kTPL48] = SimpleReg_t("TPL48", 0x31C8, 5, 0x00 ); + fRegs[kTPL49] = SimpleReg_t("TPL49", 0x31C9, 5, 0x00 ); + fRegs[kTPL4A] = SimpleReg_t("TPL4A", 0x31CA, 5, 0x00 ); + fRegs[kTPL4B] = SimpleReg_t("TPL4B", 0x31CB, 5, 0x00 ); + fRegs[kTPL4C] = SimpleReg_t("TPL4C", 0x31CC, 5, 0x00 ); + fRegs[kTPL4D] = SimpleReg_t("TPL4D", 0x31CD, 5, 0x00 ); + fRegs[kTPL4E] = SimpleReg_t("TPL4E", 0x31CE, 5, 0x00 ); + fRegs[kTPL4F] = SimpleReg_t("TPL4F", 0x31CF, 5, 0x00 ); + fRegs[kTPL50] = SimpleReg_t("TPL50", 0x31D0, 5, 0x00 ); + fRegs[kTPL51] = SimpleReg_t("TPL51", 0x31D1, 5, 0x00 ); + fRegs[kTPL52] = SimpleReg_t("TPL52", 0x31D2, 5, 0x00 ); + fRegs[kTPL53] = SimpleReg_t("TPL53", 0x31D3, 5, 0x00 ); + fRegs[kTPL54] = SimpleReg_t("TPL54", 0x31D4, 5, 0x00 ); + fRegs[kTPL55] = SimpleReg_t("TPL55", 0x31D5, 5, 0x00 ); + fRegs[kTPL56] = SimpleReg_t("TPL56", 0x31D6, 5, 0x00 ); + fRegs[kTPL57] = SimpleReg_t("TPL57", 0x31D7, 5, 0x00 ); + fRegs[kTPL58] = SimpleReg_t("TPL58", 0x31D8, 5, 0x00 ); + fRegs[kTPL59] = SimpleReg_t("TPL59", 0x31D9, 5, 0x00 ); + fRegs[kTPL5A] = SimpleReg_t("TPL5A", 0x31DA, 5, 0x00 ); + fRegs[kTPL5B] = SimpleReg_t("TPL5B", 0x31DB, 5, 0x00 ); + fRegs[kTPL5C] = SimpleReg_t("TPL5C", 0x31DC, 5, 0x00 ); + fRegs[kTPL5D] = SimpleReg_t("TPL5D", 0x31DD, 5, 0x00 ); + fRegs[kTPL5E] = SimpleReg_t("TPL5E", 0x31DE, 5, 0x00 ); + fRegs[kTPL5F] = SimpleReg_t("TPL5F", 0x31DF, 5, 0x00 ); + fRegs[kTPL60] = SimpleReg_t("TPL60", 0x31E0, 5, 0x00 ); + fRegs[kTPL61] = SimpleReg_t("TPL61", 0x31E1, 5, 0x00 ); + fRegs[kTPL62] = SimpleReg_t("TPL62", 0x31E2, 5, 0x00 ); + fRegs[kTPL63] = SimpleReg_t("TPL63", 0x31E3, 5, 0x00 ); + fRegs[kTPL64] = SimpleReg_t("TPL64", 0x31E4, 5, 0x00 ); + fRegs[kTPL65] = SimpleReg_t("TPL65", 0x31E5, 5, 0x00 ); + fRegs[kTPL66] = SimpleReg_t("TPL66", 0x31E6, 5, 0x00 ); + fRegs[kTPL67] = SimpleReg_t("TPL67", 0x31E7, 5, 0x00 ); + fRegs[kTPL68] = SimpleReg_t("TPL68", 0x31E8, 5, 0x00 ); + fRegs[kTPL69] = SimpleReg_t("TPL69", 0x31E9, 5, 0x00 ); + fRegs[kTPL6A] = SimpleReg_t("TPL6A", 0x31EA, 5, 0x00 ); + fRegs[kTPL6B] = SimpleReg_t("TPL6B", 0x31EB, 5, 0x00 ); + fRegs[kTPL6C] = SimpleReg_t("TPL6C", 0x31EC, 5, 0x00 ); + fRegs[kTPL6D] = SimpleReg_t("TPL6D", 0x31ED, 5, 0x00 ); + fRegs[kTPL6E] = SimpleReg_t("TPL6E", 0x31EE, 5, 0x00 ); + fRegs[kTPL6F] = SimpleReg_t("TPL6F", 0x31EF, 5, 0x00 ); + fRegs[kTPL70] = SimpleReg_t("TPL70", 0x31F0, 5, 0x00 ); + fRegs[kTPL71] = SimpleReg_t("TPL71", 0x31F1, 5, 0x00 ); + fRegs[kTPL72] = SimpleReg_t("TPL72", 0x31F2, 5, 0x00 ); + fRegs[kTPL73] = SimpleReg_t("TPL73", 0x31F3, 5, 0x00 ); + fRegs[kTPL74] = SimpleReg_t("TPL74", 0x31F4, 5, 0x00 ); + fRegs[kTPL75] = SimpleReg_t("TPL75", 0x31F5, 5, 0x00 ); + fRegs[kTPL76] = SimpleReg_t("TPL76", 0x31F6, 5, 0x00 ); + fRegs[kTPL77] = SimpleReg_t("TPL77", 0x31F7, 5, 0x00 ); + fRegs[kTPL78] = SimpleReg_t("TPL78", 0x31F8, 5, 0x00 ); + fRegs[kTPL79] = SimpleReg_t("TPL79", 0x31F9, 5, 0x00 ); + fRegs[kTPL7A] = SimpleReg_t("TPL7A", 0x31FA, 5, 0x00 ); + fRegs[kTPL7B] = SimpleReg_t("TPL7B", 0x31FB, 5, 0x00 ); + fRegs[kTPL7C] = SimpleReg_t("TPL7C", 0x31FC, 5, 0x00 ); + fRegs[kTPL7D] = SimpleReg_t("TPL7D", 0x31FD, 5, 0x00 ); + fRegs[kTPL7E] = SimpleReg_t("TPL7E", 0x31FE, 5, 0x00 ); + fRegs[kTPL7F] = SimpleReg_t("TPL7F", 0x31FF, 5, 0x00 ); + fRegs[kMEMRW] = SimpleReg_t("MEMRW", 0xD000, 7, 0x79 ); // end of pos table + fRegs[kMEMCOR] = SimpleReg_t("MEMCOR", 0xD001, 9, 0x000 ); + fRegs[kDMDELA] = SimpleReg_t("DMDELA", 0xD002, 4, 0x8 ); + fRegs[kDMDELS] = SimpleReg_t("DMDELS", 0xD003, 4, 0x8 ); + + InitRegs(); +} + + +AliTRDtrapConfig* AliTRDtrapConfig::Instance() +{ + // return a pointer to an instance of this class + + if (!fgInstance) { + fgInstance = new AliTRDtrapConfig(); + fgInstance->LoadConfig(); + } + + return fgInstance; +} + + +void AliTRDtrapConfig::InitRegs(void) +{ + // Reset the content of all TRAP registers to the reset values (see TRAP User Manual) + + for (Int_t iReg = 0; iReg < kLastReg; iReg++) { + + fRegisterValue[iReg].individualValue = 0x0; + + fRegisterValue[iReg].globalValue = GetRegResetValue((TrapReg_t) iReg); + fRegisterValue[iReg].state = RegValue_t::kGlobal; + } +} + + +void AliTRDtrapConfig::ResetRegs(void) +{ + // Reset the content of all TRAP registers to the reset values (see TRAP User Manual) + + for (Int_t iReg = 0; iReg < kLastReg; iReg++) { + if(fRegisterValue[iReg].state == RegValue_t::kIndividual) { + if (fRegisterValue[iReg].individualValue) { + delete [] fRegisterValue[iReg].individualValue; + fRegisterValue[iReg].individualValue = 0x0; + } + } + + fRegisterValue[iReg].globalValue = GetRegResetValue((TrapReg_t) iReg); + fRegisterValue[iReg].state = RegValue_t::kGlobal; + // printf("%-8s: 0x%08x\n", GetRegName((TrapReg_t) iReg), fRegisterValue[iReg].globalValue); + } +} + + +Int_t AliTRDtrapConfig::GetTrapReg(TrapReg_t reg, Int_t det, Int_t rob, Int_t mcm) +{ + // get the value of an individual TRAP register + // if it is individual for TRAPs a valid TRAP has to be specified + + if ((reg < 0) || (reg >= kLastReg)) { + AliError("Non-existing register requested"); + return -1; + } + else { + if (fRegisterValue[reg].state == RegValue_t::kGlobal) { + return fRegisterValue[reg].globalValue; + } + else if (fRegisterValue[reg].state == RegValue_t::kIndividual) { + if((det >= 0 && det < AliTRDgeometry::Ndet()) && + (rob >= 0 && rob < AliTRDfeeParam::GetNrobC1()) && + (mcm >= 0 && mcm < fgkMaxMcm)) { + return fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm]; + } + else { + AliError("Invalid MCM specified or register is individual"); + return -1; + } + } + else { // should never be reached + AliError("MCM register status neither kGlobal nor kIndividual"); + return -1; + } + } + return -1; +} + + +Bool_t AliTRDtrapConfig::SetTrapReg(TrapReg_t reg, Int_t value) +{ + // set a global value for the given TRAP register, + // i.e. the same value for all TRAPs + + if (fRegisterValue[reg].state == RegValue_t::kGlobal) { + fRegisterValue[reg].globalValue = value; + return kTRUE; + } + else { + AliError("Register has individual values"); + } + return kFALSE; +} + + +Bool_t AliTRDtrapConfig::SetTrapReg(TrapReg_t reg, Int_t value, Int_t det) +{ + // set a global value for the given TRAP register, + // i.e. the same value for all TRAPs + + if (fRegisterValue[reg].state == RegValue_t::kGlobal) { + fRegisterValue[reg].globalValue = value; + return kTRUE; + } + else if (fRegisterValue[reg].state == RegValue_t::kIndividual) { + // if the register is in idividual mode but a broadcast is requested, the selected register is + // set to value for all MCMs on the chamber + + if( (det>=0 && det= 0 && det < AliTRDgeometry::Ndet()) && + (rob >= 0 && rob < AliTRDfeeParam::GetNrobC1()) && + (mcm >= 0 && mcm < fgkMaxMcm) ) { + if (fRegisterValue[reg].state == RegValue_t::kGlobal) { + Int_t defaultValue = fRegisterValue[reg].globalValue; + + fRegisterValue[reg].state = RegValue_t::kIndividual; + fRegisterValue[reg].individualValue = new Int_t[AliTRDgeometry::Ndet()*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm]; + + for(Int_t i = 0; i < AliTRDgeometry::Ndet()*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm; i++) + fRegisterValue[reg].individualValue[i] = defaultValue; // set the requested register of all MCMs to the value previously stored + + fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm] = value; + } + else if (fRegisterValue[reg].state == RegValue_t::kIndividual) { + fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm] = value; + } + else { // should never be reached + AliError("MCM register status neither kGlobal nor kIndividual"); + return kFALSE; + } + } + else { + AliError("Invalid value for det, ROB or MCM selected"); + return kFALSE; + } + + return kTRUE; +} + + +Int_t AliTRDtrapConfig::Peek(Int_t addr, Int_t /* det */, Int_t /* rob */, Int_t /* mcm */) +{ + // reading from given address + // not to be used yet + + if ( (addr >= fgkDmemStartAddress) && + (addr < (fgkDmemStartAddress + fgkDmemWords)) ) { + printf("DMEM\n"); + return 0; + } + else { + TrapReg_t mcmReg = GetRegByAddress(addr); + if ( mcmReg >= 0 && mcmReg < kLastReg) { + printf("Register: %s\n", GetRegName(mcmReg)); + return 0; + } + } + + return -1; +} + + +Bool_t AliTRDtrapConfig::Poke(Int_t addr, Int_t value, Int_t /* det */, Int_t /* rob */, Int_t /* mcm */) +{ + // writing to given address + // not to be used yet + + if ( (addr >= fgkDmemStartAddress) && + (addr < (fgkDmemStartAddress + fgkDmemWords)) ) { + printf("DMEM 0x%08x : %i\n", addr, value); + return kTRUE; + } + else { + TrapReg_t mcmReg = GetRegByAddress(addr); + if ( mcmReg >= 0 && mcmReg < kLastReg) { + printf("Register: %s : %i\n", GetRegName(mcmReg), value); + return kTRUE; + } + } + + return kFALSE; +} + + +Bool_t AliTRDtrapConfig::SetDmem(Int_t addr, Int_t value) +{ + if ( (addr >> 14) != 0x3) { + AliError(Form("No DMEM address: 0x%08x", addr)); + return kFALSE; + } + + for (Int_t iDet = 0; iDet < 540; iDet++) { + for (Int_t iROB = 0; iROB < AliTRDfeeParam::GetNrobC1(); iROB++) { + for (Int_t iMCM = 0; iMCM < fgkMaxMcm; iMCM++) { + fDmem[iDet*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + iROB*fgkMaxMcm + iMCM] + [addr - fgkDmemStartAddress] = value; + } + } + } + return kTRUE; +} + + +Bool_t AliTRDtrapConfig::SetDmem(Int_t addr, Int_t value, Int_t det) +{ + for (Int_t iROB = 0; iROB < AliTRDfeeParam::GetNrobC1(); iROB++) { + for (Int_t iMCM = 0; iMCM < fgkMaxMcm; iMCM++) { + fDmem[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + iROB*fgkMaxMcm + iMCM] + [addr - fgkDmemStartAddress] = value; + } + } + return kTRUE; +} + + +Bool_t AliTRDtrapConfig::SetDmem(Int_t addr, Int_t value, Int_t det, Int_t rob, Int_t mcm) +{ + fDmem[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm] + [addr - fgkDmemStartAddress] = value; + return kTRUE; +} + + +Int_t AliTRDtrapConfig::GetDmem(Int_t addr, Int_t det, Int_t rob, Int_t mcm) +{ + return fDmem[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm] + [addr - fgkDmemStartAddress]; +} + + +Bool_t AliTRDtrapConfig::LoadConfig() +{ + // load a set of TRAP register values (configuration) + // here a default set is implemented for testing + // for a detailed description of the registers see the TRAP manual + + // no. of timebins + SetTrapReg(kC13CPUA, 24); + + // pedestal filter + SetTrapReg(kFPNP, 4*10); + SetTrapReg(kFPTC, 0); + SetTrapReg(kFPBY, 0); // bypassed! + + // gain filter + for (Int_t adc = 0; adc < 20; adc++) { + SetTrapReg(TrapReg_t(kFGA0+adc), 40); + SetTrapReg(TrapReg_t(kFGF0+adc), 15); + } + SetTrapReg(kFGTA, 20); + SetTrapReg(kFGTB, 2060); + SetTrapReg(kFGBY, 0); // bypassed! + + // tail cancellation + SetTrapReg(kFTAL, 267); + SetTrapReg(kFTLL, 356); + SetTrapReg(kFTLS, 387); + SetTrapReg(kFTBY, 0); + + // tracklet calculation + SetTrapReg(kTPQS0, 5); + SetTrapReg(kTPQE0, 10); + SetTrapReg(kTPQS1, 11); + SetTrapReg(kTPQE1, 20); + SetTrapReg(kTPFS, 5); + SetTrapReg(kTPFE, 20); + SetTrapReg(kTPVBY, 0); + SetTrapReg(kTPVT, 10); + SetTrapReg(kTPHT, 150); + SetTrapReg(kTPFP, 40); + SetTrapReg(kTPCL, 1); + SetTrapReg(kTPCT, 10); + + // ndrift (+ 5 binary digits) + SetDmem(0xc025, 20 << 5); + // deflection + tilt correction + SetDmem(0xc022, 0); + // deflection range table + for (Int_t iTrklCh = 0; iTrklCh < 18; iTrklCh++) { + SetDmem(0xc030 + 2 * iTrklCh, -64); // min. deflection + SetDmem(0xc031 + 2 * iTrklCh, 63); // max. deflection + } + + // hit position LUT + const UShort_t lutPos[128] = { + 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, + 16, 16, 16, 17, 17, 18, 18, 19, 19, 19, 20, 20, 20, 21, 21, 22, 22, 22, 23, 23, 23, 24, 24, 24, 24, 25, 25, 25, 26, 26, 26, 26, + 27, 27, 27, 27, 27, 27, 27, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 27, 27, 27, 27, 26, + 26, 26, 26, 25, 25, 25, 24, 24, 23, 23, 22, 22, 21, 21, 20, 20, 19, 18, 18, 17, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 7}; + for (Int_t iCOG = 0; iCOG < 128; iCOG++) + SetTrapReg((TrapReg_t) (kTPL00 + iCOG), lutPos[iCOG]); + + // event buffer + SetTrapReg(kEBSF, 1); // 0: store filtered; 1: store unfiltered + // zs applied to data stored in event buffer (sel. by EBSF) + SetTrapReg(kEBIS, 15 << 2); // single indicator threshold (plus two digits) + SetTrapReg(kEBIT, 30 << 2); // sum indicator threshold (plus two digits) + SetTrapReg(kEBIL, 0xf0); // lookup table + SetTrapReg(kEBIN, 0); // neighbour sensitivity + + // raw data + SetTrapReg(kNES, (0x0000 << 16) | 0x1000); + + return kTRUE; +} + + +Bool_t AliTRDtrapConfig::LoadConfig(Int_t det, TString filename) +{ + // load a TRAP configuration from a file + // The file format is the format created by the standalone + // command coder: scc / show_cfdat + // which are two tools to inspect/export configurations from wingDB + + ResetRegs(); // does not really make sense here??? + + std::ifstream infile; + infile.open(filename.Data(), std::ifstream::in); + if (!infile.is_open()) { + AliError("Can not open MCM configuration file"); + return kFALSE; + } + + Int_t cmd, extali, addr, data; + Int_t no; + char tmp; + + while(infile.good()) { + cmd=-1; + extali=-1; + addr=-1; + data=-1; + infile >> std::skipws >> no >> tmp >> cmd >> extali >> addr >> data; + // std::cout << "no: " << no << ", cmd " << cmd << ", extali " << extali << ", addr " << addr << ", data " << data << endl; + + if(cmd!=-1 && extali!=-1 && addr != -1 && data!= -1) { + AddValues(det, cmd, extali, addr, data); + } + else if(!infile.eof() && !infile.good()) { + infile.clear(); + infile.ignore(256, '\n'); + } + + if(!infile.eof()) + infile.clear(); + } + + infile.close(); + + return kTRUE; +} + + +Bool_t AliTRDtrapConfig::ReadPackedConfig(UInt_t *data, Int_t size) +{ + Int_t idx = 0; + Int_t err = 0; + Int_t step, bwidth, nwords, exit_flag, bitcnt; + + UShort_t caddr; + UInt_t dat, msk, header, data_hi; + + while (idx < size) { + + header = *data; + data++; + idx++; + + AliDebug(5, Form("read: 0x%08x", header)); + + if (header & 0x01) // single data + { + dat = (header >> 2) & 0xFFFF; // 16 bit data + caddr = (header >> 18) & 0x3FFF; // 14 bit address + + if (caddr != 0x1FFF) // temp!!! because the end marker was wrong + { + if (header & 0x02) // check if > 16 bits + { + data_hi = *data; + AliDebug(5, Form("read: 0x%08x", data_hi)); + data++; + idx++; + err += ((data_hi ^ (dat | 1)) & 0xFFFF) != 0; + dat = (data_hi & 0xFFFF0000) | dat; + } + AliDebug(5, Form("addr=0x%04x (%s) data=0x%08x\n", caddr, GetRegName(GetRegByAddress(caddr)), dat)); + if ( ! Poke(caddr, dat, 0, 0, 0) ) + AliDebug(5, Form("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header)); + if (idx > size) + { + AliDebug(5, Form("(single-write): no more data, missing end marker\n")); + return -err; + } + } + else + { + AliDebug(5, Form("(single-write): address 0x%04x => old endmarker?\n", caddr)); + return err; + } + } + + else // block of data + { + step = (header >> 1) & 0x0003; + bwidth = ((header >> 3) & 0x001F) + 1; + nwords = (header >> 8) & 0x00FF; + caddr = (header >> 16) & 0xFFFF; + exit_flag = (step == 0) || (step == 3) || (nwords == 0); + + if (exit_flag) + return err; + + switch (bwidth) + { + case 15: + case 10: + case 7: + case 6: + case 5: + { + msk = (1 << bwidth) - 1; + bitcnt = 0; + while (nwords > 0) + { + nwords--; + bitcnt -= bwidth; + if (bitcnt < 0) + { + header = *data; + AliDebug(5, Form("read 0x%08x", header)); + data++; + idx++; + err += (header & 1); + header = header >> 1; + bitcnt = 31 - bwidth; + } + AliDebug(5, Form("addr=0x%04x (%s) data=0x%08x\n", caddr, GetRegName(GetRegByAddress(caddr)), header & msk)); + if ( ! Poke(caddr, header & msk, 0, 0, 0) ) + AliDebug(5, Form("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header)); + + caddr += step; + header = header >> bwidth; + if (idx >= size) + { + AliDebug(5, Form("(block-write): no end marker! %d words read\n", idx)); + return -err; + } + } + break; + } // end case 5-15 + case 31: + { + while (nwords > 0) + { + header = *data; + AliDebug(5, Form("read 0x%08x", header)); + data++; + idx++; + nwords--; + err += (header & 1); + + AliDebug(5, Form("addr=0x%04x (%s) data=0x%08x", caddr, GetRegName(GetRegByAddress(caddr)), header >> 1)); + if ( ! Poke(caddr, header >> 1, 0, 0, 0) ) + AliDebug(5, Form("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header)); + + caddr += step; + if (idx >= size) + { + AliDebug(5, Form("no end marker! %d words read", idx)); + return -err; + } + } + break; + } + default: return err; + } // end switch + } // end block case + } // end while + AliDebug(5, Form("no end marker! %d words read", idx)); + return -err; // only if the max length of the block reached! +} + + +Bool_t AliTRDtrapConfig::PrintTrapReg(TrapReg_t reg, Int_t det, Int_t rob, Int_t mcm) +{ + // print the value stored in the given register + // if it is individual a valid MCM has to be specified + + if (fRegisterValue[reg].state == RegValue_t::kGlobal) { + printf("%s (%i bits) at 0x%08x is 0x%08x and resets to: 0x%08x (currently global mode)\n", + GetRegName((TrapReg_t) reg), + GetRegNBits((TrapReg_t) reg), + GetRegAddress((TrapReg_t) reg), + fRegisterValue[reg].globalValue, + GetRegResetValue((TrapReg_t) reg)); + } + else if (fRegisterValue[reg].state == RegValue_t::kIndividual) { + if((det >= 0 && det < AliTRDgeometry::Ndet()) && + (rob >= 0 && rob < AliTRDfeeParam::GetNrobC1()) && + (mcm >= 0 && mcm < fgkMaxMcm)) { + printf("%s (%i bits) at 0x%08x is 0x%08x and resets to: 0x%08x (currently individual mode)\n", + GetRegName((TrapReg_t) reg), + GetRegNBits((TrapReg_t) reg), + GetRegAddress((TrapReg_t) reg), + fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm], + GetRegResetValue((TrapReg_t) reg)); + } + else { + AliError("Register value is MCM-specific: Invalid detector, ROB or MCM requested"); + return kFALSE; + } + } + else { // should never be reached + AliError("MCM register status neither kGlobal nor kIndividual"); + return kFALSE; + } + return kTRUE; +} + + +Bool_t AliTRDtrapConfig::PrintTrapAddr(Int_t addr, Int_t det, Int_t rob, Int_t mcm) +{ + // print the value stored at the given address in the MCM chip + TrapReg_t reg = GetRegByAddress(addr); + if (reg >= 0 && reg < kLastReg) { + return PrintTrapReg(reg, det, rob, mcm); + } + else { + AliError(Form("There is no register at address 0x%08x in the simulator", addr)); + return kFALSE; + } +} + + +Bool_t AliTRDtrapConfig::AddValues(UInt_t det, UInt_t cmd, UInt_t extali, Int_t addr, UInt_t data) +{ + // transfer the informations provided by LoadConfig to the internal class variables + + if(cmd != fgkScsnCmdWrite) { + AliError(Form("Invalid command received: %i", cmd)); + return kFALSE; + } + + TrapReg_t mcmReg = GetRegByAddress(addr); + Int_t rocType = AliTRDgeometry::GetStack(det) == 2 ? 0 : 1; + + // configuration registers + if(mcmReg >= 0 && mcmReg < kLastReg) { + + for(Int_t linkPair=0; linkPair>7), (fMcmlist[i]&0x7F)); + i++; + } + } + } + return kTRUE; + } + // DMEM + else if ( (addr >= fgkDmemStartAddress) && + (addr < (fgkDmemStartAddress + fgkDmemWords))) { + for(Int_t linkPair=0; linkPair> 7)*fgkMaxMcm + (fMcmlist[i]&0x7f)] + // [addr - fgkDmemStartAddress] = data; + SetDmem(addr, data, det, fMcmlist[i] >> 7, fMcmlist[i] & 0x7f); + i++; + } + } + } + return kTRUE; + } + else + return kFALSE; +} + + +Int_t AliTRDtrapConfig::ExtAliToAli( UInt_t dest, UShort_t linkpair, UShort_t rocType) +{ + // Converts an extended ALICE ID which identifies a single MCM or a group of MCMs to + // the corresponding list of MCMs. Only broadcasts (127) are encoded as 127 + // The return value is the number of MCMs in the list + + fMcmlist[0]=-1; + + Short_t nmcm = 0; + UInt_t mcm, rob, robAB; + UInt_t cmA = 0, cmB = 0; // Chipmask for each A and B side + + // Default chipmask for 4 linkpairs (each bit correponds each alice-mcm) + static const UInt_t gkChipmaskDefLp[4] = { 0x1FFFF, 0x1FFFF, 0x3FFFF, 0x1FFFF }; + + rob = dest >> 7; // Extract ROB pattern from dest. + mcm = dest & 0x07F; // Extract MCM pattern from dest. + robAB = GetRobAB( rob, linkpair ); // Get which ROB sides are selected. + + // Abort if no ROB is selected + if( robAB == 0 ) { + return 0; + } + + // Special case + if( mcm == 127 ) { + if( robAB == 3 ) { // This is very special 127 can stay only if two ROBs are selected + fMcmlist[0]=127; // broadcase to ALL + fMcmlist[1]=-1; + return 1; + } + cmA = cmB = 0x3FFFF; + } else if( (mcm & 0x40) != 0 ) { // If top bit is 1 but not 127, this is chip group. + if( (mcm & 0x01) != 0 ) { cmA |= 0x04444; cmB |= 0x04444; } // chip_cmrg + if( (mcm & 0x02) != 0 ) { cmA |= 0x10000; cmB |= 0x10000; } // chip_bmrg + if( (mcm & 0x04) != 0 && rocType == 0 ) { cmA |= 0x20000; cmB |= 0x20000; } // chip_hm3 + if( (mcm & 0x08) != 0 && rocType == 1 ) { cmA |= 0x20000; cmB |= 0x20000; } // chip_hm4 + if( (mcm & 0x10) != 0 ) { cmA |= 0x01111; cmB |= 0x08888; } // chip_edge + if( (mcm & 0x20) != 0 ) { cmA |= 0x0aaaa; cmB |= 0x03333; } // chip_norm + } else { // Otherwise, this is normal chip ID, turn on only one chip. + cmA = 1 << mcm; + cmB = 1 << mcm; + } + + // Mask non-existing MCMs + cmA &= gkChipmaskDefLp[linkpair]; + cmB &= gkChipmaskDefLp[linkpair]; + // Remove if only one side is selected + if( robAB == 1 ) + cmB = 0; + if( robAB == 2 ) + cmA = 0; + if( robAB == 4 && linkpair != 2 ) + cmA = cmB = 0; // Restrict to only T3A and T3B + + // Finally convert chipmask to list of slaves + nmcm = ChipmaskToMCMlist( cmA, cmB, linkpair ); + + return nmcm; +} + + +Short_t AliTRDtrapConfig::GetRobAB( UShort_t robsel, UShort_t linkpair ) const +{ + // Converts the ROB part of the extended ALICE ID to robs + + if( (robsel & 0x8) != 0 ) { // 1000 .. direct ROB selection. Only one of the 8 ROBs are used. + robsel = robsel & 7; + if( (robsel % 2) == 0 && (robsel / 2) == linkpair ) + return 1; // Even means A side (position 0,2,4,6) + if( (robsel % 2) == 1 && (robsel / 2) == linkpair ) + return 2; // Odd means B side (position 1,3,5,7) + return 0; + } + + // ROB group + if( robsel == 0 ) { return 3; } // Both ROB + if( robsel == 1 ) { return 1; } // A-side ROB + if( robsel == 2 ) { return 2; } // B-side ROB + if( robsel == 3 ) { return 3; } // Both ROB + if( robsel == 4 ) { return 4; } // Only T3A and T3B + // Other number 5 to 7 are ignored (not defined) + + return 0; +} + + +Short_t AliTRDtrapConfig::ChipmaskToMCMlist( Int_t cmA, Int_t cmB, UShort_t linkpair ) +{ + // Converts the chipmask to a list of MCMs + + Short_t nmcm = 0; + Short_t i; + for( i = 0 ; i < fgkMaxMcm ; i++ ) { + if( (cmA & (1 << i)) != 0 ) { + fMcmlist[nmcm] = ((linkpair*2) << 7) | i; + ++nmcm; + } + if( (cmB & (1 << i)) != 0 ) { + fMcmlist[nmcm] = ((linkpair*2+1) << 7) | i; + ++nmcm; + } + } + + fMcmlist[nmcm]=-1; + return nmcm; +} + + +AliTRDtrapConfig::TrapReg_t AliTRDtrapConfig::GetRegByAddress(Int_t address) const +{ // get register by its address // used for reading of configuration data as sent to real FEE - TrapReg_t mcmReg = kLastReg; - Int_t reg = 0; - do { - if(fRegs[reg].fAddr == address) - mcmReg = (TrapReg_t) reg; - reg++; - } while (mcmReg == kLastReg && reg < kLastReg); - - return mcmReg; -} - - + TrapReg_t mcmReg = kLastReg; + Int_t reg = 0; + do { + if(fRegs[reg].fAddr == address) + mcmReg = (TrapReg_t) reg; + reg++; + } while (mcmReg == kLastReg && reg < kLastReg); + + return mcmReg; +} + + diff --git a/TRD/AliTRDtrapConfig.h b/TRD/AliTRDtrapConfig.h index af4a7f072c0..a4753105112 100644 --- a/TRD/AliTRDtrapConfig.h +++ b/TRD/AliTRDtrapConfig.h @@ -1,5 +1,5 @@ -#ifndef ALITRDTRAPCONFIG_H -#define ALITRDTRAPCONFIG_H +#ifndef ALITRDTRAPCONFIG_H +#define ALITRDTRAPCONFIG_H /* Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. * * See cxx source for full Copyright notice */ @@ -8,543 +8,563 @@ // in the TRD FEE // - -#include -#include -#include - -class AliTRDtrapConfig : public TObject -{ - public: - static AliTRDtrapConfig* Instance(); - - enum TrapReg_t { kSML0, - kSML1, - kSML2, - kSMMODE, - kNITM0, - kNITM1, - kNITM2, - kNIP4D, - kCPU0CLK, - kCPU1CLK, - kCPU2CLK, - kCPU3CLK, - kNICLK, - kFILCLK, - kPRECLK, - kADCEN, - kNIODE, - kNIOCE, - kNIIDE, - kNIICE, - kARBTIM, - kIA0IRQ0, - kIA0IRQ1, - kIA0IRQ2, - kIA0IRQ3, - kIA0IRQ4, - kIA0IRQ5, - kIA0IRQ6, - kIA0IRQ7, - kIA0IRQ8, - kIA0IRQ9, - kIA0IRQA, - kIA0IRQB, - kIA0IRQC, - kIRQSW0, - kIRQHW0, - kIRQHL0, - kIA1IRQ0, - kIA1IRQ1, - kIA1IRQ2, - kIA1IRQ3, - kIA1IRQ4, - kIA1IRQ5, - kIA1IRQ6, - kIA1IRQ7, - kIA1IRQ8, - kIA1IRQ9, - kIA1IRQA, - kIA1IRQB, - kIA1IRQC, - kIRQSW1, - kIRQHW1, - kIRQHL1, - kIA2IRQ0, - kIA2IRQ1, - kIA2IRQ2, - kIA2IRQ3, - kIA2IRQ4, - kIA2IRQ5, - kIA2IRQ6, - kIA2IRQ7, - kIA2IRQ8, - kIA2IRQ9, - kIA2IRQA, - kIA2IRQB, - kIA2IRQC, - kIRQSW2, - kIRQHW2, - kIRQHL2, - kIA3IRQ0, - kIA3IRQ1, - kIA3IRQ2, - kIA3IRQ3, - kIA3IRQ4, - kIA3IRQ5, - kIA3IRQ6, - kIA3IRQ7, - kIA3IRQ8, - kIA3IRQ9, - kIA3IRQA, - kIA3IRQB, - kIA3IRQC, - kIRQSW3, - kIRQHW3, - kIRQHL3, - kCTGDINI, - kCTGCTRL, - kC08CPU0, - kC09CPU0, - kC10CPU0, - kC11CPU0, - kC12CPUA, - kC13CPUA, - kC14CPUA, - kC15CPUA, - kC08CPU1, - kC09CPU1, - kC10CPU1, - kC11CPU1, - kC08CPU2, - kC09CPU2, - kC10CPU2, - kC11CPU2, - kC08CPU3, - kC09CPU3, - kC10CPU3, - kC11CPU3, - kNMOD, - kNDLY, - kNED, - kNTRO, - kNRRO, - kNES, - kNTP, - kNBND, - kNP0, - kNP1, - kNP2, - kNP3, - kNCUT, - kTPPT0, - kTPFS, - kTPFE, - kTPPGR, - kTPPAE, - kTPQS0, - kTPQE0, - kTPQS1, - kTPQE1, - kEBD, - kEBAQA, - kEBSIA, - kEBSF, - kEBSIM, - kEBPP, - kEBPC, - kEBIS, - kEBIT, - kEBIL, - kEBIN, - kFLBY, - kFPBY, - kFGBY, - kFTBY, - kFCBY, - kFPTC, - kFPNP, - kFPCL, - kFGTA, - kFGTB, - kFGCL, - kFTAL, - kFTLL, - kFTLS, - kFCW1, - kFCW2, - kFCW3, - kFCW4, - kFCW5, - kTPFP, - kTPHT, - kTPVT, - kTPVBY, - kTPCT, - kTPCL, - kTPCBY, - kTPD, - kTPCI0, - kTPCI1, - kTPCI2, - kTPCI3, - kADCMSK, - kADCINB, - kADCDAC, - kADCPAR, - kADCTST, - kSADCAZ, - kFGF0, - kFGF1, - kFGF2, - kFGF3, - kFGF4, - kFGF5, - kFGF6, - kFGF7, - kFGF8, - kFGF9, - kFGF10, - kFGF11, - kFGF12, - kFGF13, - kFGF14, - kFGF15, - kFGF16, - kFGF17, - kFGF18, - kFGF19, - kFGF20, - kFGA0, - kFGA1, - kFGA2, - kFGA3, - kFGA4, - kFGA5, - kFGA6, - kFGA7, - kFGA8, - kFGA9, - kFGA10, - kFGA11, - kFGA12, - kFGA13, - kFGA14, - kFGA15, - kFGA16, - kFGA17, - kFGA18, - kFGA19, - kFGA20, - kFLL00, - kFLL01, - kFLL02, - kFLL03, - kFLL04, - kFLL05, - kFLL06, - kFLL07, - kFLL08, - kFLL09, - kFLL0A, - kFLL0B, - kFLL0C, - kFLL0D, - kFLL0E, - kFLL0F, - kFLL10, - kFLL11, - kFLL12, - kFLL13, - kFLL14, - kFLL15, - kFLL16, - kFLL17, - kFLL18, - kFLL19, - kFLL1A, - kFLL1B, - kFLL1C, - kFLL1D, - kFLL1E, - kFLL1F, - kFLL20, - kFLL21, - kFLL22, - kFLL23, - kFLL24, - kFLL25, - kFLL26, - kFLL27, - kFLL28, - kFLL29, - kFLL2A, - kFLL2B, - kFLL2C, - kFLL2D, - kFLL2E, - kFLL2F, - kFLL30, - kFLL31, - kFLL32, - kFLL33, - kFLL34, - kFLL35, - kFLL36, - kFLL37, - kFLL38, - kFLL39, - kFLL3A, - kFLL3B, - kFLL3C, - kFLL3D, - kFLL3E, - kFLL3F, - kPASADEL, - kPASAPHA, - kPASAPRA, - kPASADAC, - kPASACHM, - kPASASTL, - kPASAPR1, - kPASAPR0, - kSADCTRG, - kSADCRUN, - kSADCPWR, - kL0TSIM, - kSADCEC, - kSADCMC, - kSADCOC, - kSADCGTB, - kSEBDEN, - kSEBDOU, - kTPL00, - kTPL01, - kTPL02, - kTPL03, - kTPL04, - kTPL05, - kTPL06, - kTPL07, - kTPL08, - kTPL09, - kTPL0A, - kTPL0B, - kTPL0C, - kTPL0D, - kTPL0E, - kTPL0F, - kTPL10, - kTPL11, - kTPL12, - kTPL13, - kTPL14, - kTPL15, - kTPL16, - kTPL17, - kTPL18, - kTPL19, - kTPL1A, - kTPL1B, - kTPL1C, - kTPL1D, - kTPL1E, - kTPL1F, - kTPL20, - kTPL21, - kTPL22, - kTPL23, - kTPL24, - kTPL25, - kTPL26, - kTPL27, - kTPL28, - kTPL29, - kTPL2A, - kTPL2B, - kTPL2C, - kTPL2D, - kTPL2E, - kTPL2F, - kTPL30, - kTPL31, - kTPL32, - kTPL33, - kTPL34, - kTPL35, - kTPL36, - kTPL37, - kTPL38, - kTPL39, - kTPL3A, - kTPL3B, - kTPL3C, - kTPL3D, - kTPL3E, - kTPL3F, - kTPL40, - kTPL41, - kTPL42, - kTPL43, - kTPL44, - kTPL45, - kTPL46, - kTPL47, - kTPL48, - kTPL49, - kTPL4A, - kTPL4B, - kTPL4C, - kTPL4D, - kTPL4E, - kTPL4F, - kTPL50, - kTPL51, - kTPL52, - kTPL53, - kTPL54, - kTPL55, - kTPL56, - kTPL57, - kTPL58, - kTPL59, - kTPL5A, - kTPL5B, - kTPL5C, - kTPL5D, - kTPL5E, - kTPL5F, - kTPL60, - kTPL61, - kTPL62, - kTPL63, - kTPL64, - kTPL65, - kTPL66, - kTPL67, - kTPL68, - kTPL69, - kTPL6A, - kTPL6B, - kTPL6C, - kTPL6D, - kTPL6E, - kTPL6F, - kTPL70, - kTPL71, - kTPL72, - kTPL73, - kTPL74, - kTPL75, - kTPL76, - kTPL77, - kTPL78, - kTPL79, - kTPL7A, - kTPL7B, - kTPL7C, - kTPL7D, - kTPL7E, - kTPL7F, - kMEMRW, - kMEMCOR, - kDMDELA, - kDMDELS, - kLastReg }; // enum of all TRAP registers, to be used for access to them - - const char* GetRegName(TrapReg_t reg) const { return fRegs[reg].fName.Data(); } - UShort_t GetRegAddress(TrapReg_t reg) const { return fRegs[reg].fAddr; } - UShort_t GetRegNBits(TrapReg_t reg) const { return fRegs[reg].fNbits; } - UInt_t GetRegResetValue(TrapReg_t reg) const { return fRegs[reg].fResetValue; } - - TrapReg_t GetRegByAddress(Int_t address) const; - - Int_t GetTrapReg(TrapReg_t reg, Int_t det = -1, Int_t rob = -1, Int_t mcm = -1); - Bool_t PrintTrapReg(TrapReg_t reg, Int_t det = -1, Int_t rob = -1, Int_t mcm = -1); - Bool_t PrintTrapAddr(Int_t addr, Int_t det = -1, Int_t rob = -1, Int_t mcm = -1); - - Bool_t SetTrapReg(TrapReg_t reg, Int_t value); - Bool_t SetTrapReg(TrapReg_t reg, Int_t value, Int_t det); - Bool_t SetTrapReg(TrapReg_t reg, Int_t value, Int_t det, Int_t rob, Int_t mcm); - - void InitRegs(); - void ResetRegs(); - - Bool_t LoadConfig(); - Bool_t LoadConfig(Int_t det, TString filename); - - Int_t ExtAliToAli( UInt_t dest, UShort_t linkpair, UShort_t rocType); - - protected: - static AliTRDtrapConfig *fgInstance; // pointer to instance (singleton) - - struct SimpleReg_t { - TString fName; // Name of the register - UShort_t fAddr; // Address in GIO of TRAP - UShort_t fNbits; // Number of bits, from 1 to 32 - UInt_t fResetValue; // reset value - SimpleReg_t(char *nnn = 0, UShort_t a = 0, UShort_t n = 0, UInt_t r = 0) : - fName(nnn), fAddr(a), fNbits(n), fResetValue(r) {} - }; - - struct RegValue_t { - enum { - kInvalid = 0, - kGlobal, - kIndividual - } state; // mode of storage (global or per MCM) - union { - Int_t globalValue; - Int_t *individualValue; - }; - }; - - SimpleReg_t fRegs[kLastReg]; // array of TRAP registers - RegValue_t fRegisterValue[kLastReg]; // array of TRAP register values in use - - Bool_t AddValues(UInt_t det, UInt_t cmd, UInt_t extali, UInt_t addr, UInt_t data); - Short_t GetRobAB( UShort_t robsel, UShort_t linkpair ) const; // Converts the ROB part of the extended ALICE ID to robs - Short_t ChipmaskToMCMlist( Int_t cmA, Int_t cmB, UShort_t linkpair ); // Converts the chipmask to a list of MCMs - - static const UInt_t fgkScsnCmdWrite=10; // Command number for the write command - static const Int_t fgkMaxLinkPairs=4; // number of linkpairs used during configuration - static const Int_t fgkMaxMcm; // max. no. of MCMs to be treated - static const Int_t fgkMcmlistSize=256; // list of MCMs to which a value has to be written - - Int_t fMcmlist[fgkMcmlistSize]; // stores the list of MCMs after the conversion from extAliID -> AliID - - AliTRDtrapConfig(); // private constructor due to singleton implementation - -/* not yet used - struct BlockDescr_t { - UShort_t addr; - UShort_t nregs; - UShort_t nbits; - UShort_t step; - }; - - struct CmdReg_t { - char *name; - UShort_t addr; - }; - - enum DbankProp_t { kDBankEmpty = 0, - kDBankHeader, - kDBankData, - kDBankNoB, - kDBankCRC, - kDBankEHeader, - kDBankSCSNData }; -*/ - + +#include +#include +#include + +class AliTRDtrapConfig : public TObject +{ + public: + static AliTRDtrapConfig* Instance(); + + enum TrapReg_t { kSML0, + kSML1, + kSML2, + kSMMODE, + kNITM0, + kNITM1, + kNITM2, + kNIP4D, + kCPU0CLK, + kCPU1CLK, + kCPU2CLK, + kCPU3CLK, + kNICLK, + kFILCLK, + kPRECLK, + kADCEN, + kNIODE, + kNIOCE, + kNIIDE, + kNIICE, + kARBTIM, + kIA0IRQ0, + kIA0IRQ1, + kIA0IRQ2, + kIA0IRQ3, + kIA0IRQ4, + kIA0IRQ5, + kIA0IRQ6, + kIA0IRQ7, + kIA0IRQ8, + kIA0IRQ9, + kIA0IRQA, + kIA0IRQB, + kIA0IRQC, + kIRQSW0, + kIRQHW0, + kIRQHL0, + kIA1IRQ0, + kIA1IRQ1, + kIA1IRQ2, + kIA1IRQ3, + kIA1IRQ4, + kIA1IRQ5, + kIA1IRQ6, + kIA1IRQ7, + kIA1IRQ8, + kIA1IRQ9, + kIA1IRQA, + kIA1IRQB, + kIA1IRQC, + kIRQSW1, + kIRQHW1, + kIRQHL1, + kIA2IRQ0, + kIA2IRQ1, + kIA2IRQ2, + kIA2IRQ3, + kIA2IRQ4, + kIA2IRQ5, + kIA2IRQ6, + kIA2IRQ7, + kIA2IRQ8, + kIA2IRQ9, + kIA2IRQA, + kIA2IRQB, + kIA2IRQC, + kIRQSW2, + kIRQHW2, + kIRQHL2, + kIA3IRQ0, + kIA3IRQ1, + kIA3IRQ2, + kIA3IRQ3, + kIA3IRQ4, + kIA3IRQ5, + kIA3IRQ6, + kIA3IRQ7, + kIA3IRQ8, + kIA3IRQ9, + kIA3IRQA, + kIA3IRQB, + kIA3IRQC, + kIRQSW3, + kIRQHW3, + kIRQHL3, + kCTGDINI, + kCTGCTRL, + kC08CPU0, + kC09CPU0, + kC10CPU0, + kC11CPU0, + kC12CPUA, + kC13CPUA, + kC14CPUA, + kC15CPUA, + kC08CPU1, + kC09CPU1, + kC10CPU1, + kC11CPU1, + kC08CPU2, + kC09CPU2, + kC10CPU2, + kC11CPU2, + kC08CPU3, + kC09CPU3, + kC10CPU3, + kC11CPU3, + kNMOD, + kNDLY, + kNED, + kNTRO, + kNRRO, + kNES, + kNTP, + kNBND, + kNP0, + kNP1, + kNP2, + kNP3, + kNCUT, + kTPPT0, + kTPFS, + kTPFE, + kTPPGR, + kTPPAE, + kTPQS0, + kTPQE0, + kTPQS1, + kTPQE1, + kEBD, + kEBAQA, + kEBSIA, + kEBSF, + kEBSIM, + kEBPP, + kEBPC, + kEBIS, + kEBIT, + kEBIL, + kEBIN, + kFLBY, + kFPBY, + kFGBY, + kFTBY, + kFCBY, + kFPTC, + kFPNP, + kFPCL, + kFGTA, + kFGTB, + kFGCL, + kFTAL, + kFTLL, + kFTLS, + kFCW1, + kFCW2, + kFCW3, + kFCW4, + kFCW5, + kTPFP, + kTPHT, + kTPVT, + kTPVBY, + kTPCT, + kTPCL, + kTPCBY, + kTPD, + kTPCI0, + kTPCI1, + kTPCI2, + kTPCI3, + kADCMSK, + kADCINB, + kADCDAC, + kADCPAR, + kADCTST, + kSADCAZ, + kFGF0, + kFGF1, + kFGF2, + kFGF3, + kFGF4, + kFGF5, + kFGF6, + kFGF7, + kFGF8, + kFGF9, + kFGF10, + kFGF11, + kFGF12, + kFGF13, + kFGF14, + kFGF15, + kFGF16, + kFGF17, + kFGF18, + kFGF19, + kFGF20, + kFGA0, + kFGA1, + kFGA2, + kFGA3, + kFGA4, + kFGA5, + kFGA6, + kFGA7, + kFGA8, + kFGA9, + kFGA10, + kFGA11, + kFGA12, + kFGA13, + kFGA14, + kFGA15, + kFGA16, + kFGA17, + kFGA18, + kFGA19, + kFGA20, + kFLL00, + kFLL01, + kFLL02, + kFLL03, + kFLL04, + kFLL05, + kFLL06, + kFLL07, + kFLL08, + kFLL09, + kFLL0A, + kFLL0B, + kFLL0C, + kFLL0D, + kFLL0E, + kFLL0F, + kFLL10, + kFLL11, + kFLL12, + kFLL13, + kFLL14, + kFLL15, + kFLL16, + kFLL17, + kFLL18, + kFLL19, + kFLL1A, + kFLL1B, + kFLL1C, + kFLL1D, + kFLL1E, + kFLL1F, + kFLL20, + kFLL21, + kFLL22, + kFLL23, + kFLL24, + kFLL25, + kFLL26, + kFLL27, + kFLL28, + kFLL29, + kFLL2A, + kFLL2B, + kFLL2C, + kFLL2D, + kFLL2E, + kFLL2F, + kFLL30, + kFLL31, + kFLL32, + kFLL33, + kFLL34, + kFLL35, + kFLL36, + kFLL37, + kFLL38, + kFLL39, + kFLL3A, + kFLL3B, + kFLL3C, + kFLL3D, + kFLL3E, + kFLL3F, + kPASADEL, + kPASAPHA, + kPASAPRA, + kPASADAC, + kPASACHM, + kPASASTL, + kPASAPR1, + kPASAPR0, + kSADCTRG, + kSADCRUN, + kSADCPWR, + kL0TSIM, + kSADCEC, + kSADCMC, + kSADCOC, + kSADCGTB, + kSEBDEN, + kSEBDOU, + kTPL00, + kTPL01, + kTPL02, + kTPL03, + kTPL04, + kTPL05, + kTPL06, + kTPL07, + kTPL08, + kTPL09, + kTPL0A, + kTPL0B, + kTPL0C, + kTPL0D, + kTPL0E, + kTPL0F, + kTPL10, + kTPL11, + kTPL12, + kTPL13, + kTPL14, + kTPL15, + kTPL16, + kTPL17, + kTPL18, + kTPL19, + kTPL1A, + kTPL1B, + kTPL1C, + kTPL1D, + kTPL1E, + kTPL1F, + kTPL20, + kTPL21, + kTPL22, + kTPL23, + kTPL24, + kTPL25, + kTPL26, + kTPL27, + kTPL28, + kTPL29, + kTPL2A, + kTPL2B, + kTPL2C, + kTPL2D, + kTPL2E, + kTPL2F, + kTPL30, + kTPL31, + kTPL32, + kTPL33, + kTPL34, + kTPL35, + kTPL36, + kTPL37, + kTPL38, + kTPL39, + kTPL3A, + kTPL3B, + kTPL3C, + kTPL3D, + kTPL3E, + kTPL3F, + kTPL40, + kTPL41, + kTPL42, + kTPL43, + kTPL44, + kTPL45, + kTPL46, + kTPL47, + kTPL48, + kTPL49, + kTPL4A, + kTPL4B, + kTPL4C, + kTPL4D, + kTPL4E, + kTPL4F, + kTPL50, + kTPL51, + kTPL52, + kTPL53, + kTPL54, + kTPL55, + kTPL56, + kTPL57, + kTPL58, + kTPL59, + kTPL5A, + kTPL5B, + kTPL5C, + kTPL5D, + kTPL5E, + kTPL5F, + kTPL60, + kTPL61, + kTPL62, + kTPL63, + kTPL64, + kTPL65, + kTPL66, + kTPL67, + kTPL68, + kTPL69, + kTPL6A, + kTPL6B, + kTPL6C, + kTPL6D, + kTPL6E, + kTPL6F, + kTPL70, + kTPL71, + kTPL72, + kTPL73, + kTPL74, + kTPL75, + kTPL76, + kTPL77, + kTPL78, + kTPL79, + kTPL7A, + kTPL7B, + kTPL7C, + kTPL7D, + kTPL7E, + kTPL7F, + kMEMRW, + kMEMCOR, + kDMDELA, + kDMDELS, + kLastReg }; // enum of all TRAP registers, to be used for access to them + + const char* GetRegName(TrapReg_t reg) const { return fRegs[reg].fName.Data(); } + UShort_t GetRegAddress(TrapReg_t reg) const { return fRegs[reg].fAddr; } + UShort_t GetRegNBits(TrapReg_t reg) const { return fRegs[reg].fNbits; } + UInt_t GetRegResetValue(TrapReg_t reg) const { return fRegs[reg].fResetValue; } + + TrapReg_t GetRegByAddress(Int_t address) const; + + Int_t GetTrapReg(TrapReg_t reg, Int_t det = -1, Int_t rob = -1, Int_t mcm = -1); + Bool_t PrintTrapReg(TrapReg_t reg, Int_t det = -1, Int_t rob = -1, Int_t mcm = -1); + Bool_t PrintTrapAddr(Int_t addr, Int_t det = -1, Int_t rob = -1, Int_t mcm = -1); + + Bool_t SetTrapReg(TrapReg_t reg, Int_t value); + Bool_t SetTrapReg(TrapReg_t reg, Int_t value, Int_t det); + Bool_t SetTrapReg(TrapReg_t reg, Int_t value, Int_t det, Int_t rob, Int_t mcm); + + Int_t Peek(Int_t addr, Int_t det, Int_t rob, Int_t mcm); + Bool_t Poke(Int_t addr, Int_t value, Int_t det, Int_t rob, Int_t mcm); + + void InitRegs(); + void ResetRegs(); + + // DMEM + Bool_t SetDmem(Int_t addr, Int_t value); + Bool_t SetDmem(Int_t addr, Int_t value, Int_t det); + Bool_t SetDmem(Int_t addr, Int_t value, Int_t det, Int_t rob, Int_t mcm); + + Int_t GetDmem(Int_t addr, Int_t det, Int_t rob, Int_t mcm); + + // configuration handling + Bool_t LoadConfig(); + Bool_t LoadConfig(Int_t det, TString filename); + + Bool_t ReadPackedConfig(UInt_t *data, Int_t size); + + Int_t ExtAliToAli( UInt_t dest, UShort_t linkpair, UShort_t rocType); + + protected: + static AliTRDtrapConfig *fgInstance; // pointer to instance (singleton) + + struct SimpleReg_t { + TString fName; // Name of the register + UShort_t fAddr; // Address in GIO of TRAP + UShort_t fNbits; // Number of bits, from 1 to 32 + UInt_t fResetValue; // reset value + SimpleReg_t(const char *nnn = 0, UShort_t a = 0, UShort_t n = 0, UInt_t r = 0) : + fName(nnn), fAddr(a), fNbits(n), fResetValue(r) {} + }; + + struct RegValue_t { + enum { + kInvalid = 0, + kGlobal, + kIndividual + } state; // mode of storage (global or per MCM) + union { + Int_t globalValue; + Int_t *individualValue; + }; + }; + + // configuration registers + SimpleReg_t fRegs[kLastReg]; // array of TRAP registers + RegValue_t fRegisterValue[kLastReg]; // array of TRAP register values in use + + Bool_t AddValues(UInt_t det, UInt_t cmd, UInt_t extali, Int_t addr, UInt_t data); + Short_t GetRobAB( UShort_t robsel, UShort_t linkpair ) const; // Converts the ROB part of the extended ALICE ID to robs + Short_t ChipmaskToMCMlist( Int_t cmA, Int_t cmB, UShort_t linkpair ); // Converts the chipmask to a list of MCMs + + static const UInt_t fgkScsnCmdWrite=10; // Command number for the write command + static const Int_t fgkMaxLinkPairs=4; // number of linkpairs used during configuration + static const Int_t fgkMaxMcm; // max. no. of MCMs to be treated + static const Int_t fgkMcmlistSize=256; // list of MCMs to which a value has to be written + + Int_t fMcmlist[fgkMcmlistSize]; // stores the list of MCMs after the conversion from extAliID -> AliID + + // DMEM + static const Int_t fgkDmemStartAddress; // = 0xc000; // start address in TRAP GIO + static const Int_t fgkDmemWords = 0x400; // number of words in DMEM + UInt_t fDmem[540*8*18][fgkDmemWords]; + Bool_t fDmemValid[540*8*18][fgkDmemWords]; + + AliTRDtrapConfig(); // private constructor due to singleton implementation + +/* not yet used + struct BlockDescr_t { + UShort_t addr; + UShort_t nregs; + UShort_t nbits; + UShort_t step; + }; + + struct CmdReg_t { + char *name; + UShort_t addr; + }; + + enum DbankProp_t { kDBankEmpty = 0, + kDBankHeader, + kDBankData, + kDBankNoB, + kDBankCRC, + kDBankEHeader, + kDBankSCSNData }; +*/ + private: AliTRDtrapConfig& operator=(const AliTRDtrapConfig &rhs); // not implemented AliTRDtrapConfig(const AliTRDtrapConfig& cfg); // not implemented - ClassDef(AliTRDtrapConfig, 2); -}; - -#endif - + ClassDef(AliTRDtrapConfig, 2); +}; + +#endif + -- 2.43.0