From 4d2d44abe675791b302ec16b4212583d1294a02f Mon Sep 17 00:00:00 2001 From: ivana Date: Fri, 16 Nov 2007 14:52:07 +0000 Subject: [PATCH] - Added class for Global Crate object - Merged online regionnal crate file and aliroot crate file (crate.dat), simplified format, keep old file for the moment (Christian) --- MUON/mapping/AliMpGlobalCrate.cxx | 191 +++++ MUON/mapping/AliMpGlobalCrate.h | 218 +++++ .../data/stationTrigger/GlobalCrate.dat | 61 ++ .../data/stationTrigger/RegionalCrate.dat | 806 ++++++++++++++++++ 4 files changed, 1276 insertions(+) create mode 100644 MUON/mapping/AliMpGlobalCrate.cxx create mode 100644 MUON/mapping/AliMpGlobalCrate.h create mode 100644 MUON/mapping/data/stationTrigger/GlobalCrate.dat create mode 100644 MUON/mapping/data/stationTrigger/RegionalCrate.dat diff --git a/MUON/mapping/AliMpGlobalCrate.cxx b/MUON/mapping/AliMpGlobalCrate.cxx new file mode 100644 index 00000000000..2b5bbc747b6 --- /dev/null +++ b/MUON/mapping/AliMpGlobalCrate.cxx @@ -0,0 +1,191 @@ +/************************************************************************** + * Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. * + * * + * Author: The ALICE Off-line Project. * + * Contributors are mentioned in the code where appropriate. * + * * + * Permission to use, copy, modify and distribute this software and its * + * documentation strictly for non-commercial purposes is hereby granted * + * without fee, provided that the above copyright notice appears in all * + * copies and that both the copyright notice and this permission notice * + * appear in the supporting documentation. The authors make no claims * + * about the suitability of this software for any purpose. It is * + * provided "as is" without express or implied warranty. * + **************************************************************************/ + +// $Id$ +// $MpId: AliMpTrigger.cxx,v 1.4 2006/05/24 13:58:52 ivana Exp $ + +//----------------------------------------------------------------------------- +// Class AliMpGlobalCrate +// -------------------- +// The class defines the properties of trigger crate +// Author: Ch. Finck, Subatech Nantes +//----------------------------------------------------------------------------- + +#include "AliMpGlobalCrate.h" +#include "AliMpDEManager.h" +#include "AliMpConstants.h" + +#include "AliLog.h" + +#include + +/// \cond CLASSIMP +ClassImp(AliMpGlobalCrate) +/// \endcond + +const Char_t* AliMpGlobalCrate::fgkJtagName = "JtagBoard"; +const Char_t* AliMpGlobalCrate::fgkFirstDarcName = "LeftDarcBoard"; +const Char_t* AliMpGlobalCrate::fgkSecondDarcName = "RightDarcBoard"; +const Char_t* AliMpGlobalCrate::fgkGlobalName = "GlobalBoard"; +const Char_t* AliMpGlobalCrate::fgkFetName = "FetBoard"; + +const Int_t AliMpGlobalCrate::fgkGlobalNofRegisters = 13; +const Int_t AliMpGlobalCrate::fgkFetNofRegisters = 7; +const Int_t AliMpGlobalCrate::fgkJtagNofLines = 4; +//______________________________________________________________________________ +AliMpGlobalCrate::AliMpGlobalCrate() + : TNamed("GlobalCrate", "mapping trigger global crate"), + fJtagVmeAddr(0x0), + fJtagClockDiv(0), + fJtagRxPhase(0), + fJtagRdDelay(0), + fEnableJtag(0), + fJtagCrateName(), + fFirstDarcVmeAddr(0x0), + fFirstDarcType(0), + fFirstDarcDisable(0), + fFirstDarcL0Delay(0), + fFirstDarcL1TimeOut(0), + fSecondDarcVmeAddr(0x0), + fSecondDarcType(0), + fSecondDarcDisable(0), + fSecondDarcL0Delay(0), + fSecondDarcL1TimeOut(0), + fGlobalVmeAddr(0x0), + fFetVmeAddr(0x0) +{ + + for (Int_t i = 0; i < fgkGlobalNofRegisters; ++i) + fGlobalRegisters[i] = 0; + + for (Int_t j = 0; j < fgkFetNofRegisters; ++j) + fFetRegisters[j] = 0; + + + + +/// Standard constructor +} + +//______________________________________________________________________________ +AliMpGlobalCrate::AliMpGlobalCrate(TRootIOCtor* /*ioCtor*/) + : TNamed("GlobalCrate", "mapping trigger global crate"), + fJtagVmeAddr(0x0), + fJtagClockDiv(0), + fJtagRxPhase(0), + fJtagRdDelay(0), + fEnableJtag(0), + fJtagCrateName(), + fFirstDarcVmeAddr(0x0), + fFirstDarcType(0), + fFirstDarcDisable(0), + fFirstDarcL0Delay(0), + fFirstDarcL1TimeOut(0), + fSecondDarcVmeAddr(0x0), + fSecondDarcType(0), + fSecondDarcDisable(0), + fSecondDarcL0Delay(0), + fSecondDarcL1TimeOut(0), + fGlobalVmeAddr(0x0), + fGlobalRegisters(), + fFetVmeAddr(0x0), + fFetRegisters() +{ +/// Root IO constructor +} + +//______________________________________________________________________________ +AliMpGlobalCrate::~AliMpGlobalCrate() +{ +/// Destructor +} + +//______________________________________________________________________________ +Bool_t AliMpGlobalCrate::GetEnableJtag(Int_t index) const +{ + /// returns enable mask for a given Jtag line + + if (index > fgkJtagNofLines) { + AliWarning("Index size too big for Jtag line"); + return kFALSE; + } + return ((fEnableJtag >> index) & 0x1); + +} + +//______________________________________________________________________________ +void AliMpGlobalCrate::SetJtagCrateName(Int_t index, TString name) +{ + /// Get Jtag crate name for a given index + if (index > AliMpConstants::LocalBoardNofChannels()) { + AliWarning("Index size too big for Jtag line"); + return; + } + fJtagCrateName[index] = name; +} + +//______________________________________________________________________________ +TString AliMpGlobalCrate::GetJtagCrateName(Int_t jtagLine, Int_t index) const +{ + /// Get the crate name for a given line and a given index + if (jtagLine > AliMpConstants::LocalBoardNofChannels() || index > AliMpConstants::LocalBoardNofChannels()) + return 0x0; + else + return fJtagCrateName[jtagLine*fgkJtagNofLines + index]; +} + +//______________________________________________________________________________ +UInt_t AliMpGlobalCrate::GetGlobalRegister(Int_t index) const +{ + /// return global register for a given index + if (index > fgkGlobalNofRegisters) { + AliWarning("Index size too big for Global Register"); + return 0; + } else + return fGlobalRegisters[index]; +} + +//______________________________________________________________________________ +void AliMpGlobalCrate::SetGlobalRegister(Int_t index, UInt_t reg) +{ + /// set Global register for a given index + if (index > fgkGlobalNofRegisters) { + AliWarning("Index size too big for Global Register"); + return; + } + fGlobalRegisters[index] = reg; +} + +//______________________________________________________________________________ +UInt_t AliMpGlobalCrate::GetFetRegister(Int_t index) const +{ + /// return global register for a given index + if (index > fgkFetNofRegisters) { + AliWarning("Index size too big for Fet Register"); + return 0; + } else + return fFetRegisters[index]; +} + +//______________________________________________________________________________ +void AliMpGlobalCrate::SetFetRegister(Int_t index, UInt_t reg) +{ + /// set Global register for a given index + if (index > fgkFetNofRegisters) { + AliWarning("Index size too big for Global Register"); + return; + } + fFetRegisters[index] = reg; +} diff --git a/MUON/mapping/AliMpGlobalCrate.h b/MUON/mapping/AliMpGlobalCrate.h new file mode 100644 index 00000000000..0e61ef3bb46 --- /dev/null +++ b/MUON/mapping/AliMpGlobalCrate.h @@ -0,0 +1,218 @@ +/* Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. * + * See cxx source for full Copyright notice */ + +// $MpId: $ + +/// \ingroup management +/// \class AliMpGlobalCrate +/// \brief The class defines the properties of global crate +/// +/// \author Ch. Finck, Subatech Nantes + +#ifndef ALI_MP_GLOBAL_CRATE_H +#define ALI_MP_GLOBAL_CRATE_H + +#include +#include + +class AliMpGlobalCrate : public TNamed { + + public: + AliMpGlobalCrate(); + AliMpGlobalCrate(TRootIOCtor* /*ioCtor*/); + virtual ~AliMpGlobalCrate(); + + + // Jtag + /// Get Jtag board VME address + ULong_t GetJtagVmeAddr() const {return fJtagVmeAddr;} + /// Set Jtag board VME address + void SetJtagVmeAddr(ULong_t addr) {fJtagVmeAddr = addr;} + + /// Get Jtag board Clock Divider + UInt_t GetJtagClockDiv() const {return fJtagClockDiv;} + /// Set Jtag board Clock Divider + void SetJtagClockDiv(UInt_t clk) {fJtagClockDiv = clk;} + + /// Get Jtag board Rx Phase + UInt_t GetJtagRxPhase() const {return fJtagRxPhase;} + /// Set Jtag board Rx Phase + void SetJtagRxPhase(UInt_t rx) {fJtagRxPhase = rx;} + + /// Get Jtag board Read out Delay + UInt_t GetJtagRdDelay() const {return fJtagRdDelay;} + /// Set Jtag board Read out Delay + void SetJtagRdDelay(UInt_t rd) {fJtagRdDelay = rd;} + + /// Get Jtag enabled lines + Bool_t GetEnableJtag(Int_t index) const; + /// Set Jtag enable word + void SetEnableJtag(UChar_t en) {fEnableJtag = en;} + /// Get Jtag enable word + UChar_t GetEnableJtag() const {return fEnableJtag;} + + /// Get Jtag Crate names + TString GetJtagCrateName(Int_t jtagLine, Int_t index) const; + /// Set Jtag Crate names + void SetJtagCrateName(Int_t index, TString name); + + // first Darc Board + /// Get First Darc board VME address + ULong_t GetFirstDarcVmeAddr() const {return fFirstDarcVmeAddr;} + /// Get First Darc board VME address + void SetFirstDarcVmeAddr(ULong_t addr) {fFirstDarcVmeAddr = addr;} + + /// Get type for First Darc board + Int_t GetFirstDarcType() const {return fFirstDarcType;} + /// Get type for First Darc board + void SetFirstDarcType(Int_t type) {fFirstDarcType = type;} + + /// Get disable word for First Darc board + UChar_t GetFirstDarcDisable() const {return fFirstDarcDisable;} + /// Get disable per regional crate for First Darc board + Bool_t GetFirstDarcDisable(Int_t iCrate) const {return !((fFirstDarcDisable >> iCrate) & 0x1);} + /// Set disable word for First Darc board + void SetFirstDarcDisable(UChar_t en) {fFirstDarcDisable = en;} + + /// Get L0 Delay for First Darc board + UInt_t GetFirstDarcL0Delay() const {return fFirstDarcL0Delay;} + /// Set L0 Delay for First Darc board + void SetFirstDarcL0Delay(UInt_t delay) {fFirstDarcL0Delay = delay;} + + /// Get L1 Time Out for First Darc board + UInt_t GetFirstDarcL1TimeOut() const {return fFirstDarcL1TimeOut;} + /// Set L1 Time Out for First Darc board + void SetFirstDarcL1TimeOut(UInt_t time) {fFirstDarcL1TimeOut = time;} + + // second Darc Board + /// Get Second Darc board VME address + ULong_t GetSecondDarcVmeAddr() const {return fSecondDarcVmeAddr;} + /// Set Second Darc board VME address + void SetSecondDarcVmeAddr(ULong_t addr) {fSecondDarcVmeAddr = addr;} + + /// Get type for Second Darc board + Int_t GetSecondDarcType() const {return fSecondDarcType;} + /// Set type for Second Darc board + void SetSecondDarcType(Int_t type) {fSecondDarcType = type;} + + /// Get disable word for Second Darc board + UChar_t GetSecondDarcDisable() const {return fSecondDarcDisable;} + /// Get disable per regional crate for Second Darc board + Bool_t GetSecondDarcDisable(Int_t iCrate) const {return !((fSecondDarcDisable >> iCrate) & 0x1);} + /// Set disable word for Second Darc board + void SetSecondDarcDisable(UChar_t en) {fSecondDarcDisable = en;} + + /// Get L0 Delay for Second Darc board + UInt_t GetSecondDarcL0Delay() const {return fSecondDarcL0Delay;} + /// Set L0 Delay for Second Darc board + void SetSecondDarcL0Delay(UInt_t delay) {fSecondDarcL0Delay = delay;} + /// Get L1 Time Out for Second Darc board + UInt_t GetSecondDarcL1TimeOut() const {return fSecondDarcL1TimeOut;} + /// Set L1 Time Out for Second Darc board + void SetSecondDarcL1TimeOut(UInt_t time) {fSecondDarcL1TimeOut = time;} + + // global board + /// Get Global board VME address + ULong_t GetGlobalVmeAddr() const {return fGlobalVmeAddr;} + /// Set Global board VME address + void SetGlobalVmeAddr(ULong_t addr) {fGlobalVmeAddr = addr;} + + /// Get register for Global + UInt_t GetGlobalRegister(Int_t index) const; + /// Set register for Global + void SetGlobalRegister(Int_t index, UInt_t reg); + /// Get register word for Global + UInt_t* GetGlobalRegister() {return fGlobalRegisters;} + + // fet board + /// Get FET board VME address + ULong_t GetFetVmeAddr() const {return fFetVmeAddr;} + /// Set FET board VME address + void SetFetVmeAddr(ULong_t addr) {fFetVmeAddr = addr;} + + /// Get register for FET + UInt_t GetFetRegister(Int_t index) const; + /// Set register for FET + void SetFetRegister(Int_t index, UInt_t reg); + /// Set register word for FET + UInt_t* GetFetRegister() {return fFetRegisters;} + + //static members + /// Get Jtag Name identifier + const Char_t* GetJtagName() const {return fgkJtagName;} + /// Get First Darc Name identifier + const Char_t* GetFirstDarcName() const {return fgkFirstDarcName;} + /// Get Second Darc Name identifier + const Char_t* GetSecondDarcName() const {return fgkSecondDarcName;} + /// Get Global Name identifier + const Char_t* GetGlobalName() const {return fgkGlobalName;} + /// Get Global Name identifier + const Char_t* GetFetName() const {return fgkFetName;} + + /// Get number of registers for Global + const Int_t GetGlobalNofRegisters() const {return fgkGlobalNofRegisters;} + /// Get number of registers for FET + const Int_t GetFetNofRegisters() const {return fgkFetNofRegisters;} + /// Get number of JTag lines + const Int_t GetJtagNofLines() const {return fgkJtagNofLines;} + + private: + /// Not implemented + AliMpGlobalCrate(const AliMpGlobalCrate& rhs); + /// Not implemented + AliMpGlobalCrate& operator=(const AliMpGlobalCrate& rhs); + + // data members + ULong_t fJtagVmeAddr; ///< JTag VME address + UInt_t fJtagClockDiv; ///< Clock Divider number for JTag + UInt_t fJtagRxPhase; ///< Rx phase number for JTag + UInt_t fJtagRdDelay; ///< Read delay for JTag + UChar_t fEnableJtag; ///< Enable mask for JTag lines + TString fJtagCrateName[16]; ///< Crate name for the Jtag lines + + ULong_t fFirstDarcVmeAddr; ///< First Darc Board VME Address + Int_t fFirstDarcType; ///< Type of the first Darc Board + UChar_t fFirstDarcDisable; ///< disable the readout of the 8 crates connected to this board + UInt_t fFirstDarcL0Delay; ///< L0 delay for this board + UInt_t fFirstDarcL1TimeOut; ///< L1 time out for this board + + ULong_t fSecondDarcVmeAddr; ///< Second Darc Board VME Address + Int_t fSecondDarcType; ///< Type of the first Darc Board + UChar_t fSecondDarcDisable; ///< disable the readout of the 8 crates connected to this board + UInt_t fSecondDarcL0Delay; ///< L0 delay for this board + UInt_t fSecondDarcL1TimeOut; ///< L1 time out for this board + + ULong_t fGlobalVmeAddr; ///< Global Board VME Address + UInt_t fGlobalRegisters[13]; ///< Global registers + + ULong_t fFetVmeAddr; ///< Fet Board VME Address + UInt_t fFetRegisters[7]; ///< Fet registers + + static const Char_t* fgkJtagName; ///< JTag Board name + static const Char_t* fgkFirstDarcName; ///< First DARC board name + static const Char_t* fgkSecondDarcName; ///< Second DARC board name + static const Char_t* fgkGlobalName; ///< Global Board name + static const Char_t* fgkFetName; ///< FET Board name + + static const Int_t fgkGlobalNofRegisters; ///< Number of registers for Global Board + static const Int_t fgkFetNofRegisters; ///< Number of registers for Fet + static const Int_t fgkJtagNofLines; ///< Number of lines for Jtag + + ClassDef(AliMpGlobalCrate,1) // The class collectiong electronics properties of DDL +}; + +#endif //ALI_MP_GLOBAL__CRATE_H + + + + + + + + + + + + + + diff --git a/MUON/mapping/data/stationTrigger/GlobalCrate.dat b/MUON/mapping/data/stationTrigger/GlobalCrate.dat new file mode 100644 index 00000000000..47cfa5680e2 --- /dev/null +++ b/MUON/mapping/data/stationTrigger/GlobalCrate.dat @@ -0,0 +1,61 @@ +GlobalCrate +JtagBoard +0x03000000 +3 0 1 +1 1 1 1 +0 + 1R + 2R + 5R + 4R +1 + 3R + 2-3R + 7R + 6R +2 + 2L + 1L + 4L + 5L +3 + 7L + 6L + 3L + 2-3L +LeftDarcBoard +0x01000000 +0 +0xfe +0xc +0xf0 +RightDarcBoard +0x02000000 +1 +0x00 +0xc +0xf0 +GlobalBoard +0x00400000 +0x0 +0x0 +0x0 +0x0 +0x0 +0x0 +0x0 +0x0 +0x0 +0x0 +0x0 +0x0 +0x0 +FetBoard +0x00aa0000 +0x0 +0x0 +0x18 +0x11 +0x0 +0x1 +0x0 diff --git a/MUON/mapping/data/stationTrigger/RegionalCrate.dat b/MUON/mapping/data/stationTrigger/RegionalCrate.dat new file mode 100644 index 00000000000..0e5e497ef3a --- /dev/null +++ b/MUON/mapping/data/stationTrigger/RegionalCrate.dat @@ -0,0 +1,806 @@ +1R +00 +2 +0 +ffff +01 RC1L1B12 001 1d4 + 1114 1214 1314 1414 + 0 0 0 0 0 +02 RC1L2B12 002 3b0 + 1115 1215 1315 1415 + 0 0 0 0 1 +03 RC1L2B34 003 340 + 1115 1215 1315 1415 + 0 0 0 0 1 +04 RC1L3B12 004 230 + 1116 1216 1316 1416 + 0 0 0 0 1 +05 RC1L3B34 005 040 + 1116 1216 1316 1416 + 0 0 0 0 1 +06 RC1L4B12 006 030 + 1117 1217 1317 1417 + 0 0 0 0 1 +07 RC1L4B34 007 010 + 1117 1217 1317 1417 + 0 0 0 0 1 +08 RC1L4B56 008 011 + 1117 1217 1317 1417 + 0 0 0 0 1 +09 RC1L6B12 009 014 + 1101 1201 1301 1401 + 0 0 0 0 1 +10 RC1L6B34 010 010 + 1101 1201 1301 1401 + 0 0 0 0 1 +11 RC1L6B56 011 050 + 1101 1201 1301 1401 + 0 0 0 0 1 +12 RC1L7B12 012 030 + 1102 1202 1302 1402 + 0 0 0 0 1 +13 RC1L7B34 013 0c0 + 1102 1202 1302 1402 + 0 0 0 0 1 +14 RC1L8B12 014 1b0 + 1103 1203 1303 1403 + 0 0 0 0 1 +15 RC1L8B34 015 3c0 + 1103 1203 1303 1403 + 0 0 0 0 1 +16 RC1L9B12 016 331 + 1104 1204 1304 1404 + 0 0 0 0 0 +2R +01 +2 +0 +ffff +01 RC2L1B12 017 1d4 + 1114 1214 1314 1414 + 0 0 0 0 0 +02 RC2L2B12 018 3b0 + 1115 1215 1315 1415 + 0 0 0 0 1 +03 RC2L2B34 019 340 + 1115 1215 1315 1415 + 0 0 0 0 1 +04 RC2L3B12 020 230 + 1116 1216 1316 1416 + 0 0 0 0 1 +05 RC2L3B34 021 040 + 1116 1216 1316 1416 + 0 0 0 0 1 +06 RC2L4B12 022 030 + 1117 1217 1317 1417 + 0 0 0 0 1 +07 RC2L4B34 023 010 + 1117 1217 1317 1417 + 0 0 0 0 1 +08 RC2L4B56 024 010 + 1117 1217 1317 1417 + 0 0 0 0 1 +09 RC2L4B78 025 050 + 1117 1217 1317 1417 + 0 0 0 0 1 +10 RC2L5B12 026 038 + 1100 1200 1300 1400 + 0 0 0 0 1 +11 RC2L5B34 027 018 + 1100 1200 1300 1400 + 0 0 0 0 1 +12 RC2L5B56 028 018 + 1100 1200 1300 1400 + 0 0 0 0 1 +13 RC2L5B78 029 058 + 1100 1200 1300 1400 + 0 0 0 0 1 +14 RC2L6B12 030 030 + 1101 1201 1301 1401 + 0 0 0 32 1 +15 RC2L6B34 031 000 + 1101 1201 1301 1401 + 0 236 0 236 1 +16 RIntC2-Up 235 010 + 0 + 32 0 32 0 0 +2-3R +02 +2 +0 +ffff +01 RIntC2-Dw 236 010 + 0 + 31 0 31 0 0 +02 RC2L6B56 032 010 + 1101 1201 1301 1401 + 0 235 30 235 1 +03 RC2L6B78 033 040 + 1101 1201 1301 1401 + 0 0 0 0 1 +04 RC2L7B12 034 030 + 1102 1202 1302 1402 + 0 0 0 0 1 +05 RC2L7B34 035 0c0 + 1102 1202 1302 1402 + 0 0 0 0 1 +06 RC2L8B12 036 1b0 + 1103 1203 1303 1403 + 0 0 0 0 1 +07 RC2L8B34 037 3c0 + 1103 1203 1303 1403 + 0 0 0 0 1 +08 RC2L9B12 038 331 + 1104 1204 1304 1404 + 0 0 0 0 0 +09 RintC3-Dw 237 010 + 0 + 53 0 53 0 0 +10 RC3L6B56 054 010 + 1101 1201 1301 1401 + 0 238 52 238 1 +11 RC3L6B78 055 040 + 1101 1201 1301 1401 + 0 0 0 0 1 +12 RC3L7B12 056 030 + 1102 1202 1302 1402 + 0 0 0 0 1 +13 RC3L7B34 057 0c0 + 1102 1202 1302 1402 + 0 0 0 0 1 +14 RC3L8B12 058 1b0 + 1103 1203 1303 1403 + 0 0 0 0 1 +15 RC3L8B34 059 3c0 + 1103 1203 1303 1403 + 0 0 0 0 1 +16 RC3L9B12 060 331 + 1104 1204 1304 1404 + 0 0 0 0 0 +3R +03 +2 +0 +ffff +01 RC3L1B12 039 1d4 + 1114 1214 1314 1414 + 0 0 0 0 0 +02 RC3L2B12 040 3b0 + 1115 1215 1315 1415 + 0 0 0 0 1 +03 RC3L2B34 041 340 + 1115 1215 1315 1415 + 0 0 0 0 1 +04 RC3L3B12 042 230 + 1116 1216 1316 1416 + 0 0 0 0 1 +05 RC3L3B34 043 040 + 1116 1216 1316 1416 + 0 0 0 0 1 +06 RC3L4B12 044 030 + 1117 1217 1317 1417 + 0 0 0 0 1 +07 RC3L4B34 045 010 + 1117 1217 1317 1417 + 0 0 0 0 1 +08 RC3L4B56 046 010 + 1117 1217 1317 1417 + 0 0 0 0 1 +09 RC3L4B78 047 050 + 1117 1217 1317 1417 + 0 0 0 0 1 +10 RC3L5B12 048 030 + 1100 1200 1300 1400 + 0 0 0 0 1 +11 RC3L5B34 049 010 + 1100 1200 1300 1400 + 0 0 0 0 1 +12 RC3L5B56 050 010 + 1100 1200 1300 1400 + 0 0 0 0 1 +13 RC3L5B78 051 050 + 1100 1200 1300 1400 + 0 0 0 0 1 +14 RC3L6B12 052 030 + 1101 1201 1301 1401 + 0 0 0 54 1 +15 RC3L6B34 053 000 + 1101 1201 1301 1401 + 0 237 0 237 1 +16 RIntC3-Up 238 010 + 0 + 54 0 54 0 0 +4R +04 +2 +0 +ffff +01 RC4L1B12 061 1d4 + 1114 1214 1314 1414 + 0 0 0 0 0 +02 RC4L2B12 062 3b0 + 1115 1215 1315 1415 + 0 0 0 0 1 +03 RC4L2B34 063 340 + 1115 1215 1315 1415 + 0 0 0 0 1 +04 RC4L3B12 064 230 + 1116 1216 1316 1416 + 0 0 0 0 1 +05 RC4L3B34 065 040 + 1116 1216 1316 1416 + 0 0 0 0 1 +06 RC4L4B12 066 030 + 1117 1217 1317 1417 + 0 0 0 0 1 +07 RC4L4B34 067 040 + 1117 1217 1317 1417 + 0 0 0 0 1 +08 RC4L5B12 068 030 + 1100 1200 1300 1400 + 0 0 0 0 1 +09 RC4L5B34 069 040 + 1100 1200 1300 1400 + 0 0 0 0 1 +10 RC4L6B12 070 030 + 1101 1201 1301 1401 + 0 0 0 0 1 +11 RC4L6B34 071 040 + 1101 1201 1301 1401 + 0 0 0 0 1 +12 RC4L7B12 072 030 + 1102 1202 1302 1402 + 0 0 0 0 1 +13 RC4L7B34 073 0c0 + 1102 1202 1302 1402 + 0 0 0 0 1 +14 RC4L8B12 074 1b0 + 1103 1203 1303 1403 + 0 0 0 0 1 +15 RC4L8B34 075 3c0 + 1103 1203 1303 1403 + 0 0 0 0 1 +16 RC4L9B12 076 331 + 1104 1204 1304 1404 + 0 0 0 0 0 +5R +05 +2 +0 +ffff +01 RC5L1B12 077 1d4 + 1114 1214 1314 1414 + 0 0 0 0 0 +02 RC5L2B12 078 3b0 + 1115 1215 1315 1415 + 0 0 0 0 1 +03 RC5L2B34 079 340 + 1115 1215 1315 1415 + 0 0 0 0 1 +04 RC5L3B12 080 230 + 1116 1216 1316 1416 + 0 0 0 0 1 +05 RC5L3B34 081 040 + 1116 1216 1316 1416 + 0 0 0 0 1 +06 RC5L4B12 082 030 + 1117 1217 1317 1417 + 0 0 0 0 1 +07 RC5L4B34 083 040 + 1117 1217 1317 1417 + 0 0 0 0 1 +08 RC5L5B12 084 030 + 1100 1200 1300 1400 + 0 0 0 0 1 +09 RC5L5B34 085 040 + 1100 1200 1300 1400 + 0 0 0 0 1 +10 RC5L6B12 086 030 + 1101 1201 1301 1401 + 0 0 0 0 1 +11 RC5L6B34 087 040 + 1101 1201 1301 1401 + 0 0 0 0 1 +12 RC5L7B12 088 030 + 1102 1202 1302 1402 + 0 0 0 0 1 +13 RC5L7B34 089 0c0 + 1102 1202 1302 1402 + 0 0 0 0 1 +14 RC5L8B12 090 1b0 + 1103 1203 1303 1403 + 0 0 0 0 1 +15 RC5L8B34 091 3c0 + 1103 1203 1303 1403 + 0 0 0 0 1 +16 RC5L9B12 092 331 + 1104 1204 1304 1404 + 0 0 0 0 0 +6R +06 +2 +0 +ffff +01 RC6L1B12 093 1d4 + 1114 1214 1314 1414 + 0 0 0 0 0 +02 RC6L2B12 094 3b0 + 1115 1215 1315 1415 + 0 0 0 0 1 +03 RC6L2B34 095 3c0 + 1115 1215 1315 1415 + 0 0 0 0 1 +04 RC6L3B12 096 3b0 + 1116 1216 1316 1416 + 0 0 0 0 1 +05 RC6L3B34 097 3c0 + 1116 1216 1316 1416 + 0 0 0 0 1 +06 RC6L4B12 098 3b0 + 1117 1217 1317 1417 + 0 0 0 0 1 +07 RC6L4B34 099 3c0 + 1117 1217 1317 1417 + 0 0 0 0 1 +08 RC6L5B12 100 3b0 + 1100 1200 1300 1400 + 0 0 0 0 1 +09 RC6L5B34 101 3c0 + 1100 1200 1300 1400 + 0 0 0 0 1 +10 RC6L6B12 102 3b0 + 1101 1201 1301 1401 + 0 0 0 0 1 +11 RC6L6B34 103 3c0 + 1101 1201 1301 1401 + 0 0 0 0 1 +12 RC6L7B12 104 3b0 + 1102 1202 1302 1402 + 0 0 0 0 1 +13 RC6L7B34 105 3c0 + 1102 1202 1302 1402 + 0 0 0 0 1 +14 RC6L8B12 106 3b0 + 1103 1203 1303 1403 + 0 0 0 0 1 +15 RC6L8B34 107 3c0 + 1103 1203 1303 1403 + 0 0 0 0 1 +16 RC6L9B12 108 331 + 1104 1204 1304 1404 + 0 0 0 0 0 +7R +07 +2 +0 +01ff +01 RC7L1B12 109 054 + 1114 1214 1314 1414 + 0 0 0 0 0 +02 RC7L2B12 110 070 + 1115 1215 1315 1415 + 0 0 0 0 0 +03 RC7L3B12 111 070 + 1116 1216 1316 1416 + 0 0 0 0 0 +04 RC7L4B12 112 070 + 1117 1217 1317 1417 + 0 0 0 0 0 +05 RC7L5B12 113 070 + 1100 1200 1300 1400 + 0 0 0 0 0 +06 RC7L6B12 114 070 + 1101 1201 1301 1401 + 0 0 0 0 0 +07 RC7L7B12 115 070 + 1102 1202 1302 1402 + 0 0 0 0 0 +08 RC7L8B12 116 070 + 1103 1203 1303 1403 + 0 0 0 0 0 +09 RC7L9B12 117 031 + 1104 1204 1304 1404 + 0 0 0 0 0 +1L +08 +2 +0 +ffff +01 LC1L1B12 118 1d4 + 1113 1213 1313 1413 + 0 0 0 0 0 +02 LC1L2B12 119 3b0 + 1112 1212 1312 1412 + 0 0 0 0 1 +03 LC1L2B34 120 340 + 1112 1212 1312 1412 + 0 0 0 0 1 +04 LC1L3B12 121 230 + 1111 1211 1311 1411 + 0 0 0 0 1 +05 LC1L3B34 122 040 + 1111 1211 1311 1411 + 0 0 0 0 1 +06 LC1L4B12 123 030 + 1110 1210 1310 1410 + 0 0 0 0 1 +07 LC1L4B34 124 010 + 1110 1210 1310 1410 + 0 0 0 0 1 +08 LC1L4B56 125 011 + 1110 1210 1310 1410 + 0 0 0 0 1 +09 LC1L6B12 126 014 + 1108 1208 1308 1408 + 0 0 0 0 1 +10 LC1L6B34 127 010 + 1108 1208 1308 1408 + 0 0 0 0 1 +11 LC1L6B56 128 050 + 1108 1208 1308 1408 + 0 0 0 0 1 +12 LC1L7B12 129 030 + 1107 1207 1307 1407 + 0 0 0 0 1 +13 LC1L7B34 130 0c0 + 1107 1207 1307 1407 + 0 0 0 0 1 +14 LC1L8B12 131 1b0 + 1106 1206 1306 1406 + 0 0 0 0 1 +15 LC1L8B34 132 3c0 + 1106 1206 1306 1406 + 0 0 0 0 1 +16 LC1L9B12 133 331 + 1105 1205 1305 1405 + 0 0 0 0 0 +2L +09 +2 +0 +ffff +01 LC2L1B12 134 1d4 + 1113 1213 1313 1413 + 0 0 0 0 0 +02 LC2L2B12 135 3b0 + 1112 1212 1312 1412 + 0 0 0 0 1 +03 LC2L2B34 136 340 + 1112 1212 1312 1412 + 0 0 0 0 1 +04 LC2L3B12 137 230 + 1111 1211 1311 1411 + 0 0 0 0 1 +05 LC2L3B34 138 040 + 1111 1211 1311 1411 + 0 0 0 0 1 +06 LC2L4B12 139 030 + 1110 1210 1310 1410 + 0 0 0 0 1 +07 LC2L4B34 140 010 + 1110 1210 1310 1410 + 0 0 0 0 1 +08 LC2L4B56 141 010 + 1110 1210 1310 1410 + 0 0 0 0 1 +09 LC2L4B78 142 050 + 1110 1210 1310 1410 + 0 0 0 0 1 +10 LC2L5B12 143 038 + 1109 1209 1309 1409 + 0 0 0 0 1 +11 LC2L5B34 144 018 + 1109 1209 1309 1409 + 0 0 0 0 1 +12 LC2L5B56 145 018 + 1109 1209 1309 1409 + 0 0 0 0 1 +13 LC2L5B78 146 058 + 1109 1209 1309 1409 + 0 0 0 0 1 +14 LC2L6B12 147 030 + 1108 1208 1308 1408 + 0 0 0 149 1 +15 LC2L6B34 148 000 + 1108 1208 1308 1408 + 0 240 0 240 1 +16 LIntC2-Up 239 010 + 0 + 149 0 149 0 0 +2-3L +0a +2 +0 +ffff +01 LIntC2-Dw 240 010 + 0 + 148 0 148 0 0 +02 LC2L6B56 149 010 + 1108 1208 1308 1408 + 0 239 147 239 1 +03 LC2L6B78 150 040 + 1108 1208 1308 1408 + 0 0 0 0 1 +04 LC2L7B12 151 030 + 1107 1207 1307 1407 + 0 0 0 0 1 +05 LC2L7B34 152 0c0 + 1107 1207 1307 1407 + 0 0 0 0 1 +06 LC2L8B12 153 1b0 + 1106 1206 1306 1406 + 0 0 0 0 1 +07 LC2L8B34 154 3c0 + 1106 1206 1306 1406 + 0 0 0 0 1 +08 LC2L9B12 155 331 + 1105 1205 1305 1405 + 0 0 0 0 0 +09 LintC3-Dw 241 010 + 0 + 170 0 170 0 0 +10 LC3L6B56 171 010 + 1108 1208 1308 1408 + 0 242 169 242 1 +11 LC3L6B78 172 040 + 1108 1208 1308 1408 + 0 0 0 0 1 +12 LC3L7B12 173 030 + 1107 1207 1307 1407 + 0 0 0 0 1 +13 LC3L7B34 174 0c0 + 1107 1207 1307 1407 + 0 0 0 0 1 +14 LC3L8B12 175 1b0 + 1106 1206 1306 1406 + 0 0 0 0 1 +15 LC3L8B34 176 3c0 + 1106 1206 1306 1406 + 0 0 0 0 1 +16 LC3L9B12 177 331 + 1105 1205 1305 1405 + 0 0 0 0 0 +3L +0b +2 +0 +ffff +01 LC3L1B12 156 1d4 + 1113 1213 1313 1413 + 0 0 0 0 0 +02 LC3L2B12 157 3b0 + 1112 1212 1312 1412 + 0 0 0 0 1 +03 LC3L2B34 158 340 + 1112 1212 1312 1412 + 0 0 0 0 1 +04 LC3L3B12 159 230 + 1111 1211 1311 1411 + 0 0 0 0 1 +05 LC3L3B34 160 040 + 1111 1211 1311 1411 + 0 0 0 0 1 +06 LC3L4B12 161 030 + 1110 1210 1310 1410 + 0 0 0 0 1 +07 LC3L4B34 162 010 + 1110 1210 1310 1410 + 0 0 0 0 1 +08 LC3L4B56 163 010 + 1110 1210 1310 1410 + 0 0 0 0 1 +09 LC3L4B78 164 050 + 1110 1210 1310 1410 + 0 0 0 0 1 +10 LC3L5B12 165 030 + 1109 1209 1309 1409 + 0 0 0 0 1 +11 LC3L5B34 166 010 + 1109 1209 1309 1409 + 0 0 0 0 1 +12 LC3L5B56 167 010 + 1109 1209 1309 1409 + 0 0 0 0 1 +13 LC3L5B78 168 050 + 1109 1209 1309 1409 + 0 0 0 0 1 +14 LC3L6B12 169 030 + 1108 1208 1308 1408 + 0 0 0 171 1 +15 LC3L6B34 170 000 + 1108 1208 1308 1408 + 0 241 0 241 1 +16 LIntC3-Up 242 010 + 0 + 171 0 171 0 0 +4L +0c +2 +0 +ffff +01 LC4L1B12 178 1d4 + 1113 1213 1313 1413 + 0 0 0 0 0 +02 LC4L2B12 179 3b0 + 1112 1212 1312 1412 + 0 0 0 0 1 +03 LC4L2B34 180 340 + 1112 1212 1312 1412 + 0 0 0 0 1 +04 LC4L3B12 181 230 + 1111 1211 1311 1411 + 0 0 0 0 1 +05 LC4L3B34 182 040 + 1111 1211 1311 1411 + 0 0 0 0 1 +06 LC4L4B12 183 030 + 1110 1210 1310 1410 + 0 0 0 0 1 +07 LC4L4B34 184 040 + 1110 1210 1310 1410 + 0 0 0 0 1 +08 LC4L5B12 185 030 + 1109 1209 1309 1409 + 0 0 0 0 1 +09 LC4L5B34 186 040 + 1109 1209 1309 1409 + 0 0 0 0 1 +10 LC4L6B12 187 030 + 1108 1208 1308 1408 + 0 0 0 0 1 +11 LC4L6B34 188 040 + 1108 1208 1308 1408 + 0 0 0 0 1 +12 LC4L7B12 189 030 + 1107 1207 1307 1407 + 0 0 0 0 1 +13 LC4L7B34 190 0c0 + 1107 1207 1307 1407 + 0 0 0 0 1 +14 LC4L8B12 191 1b0 + 1106 1206 1306 1406 + 0 0 0 0 1 +15 LC4L8B34 192 3c0 + 1106 1206 1306 1406 + 0 0 0 0 1 +16 LC4L9B12 193 331 + 1105 1205 1305 1405 + 0 0 0 0 0 +5L +0d +2 +0 +ffff +01 LC5L1B12 194 1d4 + 1113 1213 1313 1413 + 0 0 0 0 0 +02 LC5L2B12 195 3b0 + 1112 1212 1312 1412 + 0 0 0 0 1 +03 LC5L2B34 196 340 + 1112 1212 1312 1412 + 0 0 0 0 1 +04 LC5L3B12 197 230 + 1111 1211 1311 1411 + 0 0 0 0 1 +05 LC5L3B34 198 040 + 1111 1211 1311 1411 + 0 0 0 0 1 +06 LC5L4B12 199 030 + 1110 1210 1310 1410 + 0 0 0 0 1 +07 LC5L4B34 200 040 + 1110 1210 1310 1410 + 0 0 0 0 1 +08 LC5L5B12 201 030 + 1109 1209 1309 1409 + 0 0 0 0 1 +09 LC5L5B34 202 040 + 1109 1209 1309 1409 + 0 0 0 0 1 +10 LC5L6B12 203 030 + 1108 1208 1308 1408 + 0 0 0 0 1 +11 LC5L6B34 204 040 + 1108 1208 1308 1408 + 0 0 0 0 1 +12 LC5L7B12 205 030 + 1107 1207 1307 1407 + 0 0 0 0 1 +13 LC5L7B34 206 0c0 + 1107 1207 1307 1407 + 0 0 0 0 1 +14 LC5L8B12 207 1b0 + 1106 1206 1306 1406 + 0 0 0 0 1 +15 LC5L8B34 208 3c0 + 1106 1206 1306 1406 + 0 0 0 0 1 +16 LC5L9B12 209 331 + 1105 1205 1305 1405 + 0 0 0 0 0 +6L +0e +2 +0 +ffff +01 LC6L1B12 210 1d4 + 1113 1213 1313 1413 + 0 0 0 0 0 +02 LC6L2B12 211 3b0 + 1112 1212 1312 1412 + 0 0 0 0 1 +03 LC6L2B34 212 3c0 + 1112 1212 1312 1412 + 0 0 0 0 1 +04 LC6L3B12 213 3b0 + 1111 1211 1311 1411 + 0 0 0 0 1 +05 LC6L3B34 214 3c0 + 1111 1211 1311 1411 + 0 0 0 0 1 +06 LC6L4B12 215 3b0 + 1110 1210 1310 1410 + 0 0 0 0 1 +07 LC6L4B34 216 3c0 + 1110 1210 1310 1410 + 0 0 0 0 1 +08 LC6L5B12 217 3b0 + 1109 1209 1309 1409 + 0 0 0 0 1 +09 LC6L5B34 218 3c0 + 1109 1209 1309 1409 + 0 0 0 0 1 +10 LC6L6B12 219 3b0 + 1108 1208 1308 1408 + 0 0 0 0 1 +11 LC6L6B34 220 3c0 + 1108 1208 1308 1408 + 0 0 0 0 1 +12 LC6L7B12 221 3b0 + 1107 1207 1307 1407 + 0 0 0 0 1 +13 LC6L7B34 222 3c0 + 1107 1207 1307 1407 + 0 0 0 0 1 +14 LC6L8B12 223 3b0 + 1106 1206 1306 1406 + 0 0 0 0 1 +15 LC6L8B34 224 3c0 + 1106 1206 1306 1406 + 0 0 0 0 1 +16 LC6L9B12 225 331 + 1105 1205 1305 1405 + 0 0 0 0 0 +7L +0f +2 +0 +01ff +01 LC7L1B12 226 054 + 1113 1213 1313 1413 + 0 0 0 0 0 +02 LC7L2B12 227 070 + 1112 1212 1312 1412 + 0 0 0 0 0 +03 LC7L3B12 228 070 + 1111 1211 1311 1411 + 0 0 0 0 0 +04 LC7L4B12 229 070 + 1110 1210 1310 1410 + 0 0 0 0 0 +05 LC7L5B12 230 070 + 1109 1209 1309 1409 + 0 0 0 0 0 +06 LC7L6B12 231 070 + 1108 1208 1308 1408 + 0 0 0 0 0 +07 LC7L7B12 232 070 + 1107 1207 1307 1407 + 0 0 0 0 0 +08 LC7L8B12 233 070 + 1106 1206 1306 1406 + 0 0 0 0 0 +09 LC7L9B12 234 031 + 1105 1205 1305 1405 + 0 0 0 0 0 -- 2.43.0