set status bit for no L1/L2 trigger information
[u/mrichter/AliRoot.git] / RAW / libRAW.pkg
CommitLineData
04fa961a 1SRCS:= AliRawEvent.cxx \
2 AliRawReader.cxx AliRawReaderFile.cxx AliRawReaderRoot.cxx \
16048fcf 3 AliRawReaderDate.cxx \
04fa961a 4 AliTPCBuffer160.cxx AliTPCHuffman.cxx AliTPCCompression.cxx \
5 AliTPCRawStream.cxx \
6 AliITSRawStream.cxx AliITSRawStreamSPD.cxx \
dd1b1dd1 7 AliITSRawStreamSDD.cxx AliITSRawStreamSSD.cxx \
8 AliITSRawStreamSDDv2.cxx AliVMERawStream.cxx
04fa961a 9
10HDRS:= $(SRCS:.cxx=.h)
11
9474b131 12EHDRS:=$(ROOTSYS)/include/TH1F.h
13
14DHDR:= LinkDef.h
04fa961a 15
334cf0a1 16ifdef DATE_ROOT
17EINCLUDE+= ${DATE_COMMON_DEFS}
18endif