[u/mrichter/AliRoot.git] / TRD / AliTRDrawTPStream.h

#ifndef ALITRDRAWTPSTREAM_H\r\r
#define ALITRDRAWTPSTREAM_H\r\r
\r\r
/* Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *\r\r
 * See cxx source for full Copyright notice                               */\r\r
\r\r
/* $Id: AliTRDrawTPStream.h 27696 2008-07-31 09:18:53Z cblume $ */\r\r
\r\r
///////////////////////////////////////////////////////////////////////////////////////\r\r
//                                                                                   //\r\r
// This class provides access to pattern generated TRD raw data including            //\r\r
// configuration data.                                                               //\r\r
//                                                                                   //\r\r
///////////////////////////////////////////////////////////////////////////////////////\r\r
\r\r
\r\r
#define NREGS       433      // number of conf. registers\r\r
#define NCMD         16      // number of command registers\r\r
#define NRO          25      // number of command registers\r\r
#define N_BLOCKS      38      // number of blocks\r\r
#define N_BLOCKS_n    64      // number of blocks\r\r
#define N_PACKD_DAT 0xE0      // the max size of the packed conf., the absolute max is 256!\r\r
#define N_NO_BCST      3      // number of regs without broadcast\r\r
#define NDMEM     0x400      // number of DMEM words\r\r
#define NDBANK    0x100      // number of DBANK words\r\r
#define N_IMEM    0x1000      // number of IMEM words/CPU\r\r
#define IMEM_EMPTY 0x80000000 // mark for empty IMEM\r\r
#define DBANK_ADDR 0xF000     // start address of DBANK in GIO\r\r
#define DMEM_ADDR  0xC000     // start address of DMEM in GIO\r\r
#define ENDM_CONF  0x7FFF00FE // end marker for the packed configuration\r\r
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//#include "TObject.h"\r\r
//#include "TString.h"\r\r
#include "AliTRDrawStreamBase.h"\r\r
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class AliTRDrawTPStream : public AliTRDrawStreamBase\r\r
{ // class def begin\r\r
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 public:\r\r
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  struct SimpleRegs {\r\r
     const Char_t     * fkName;  //! Name of the register \r\r
     UInt_t	fAddr;    // Address in GIO of TRAP\r\r
     UInt_t	fNbits;   // Number of bits, from 1 to 32\r\r
     UInt_t	fResVal;  // reset value [mj]\r\r
  };\r\r
\r\r
  struct CmdRegs{\r\r
     const Char_t     * fkName;  //! Name of the command register\r\r
     UInt_t   	fAddr;    // Address in GIO of TRAP\r\r
  };\r\r
\r\r
  AliTRDrawTPStream(Int_t rawVMajorOpt, UInt_t * pPos);\r\r
  AliTRDrawTPStream(const AliTRDrawTPStream& st);\r\r
  AliTRDrawTPStream &operator=(const AliTRDrawTPStream &);\r\r
  virtual ~AliTRDrawTPStream();\r\r
\r\r
  Bool_t	DecodeTPdata();\r\r
  Bool_t	DecodeConfigdata();\r\r
  Bool_t	FillConfig();\r\r
  Int_t		ReadPacked(UInt_t *word, UInt_t *pdata, Int_t * const len);\r\r
  Int_t		UnPackConfN(const UInt_t *pData, Int_t maxLength);\r\r
  Int_t		SetU(UInt_t addr, UInt_t newVal);\r\r
  Int_t		AddrIsDmem(UInt_t addr) const;\r\r
  Int_t		AddrIsDbank(UInt_t addr) const;\r\r
  UInt_t	Addr2Idx(UInt_t addr) const;\r\r
  const Char_t	* Addr2Name(UInt_t addr) const; //!\r\r
  Char_t	CnfStat(UInt_t prop) const;\r\r
  void		PowerUp();\r\r
  void		DumpCnf(Int_t slv);\r\r
  \r\r
\r\r
\r\r
 protected:\r\r
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  enum DbankProp {kDbankEmpty=0, kDbankHeader, kDbankData, kDbankNoB, kDbankCrc32, kDbankEheader, kScsnDat}; \r\r
\r\r
  SimpleRegs fTrapReg[NREGS];       // all TRAP configuration registers \r\r
  CmdRegs    fCmdReg[NCMD];         // all TRAP command registers\r\r
  CmdRegs    fRoReg[NRO];           // all TRAP command registers\r\r
\r\r
  UInt_t     	fCnfPro[NREGS];     // something ...\r\r
  UInt_t     	fDmemValid[NDMEM];  // 0- empty, 1- valid\r\r
  UInt_t    	fRegs[NREGS];       // the actual content of all conf. registers\r\r
  UInt_t    	fDmem[NDMEM];       // content of the DMEM, in GIO from 0xC000 to 0xC3FF\r\r
  UInt_t    	fDbank[NDBANK];     // 32 bit data, to be send to DBANK\r\r
  DbankProp   	fDbankPro[NDBANK];  // property: 0-empty, 1- header, 2- data, 3- data no broadcast, 4- crc-32 checksum, 5- empty header\r\r
\r\r
  UInt_t	*fpPos;              //! current position in the buffer\r\r
  Int_t		fRawVMajorOpt;       // Raw data version\r\r
\r\r
\r\r
  ClassDef(AliTRDrawTPStream, 0)     // Pattern generated TRD raw data\r\r
\r\r
}; \r\r
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#endif\r\r
Commit	Line	Data
94ac01ef	1	#ifndef ALITRDRAWTPSTREAM_H\r\r
	2	#define ALITRDRAWTPSTREAM_H\r\r
	3	\r\r
	4	/* Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *\r\r
	5	* See cxx source for full Copyright notice */\r\r
	6	\r\r
	7	/* $Id: AliTRDrawTPStream.h 27696 2008-07-31 09:18:53Z cblume $ */\r\r
	8	\r\r
	9	///////////////////////////////////////////////////////////////////////////////////////\r\r
	10	// //\r\r
	11	// This class provides access to pattern generated TRD raw data including //\r\r
	12	// configuration data. //\r\r
	13	// //\r\r
	14	///////////////////////////////////////////////////////////////////////////////////////\r\r
	15	\r\r
	16	\r\r
	17	#define NREGS 433 // number of conf. registers\r\r
	18	#define NCMD 16 // number of command registers\r\r
	19	#define NRO 25 // number of command registers\r\r
	20	#define N_BLOCKS 38 // number of blocks\r\r
	21	#define N_BLOCKS_n 64 // number of blocks\r\r
	22	#define N_PACKD_DAT 0xE0 // the max size of the packed conf., the absolute max is 256!\r\r
	23	#define N_NO_BCST 3 // number of regs without broadcast\r\r
	24	#define NDMEM 0x400 // number of DMEM words\r\r
	25	#define NDBANK 0x100 // number of DBANK words\r\r
	26	#define N_IMEM 0x1000 // number of IMEM words/CPU\r\r
	27	#define IMEM_EMPTY 0x80000000 // mark for empty IMEM\r\r
	28	#define DBANK_ADDR 0xF000 // start address of DBANK in GIO\r\r
	29	#define DMEM_ADDR 0xC000 // start address of DMEM in GIO\r\r
	30	#define ENDM_CONF 0x7FFF00FE // end marker for the packed configuration\r\r
	31	\r\r
	32	//#include "TObject.h"\r\r
	33	//#include "TString.h"\r\r
	34	#include "AliTRDrawStreamBase.h"\r\r
	35	\r\r
	36	\r\r
	37	\r\r
	38	class AliTRDrawTPStream : public AliTRDrawStreamBase\r\r
	39	{ // class def begin\r\r
	40	\r\r
	41	public:\r\r
	42	\r\r
	43	struct SimpleRegs {\r\r
	44	const Char_t * fkName; //! Name of the register \r\r
	45	UInt_t fAddr; // Address in GIO of TRAP\r\r
	46	UInt_t fNbits; // Number of bits, from 1 to 32\r\r
	47	UInt_t fResVal; // reset value [mj]\r\r
	48	};\r\r
	49	\r\r
	50	struct CmdRegs{\r\r
	51	const Char_t * fkName; //! Name of the command register\r\r
	52	UInt_t fAddr; // Address in GIO of TRAP\r\r
	53	};\r\r
	54	\r\r
	55	AliTRDrawTPStream(Int_t rawVMajorOpt, UInt_t * pPos);\r\r
	56	AliTRDrawTPStream(const AliTRDrawTPStream& st);\r\r
	57	AliTRDrawTPStream &operator=(const AliTRDrawTPStream &);\r\r
	58	virtual ~AliTRDrawTPStream();\r\r
	59	\r\r
	60	Bool_t DecodeTPdata();\r\r
	61	Bool_t DecodeConfigdata();\r\r
	62	Bool_t FillConfig();\r\r
	63	Int_t ReadPacked(UInt_t word, UInt_t pdata, Int_t * const len);\r\r
	64	Int_t UnPackConfN(const UInt_t *pData, Int_t maxLength);\r\r
65	Int_t SetU(UInt_t addr, UInt_t newVal);\r\r
66	Int_t AddrIsDmem(UInt_t addr) const;\r\r
67	Int_t AddrIsDbank(UInt_t addr) const;\r\r
68	UInt_t Addr2Idx(UInt_t addr) const;\r\r
69	const Char_t * Addr2Name(UInt_t addr) const; //!\r\r
70	Char_t CnfStat(UInt_t prop) const;\r\r
71	void PowerUp();\r\r
72	void DumpCnf(Int_t slv);\r\r
73	\r\r
74	\r\r
75	\r\r
76	protected:\r\r
77	\r\r
78	enum DbankProp {kDbankEmpty=0, kDbankHeader, kDbankData, kDbankNoB, kDbankCrc32, kDbankEheader, kScsnDat}; \r\r
79	\r\r
80	SimpleRegs fTrapReg[NREGS]; // all TRAP configuration registers \r\r
81	CmdRegs fCmdReg[NCMD]; // all TRAP command registers\r\r
82	CmdRegs fRoReg[NRO]; // all TRAP command registers\r\r
83	\r\r
84	UInt_t fCnfPro[NREGS]; // something ...\r\r
85	UInt_t fDmemValid[NDMEM]; // 0- empty, 1- valid\r\r
86	UInt_t fRegs[NREGS]; // the actual content of all conf. registers\r\r
87	UInt_t fDmem[NDMEM]; // content of the DMEM, in GIO from 0xC000 to 0xC3FF\r\r
88	UInt_t fDbank[NDBANK]; // 32 bit data, to be send to DBANK\r\r
89	DbankProp fDbankPro[NDBANK]; // property: 0-empty, 1- header, 2- data, 3- data no broadcast, 4- crc-32 checksum, 5- empty header\r\r
90	\r\r
91	UInt_t *fpPos; //! current position in the buffer\r\r
92	Int_t fRawVMajorOpt; // Raw data version\r\r
93	\r\r
94	\r\r
95	ClassDef(AliTRDrawTPStream, 0) // Pattern generated TRD raw data\r\r
96	\r\r
97	}; \r\r
98	\r\r
99	#endif\r\r