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[u/mrichter/AliRoot.git] / TRD / AliTRDtrapConfig.cxx
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7627bf12 1#include "AliLog.h"\r
2\r
7d298182 3#include "AliTRDgeometry.h"\r
4#include "AliTRDfeeParam.h"\r
7627bf12 5#include "AliTRDtrapConfig.h"\r
6\r
7d298182 7#include <fstream>\r
8#include <iostream>\r
9#include <iomanip>\r
10\r
7627bf12 11ClassImp(AliTRDtrapConfig)\r
12\r
13AliTRDtrapConfig* AliTRDtrapConfig::fgInstance = 0x0;\r
7d298182 14const Int_t AliTRDtrapConfig::fgkMaxMcm = AliTRDfeeParam::GetNmcmRob() + 2;\r
7627bf12 15\r
16AliTRDtrapConfig::AliTRDtrapConfig() : \r
17 TObject()\r
18{\r
19 // default constructor, initializing array of TRAP registers\r
20\r
21 // Name Address Nbits Reset Value\r
22 fRegs[kSML0] = SimpleReg_t("SML0", 0x0A00, 15, 0x4050 ); // Global state machine\r
23 fRegs[kSML1] = SimpleReg_t("SML1", 0x0A01, 15, 0x4200 );\r
24 fRegs[kSML2] = SimpleReg_t("SML2", 0x0A02, 15, 0x4384 );\r
25 fRegs[kSMMODE] = SimpleReg_t("SMMODE", 0x0A03, 16, 0xF0E2 );\r
26 fRegs[kNITM0] = SimpleReg_t("NITM0", 0x0A08, 14, 0x3FFF );\r
27 fRegs[kNITM1] = SimpleReg_t("NITM1", 0x0A09, 14, 0x3FFF );\r
28 fRegs[kNITM2] = SimpleReg_t("NITM2", 0x0A0A, 14, 0x3FFF );\r
29 fRegs[kNIP4D] = SimpleReg_t("NIP4D", 0x0A0B, 7, 0x7F );\r
30 fRegs[kCPU0CLK] = SimpleReg_t("CPU0CLK", 0x0A20, 5, 0x07 );\r
31 fRegs[kCPU1CLK] = SimpleReg_t("CPU1CLK", 0x0A22, 5, 0x07 );\r
32 fRegs[kCPU2CLK] = SimpleReg_t("CPU2CLK", 0x0A24, 5, 0x07 );\r
33 fRegs[kCPU3CLK] = SimpleReg_t("CPU3CLK", 0x0A26, 5, 0x07 );\r
34 fRegs[kNICLK] = SimpleReg_t("NICLK", 0x0A28, 5, 0x07 );\r
35 fRegs[kFILCLK] = SimpleReg_t("FILCLK", 0x0A2A, 5, 0x07 );\r
36 fRegs[kPRECLK] = SimpleReg_t("PRECLK", 0x0A2C, 5, 0x07 );\r
37 fRegs[kADCEN] = SimpleReg_t("ADCEN", 0x0A2E, 5, 0x07 );\r
38 fRegs[kNIODE] = SimpleReg_t("NIODE", 0x0A30, 5, 0x07 );\r
39 fRegs[kNIOCE] = SimpleReg_t("NIOCE", 0x0A32, 6, 0x21 ); // bit 5 is status bit (read-only)!\r
40 fRegs[kNIIDE] = SimpleReg_t("NIIDE", 0x0A34, 5, 0x07 );\r
41 fRegs[kNIICE] = SimpleReg_t("NIICE", 0x0A36, 5, 0x07 );\r
42 fRegs[kARBTIM] = SimpleReg_t("ARBTIM", 0x0A3F, 4, 0x0 ); // Arbiter\r
43 fRegs[kIA0IRQ0] = SimpleReg_t("IA0IRQ0", 0x0B00, 12, 0x000 ); // IVT of CPU0\r
44 fRegs[kIA0IRQ1] = SimpleReg_t("IA0IRQ1", 0x0B01, 12, 0x000 );\r
45 fRegs[kIA0IRQ2] = SimpleReg_t("IA0IRQ2", 0x0B02, 12, 0x000 );\r
46 fRegs[kIA0IRQ3] = SimpleReg_t("IA0IRQ3", 0x0B03, 12, 0x000 );\r
47 fRegs[kIA0IRQ4] = SimpleReg_t("IA0IRQ4", 0x0B04, 12, 0x000 );\r
48 fRegs[kIA0IRQ5] = SimpleReg_t("IA0IRQ5", 0x0B05, 12, 0x000 );\r
49 fRegs[kIA0IRQ6] = SimpleReg_t("IA0IRQ6", 0x0B06, 12, 0x000 );\r
50 fRegs[kIA0IRQ7] = SimpleReg_t("IA0IRQ7", 0x0B07, 12, 0x000 );\r
51 fRegs[kIA0IRQ8] = SimpleReg_t("IA0IRQ8", 0x0B08, 12, 0x000 );\r
52 fRegs[kIA0IRQ9] = SimpleReg_t("IA0IRQ9", 0x0B09, 12, 0x000 );\r
53 fRegs[kIA0IRQA] = SimpleReg_t("IA0IRQA", 0x0B0A, 12, 0x000 );\r
54 fRegs[kIA0IRQB] = SimpleReg_t("IA0IRQB", 0x0B0B, 12, 0x000 );\r
55 fRegs[kIA0IRQC] = SimpleReg_t("IA0IRQC", 0x0B0C, 12, 0x000 );\r
56 fRegs[kIRQSW0] = SimpleReg_t("IRQSW0", 0x0B0D, 13, 0x1FFF );\r
57 fRegs[kIRQHW0] = SimpleReg_t("IRQHW0", 0x0B0E, 13, 0x0000 );\r
58 fRegs[kIRQHL0] = SimpleReg_t("IRQHL0", 0x0B0F, 13, 0x0000 );\r
59 fRegs[kIA1IRQ0] = SimpleReg_t("IA1IRQ0", 0x0B20, 12, 0x000 ); // IVT of CPU1\r
60 fRegs[kIA1IRQ1] = SimpleReg_t("IA1IRQ1", 0x0B21, 12, 0x000 );\r
61 fRegs[kIA1IRQ2] = SimpleReg_t("IA1IRQ2", 0x0B22, 12, 0x000 );\r
62 fRegs[kIA1IRQ3] = SimpleReg_t("IA1IRQ3", 0x0B23, 12, 0x000 );\r
63 fRegs[kIA1IRQ4] = SimpleReg_t("IA1IRQ4", 0x0B24, 12, 0x000 );\r
64 fRegs[kIA1IRQ5] = SimpleReg_t("IA1IRQ5", 0x0B25, 12, 0x000 );\r
65 fRegs[kIA1IRQ6] = SimpleReg_t("IA1IRQ6", 0x0B26, 12, 0x000 );\r
66 fRegs[kIA1IRQ7] = SimpleReg_t("IA1IRQ7", 0x0B27, 12, 0x000 );\r
67 fRegs[kIA1IRQ8] = SimpleReg_t("IA1IRQ8", 0x0B28, 12, 0x000 );\r
68 fRegs[kIA1IRQ9] = SimpleReg_t("IA1IRQ9", 0x0B29, 12, 0x000 );\r
69 fRegs[kIA1IRQA] = SimpleReg_t("IA1IRQA", 0x0B2A, 12, 0x000 );\r
70 fRegs[kIA1IRQB] = SimpleReg_t("IA1IRQB", 0x0B2B, 12, 0x000 );\r
71 fRegs[kIA1IRQC] = SimpleReg_t("IA1IRQC", 0x0B2C, 12, 0x000 );\r
72 fRegs[kIRQSW1] = SimpleReg_t("IRQSW1", 0x0B2D, 13, 0x1FFF );\r
73 fRegs[kIRQHW1] = SimpleReg_t("IRQHW1", 0x0B2E, 13, 0x0000 );\r
74 fRegs[kIRQHL1] = SimpleReg_t("IRQHL1", 0x0B2F, 13, 0x0000 );\r
75 fRegs[kIA2IRQ0] = SimpleReg_t("IA2IRQ0", 0x0B40, 12, 0x000 ); // IVT of CPU2\r
76 fRegs[kIA2IRQ1] = SimpleReg_t("IA2IRQ1", 0x0B41, 12, 0x000 );\r
77 fRegs[kIA2IRQ2] = SimpleReg_t("IA2IRQ2", 0x0B42, 12, 0x000 );\r
78 fRegs[kIA2IRQ3] = SimpleReg_t("IA2IRQ3", 0x0B43, 12, 0x000 );\r
79 fRegs[kIA2IRQ4] = SimpleReg_t("IA2IRQ4", 0x0B44, 12, 0x000 );\r
80 fRegs[kIA2IRQ5] = SimpleReg_t("IA2IRQ5", 0x0B45, 12, 0x000 );\r
81 fRegs[kIA2IRQ6] = SimpleReg_t("IA2IRQ6", 0x0B46, 12, 0x000 );\r
82 fRegs[kIA2IRQ7] = SimpleReg_t("IA2IRQ7", 0x0B47, 12, 0x000 );\r
83 fRegs[kIA2IRQ8] = SimpleReg_t("IA2IRQ8", 0x0B48, 12, 0x000 );\r
84 fRegs[kIA2IRQ9] = SimpleReg_t("IA2IRQ9", 0x0B49, 12, 0x000 );\r
85 fRegs[kIA2IRQA] = SimpleReg_t("IA2IRQA", 0x0B4A, 12, 0x000 );\r
86 fRegs[kIA2IRQB] = SimpleReg_t("IA2IRQB", 0x0B4B, 12, 0x000 );\r
87 fRegs[kIA2IRQC] = SimpleReg_t("IA2IRQC", 0x0B4C, 12, 0x000 );\r
88 fRegs[kIRQSW2] = SimpleReg_t("IRQSW2", 0x0B4D, 13, 0x1FFF );\r
89 fRegs[kIRQHW2] = SimpleReg_t("IRQHW2", 0x0B4E, 13, 0x0000 );\r
90 fRegs[kIRQHL2] = SimpleReg_t("IRQHL2", 0x0B4F, 13, 0x0000 );\r
91 fRegs[kIA3IRQ0] = SimpleReg_t("IA3IRQ0", 0x0B60, 12, 0x000 ); // IVT of CPU3\r
92 fRegs[kIA3IRQ1] = SimpleReg_t("IA3IRQ1", 0x0B61, 12, 0x000 );\r
93 fRegs[kIA3IRQ2] = SimpleReg_t("IA3IRQ2", 0x0B62, 12, 0x000 );\r
94 fRegs[kIA3IRQ3] = SimpleReg_t("IA3IRQ3", 0x0B63, 12, 0x000 );\r
95 fRegs[kIA3IRQ4] = SimpleReg_t("IA3IRQ4", 0x0B64, 12, 0x000 );\r
96 fRegs[kIA3IRQ5] = SimpleReg_t("IA3IRQ5", 0x0B65, 12, 0x000 );\r
97 fRegs[kIA3IRQ6] = SimpleReg_t("IA3IRQ6", 0x0B66, 12, 0x000 );\r
98 fRegs[kIA3IRQ7] = SimpleReg_t("IA3IRQ7", 0x0B67, 12, 0x000 );\r
99 fRegs[kIA3IRQ8] = SimpleReg_t("IA3IRQ8", 0x0B68, 12, 0x000 );\r
100 fRegs[kIA3IRQ9] = SimpleReg_t("IA3IRQ9", 0x0B69, 12, 0x000 );\r
101 fRegs[kIA3IRQA] = SimpleReg_t("IA3IRQA", 0x0B6A, 12, 0x000 );\r
102 fRegs[kIA3IRQB] = SimpleReg_t("IA3IRQB", 0x0B6B, 12, 0x000 );\r
103 fRegs[kIA3IRQC] = SimpleReg_t("IA3IRQC", 0x0B6C, 12, 0x000 );\r
104 fRegs[kIRQSW3] = SimpleReg_t("IRQSW3", 0x0B6D, 13, 0x1FFF );\r
105 fRegs[kIRQHW3] = SimpleReg_t("IRQHW3", 0x0B6E, 13, 0x0000 );\r
106 fRegs[kIRQHL3] = SimpleReg_t("IRQHL3", 0x0B6F, 13, 0x0000 );\r
107 fRegs[kCTGDINI] = SimpleReg_t("CTGDINI", 0x0B80, 32, 0x00000000 ); // Global Counter/Timer\r
108 fRegs[kCTGCTRL] = SimpleReg_t("CTGCTRL", 0x0B81, 12, 0xE3F );\r
109 fRegs[kC08CPU0] = SimpleReg_t("C08CPU0", 0x0C00, 32, 0x00000000 ); // CPU constants\r
110 fRegs[kC09CPU0] = SimpleReg_t("C09CPU0", 0x0C01, 32, 0x00000000 );\r
111 fRegs[kC10CPU0] = SimpleReg_t("C10CPU0", 0x0C02, 32, 0x00000000 );\r
112 fRegs[kC11CPU0] = SimpleReg_t("C11CPU0", 0x0C03, 32, 0x00000000 );\r
113 fRegs[kC12CPUA] = SimpleReg_t("C12CPUA", 0x0C04, 32, 0x00000000 );\r
114 fRegs[kC13CPUA] = SimpleReg_t("C13CPUA", 0x0C05, 32, 0x00000000 );\r
115 fRegs[kC14CPUA] = SimpleReg_t("C14CPUA", 0x0C06, 32, 0x00000000 );\r
116 fRegs[kC15CPUA] = SimpleReg_t("C15CPUA", 0x0C07, 32, 0x00000000 );\r
117 fRegs[kC08CPU1] = SimpleReg_t("C08CPU1", 0x0C08, 32, 0x00000000 );\r
118 fRegs[kC09CPU1] = SimpleReg_t("C09CPU1", 0x0C09, 32, 0x00000000 );\r
119 fRegs[kC10CPU1] = SimpleReg_t("C10CPU1", 0x0C0A, 32, 0x00000000 );\r
120 fRegs[kC11CPU1] = SimpleReg_t("C11CPU1", 0x0C0B, 32, 0x00000000 );\r
121 fRegs[kC08CPU2] = SimpleReg_t("C08CPU2", 0x0C10, 32, 0x00000000 );\r
122 fRegs[kC09CPU2] = SimpleReg_t("C09CPU2", 0x0C11, 32, 0x00000000 );\r
123 fRegs[kC10CPU2] = SimpleReg_t("C10CPU2", 0x0C12, 32, 0x00000000 );\r
124 fRegs[kC11CPU2] = SimpleReg_t("C11CPU2", 0x0C13, 32, 0x00000000 );\r
125 fRegs[kC08CPU3] = SimpleReg_t("C08CPU3", 0x0C18, 32, 0x00000000 );\r
126 fRegs[kC09CPU3] = SimpleReg_t("C09CPU3", 0x0C19, 32, 0x00000000 );\r
127 fRegs[kC10CPU3] = SimpleReg_t("C10CPU3", 0x0C1A, 32, 0x00000000 );\r
128 fRegs[kC11CPU3] = SimpleReg_t("C11CPU3", 0x0C1B, 32, 0x00000000 );\r
129 fRegs[kNMOD] = SimpleReg_t("NMOD", 0x0D40, 6, 0x08 ); // NI interface\r
130 fRegs[kNDLY] = SimpleReg_t("NDLY", 0x0D41, 30, 0x24924924 );\r
131 fRegs[kNED] = SimpleReg_t("NED", 0x0D42, 16, 0xA240 );\r
132 fRegs[kNTRO] = SimpleReg_t("NTRO", 0x0D43, 18, 0x3FFFC );\r
133 fRegs[kNRRO] = SimpleReg_t("NRRO", 0x0D44, 18, 0x3FFFC );\r
134 fRegs[kNES] = SimpleReg_t("NES", 0x0D45, 32, 0x00000000 );\r
135 fRegs[kNTP] = SimpleReg_t("NTP", 0x0D46, 32, 0x0000FFFF );\r
136 fRegs[kNBND] = SimpleReg_t("NBND", 0x0D47, 16, 0x6020 );\r
137 fRegs[kNP0] = SimpleReg_t("NP0", 0x0D48, 11, 0x44C );\r
138 fRegs[kNP1] = SimpleReg_t("NP1", 0x0D49, 11, 0x44C );\r
139 fRegs[kNP2] = SimpleReg_t("NP2", 0x0D4A, 11, 0x44C );\r
140 fRegs[kNP3] = SimpleReg_t("NP3", 0x0D4B, 11, 0x44C );\r
141 fRegs[kNCUT] = SimpleReg_t("NCUT", 0x0D4C, 32, 0xFFFFFFFF );\r
142 fRegs[kTPPT0] = SimpleReg_t("TPPT0", 0x3000, 7, 0x01 ); // Filter and Preprocessor\r
143 fRegs[kTPFS] = SimpleReg_t("TPFS", 0x3001, 7, 0x05 );\r
144 fRegs[kTPFE] = SimpleReg_t("TPFE", 0x3002, 7, 0x14 );\r
145 fRegs[kTPPGR] = SimpleReg_t("TPPGR", 0x3003, 7, 0x15 );\r
146 fRegs[kTPPAE] = SimpleReg_t("TPPAE", 0x3004, 7, 0x1E );\r
147 fRegs[kTPQS0] = SimpleReg_t("TPQS0", 0x3005, 7, 0x00 );\r
148 fRegs[kTPQE0] = SimpleReg_t("TPQE0", 0x3006, 7, 0x0A );\r
149 fRegs[kTPQS1] = SimpleReg_t("TPQS1", 0x3007, 7, 0x0B );\r
150 fRegs[kTPQE1] = SimpleReg_t("TPQE1", 0x3008, 7, 0x14 );\r
151 fRegs[kEBD] = SimpleReg_t("EBD", 0x3009, 3, 0x0 );\r
152 fRegs[kEBAQA] = SimpleReg_t("EBAQA", 0x300A, 7, 0x00 );\r
153 fRegs[kEBSIA] = SimpleReg_t("EBSIA", 0x300B, 7, 0x20 );\r
154 fRegs[kEBSF] = SimpleReg_t("EBSF", 0x300C, 1, 0x1 );\r
155 fRegs[kEBSIM] = SimpleReg_t("EBSIM", 0x300D, 1, 0x1 );\r
156 fRegs[kEBPP] = SimpleReg_t("EBPP", 0x300E, 1, 0x1 );\r
157 fRegs[kEBPC] = SimpleReg_t("EBPC", 0x300F, 1, 0x1 );\r
158 fRegs[kEBIS] = SimpleReg_t("EBIS", 0x3014, 10, 0x005 );\r
159 fRegs[kEBIT] = SimpleReg_t("EBIT", 0x3015, 12, 0x028 );\r
160 fRegs[kEBIL] = SimpleReg_t("EBIL", 0x3016, 8, 0xF0 );\r
161 fRegs[kEBIN] = SimpleReg_t("EBIN", 0x3017, 1, 0x1 );\r
162 fRegs[kFLBY] = SimpleReg_t("FLBY", 0x3018, 1, 0x0 );\r
163 fRegs[kFPBY] = SimpleReg_t("FPBY", 0x3019, 1, 0x0 );\r
164 fRegs[kFGBY] = SimpleReg_t("FGBY", 0x301A, 1, 0x0 );\r
165 fRegs[kFTBY] = SimpleReg_t("FTBY", 0x301B, 1, 0x0 );\r
166 fRegs[kFCBY] = SimpleReg_t("FCBY", 0x301C, 1, 0x0 );\r
167 fRegs[kFPTC] = SimpleReg_t("FPTC", 0x3020, 2, 0x3 );\r
168 fRegs[kFPNP] = SimpleReg_t("FPNP", 0x3021, 9, 0x078 );\r
169 fRegs[kFPCL] = SimpleReg_t("FPCL", 0x3022, 1, 0x1 );\r
170 fRegs[kFGTA] = SimpleReg_t("FGTA", 0x3028, 12, 0x014 );\r
171 fRegs[kFGTB] = SimpleReg_t("FGTB", 0x3029, 12, 0x80C );\r
172 fRegs[kFGCL] = SimpleReg_t("FGCL", 0x302A, 1, 0x1 );\r
173 fRegs[kFTAL] = SimpleReg_t("FTAL", 0x3030, 10, 0x0F6 );\r
174 fRegs[kFTLL] = SimpleReg_t("FTLL", 0x3031, 9, 0x11D );\r
175 fRegs[kFTLS] = SimpleReg_t("FTLS", 0x3032, 9, 0x0D3 );\r
176 fRegs[kFCW1] = SimpleReg_t("FCW1", 0x3038, 8, 0x1E );\r
177 fRegs[kFCW2] = SimpleReg_t("FCW2", 0x3039, 8, 0xD4 );\r
178 fRegs[kFCW3] = SimpleReg_t("FCW3", 0x303A, 8, 0xE6 );\r
179 fRegs[kFCW4] = SimpleReg_t("FCW4", 0x303B, 8, 0x4A );\r
180 fRegs[kFCW5] = SimpleReg_t("FCW5", 0x303C, 8, 0xEF );\r
181 fRegs[kTPFP] = SimpleReg_t("TPFP", 0x3040, 9, 0x037 );\r
182 fRegs[kTPHT] = SimpleReg_t("TPHT", 0x3041, 14, 0x00A0 );\r
183 fRegs[kTPVT] = SimpleReg_t("TPVT", 0x3042, 6, 0x00 );\r
184 fRegs[kTPVBY] = SimpleReg_t("TPVBY", 0x3043, 1, 0x0 );\r
185 fRegs[kTPCT] = SimpleReg_t("TPCT", 0x3044, 5, 0x08 );\r
186 fRegs[kTPCL] = SimpleReg_t("TPCL", 0x3045, 5, 0x01 );\r
187 fRegs[kTPCBY] = SimpleReg_t("TPCBY", 0x3046, 1, 0x1 );\r
188 fRegs[kTPD] = SimpleReg_t("TPD", 0x3047, 4, 0xF );\r
189 fRegs[kTPCI0] = SimpleReg_t("TPCI0", 0x3048, 5, 0x00 );\r
190 fRegs[kTPCI1] = SimpleReg_t("TPCI1", 0x3049, 5, 0x00 );\r
191 fRegs[kTPCI2] = SimpleReg_t("TPCI2", 0x304A, 5, 0x00 );\r
192 fRegs[kTPCI3] = SimpleReg_t("TPCI3", 0x304B, 5, 0x00 );\r
193 fRegs[kADCMSK] = SimpleReg_t("ADCMSK", 0x3050, 21, 0x1FFFFF );\r
194 fRegs[kADCINB] = SimpleReg_t("ADCINB", 0x3051, 2, 0x2 );\r
195 fRegs[kADCDAC] = SimpleReg_t("ADCDAC", 0x3052, 5, 0x10 );\r
196 fRegs[kADCPAR] = SimpleReg_t("ADCPAR", 0x3053, 18, 0x195EF );\r
197 fRegs[kADCTST] = SimpleReg_t("ADCTST", 0x3054, 2, 0x0 );\r
198 fRegs[kSADCAZ] = SimpleReg_t("SADCAZ", 0x3055, 1, 0x1 );\r
199 fRegs[kFGF0] = SimpleReg_t("FGF0", 0x3080, 9, 0x000 );\r
200 fRegs[kFGF1] = SimpleReg_t("FGF1", 0x3081, 9, 0x000 );\r
201 fRegs[kFGF2] = SimpleReg_t("FGF2", 0x3082, 9, 0x000 );\r
202 fRegs[kFGF3] = SimpleReg_t("FGF3", 0x3083, 9, 0x000 );\r
203 fRegs[kFGF4] = SimpleReg_t("FGF4", 0x3084, 9, 0x000 );\r
204 fRegs[kFGF5] = SimpleReg_t("FGF5", 0x3085, 9, 0x000 );\r
205 fRegs[kFGF6] = SimpleReg_t("FGF6", 0x3086, 9, 0x000 );\r
206 fRegs[kFGF7] = SimpleReg_t("FGF7", 0x3087, 9, 0x000 );\r
207 fRegs[kFGF8] = SimpleReg_t("FGF8", 0x3088, 9, 0x000 );\r
208 fRegs[kFGF9] = SimpleReg_t("FGF9", 0x3089, 9, 0x000 );\r
209 fRegs[kFGF10] = SimpleReg_t("FGF10", 0x308A, 9, 0x000 );\r
210 fRegs[kFGF11] = SimpleReg_t("FGF11", 0x308B, 9, 0x000 );\r
211 fRegs[kFGF12] = SimpleReg_t("FGF12", 0x308C, 9, 0x000 );\r
212 fRegs[kFGF13] = SimpleReg_t("FGF13", 0x308D, 9, 0x000 );\r
213 fRegs[kFGF14] = SimpleReg_t("FGF14", 0x308E, 9, 0x000 );\r
214 fRegs[kFGF15] = SimpleReg_t("FGF15", 0x308F, 9, 0x000 );\r
215 fRegs[kFGF16] = SimpleReg_t("FGF16", 0x3090, 9, 0x000 );\r
216 fRegs[kFGF17] = SimpleReg_t("FGF17", 0x3091, 9, 0x000 );\r
217 fRegs[kFGF18] = SimpleReg_t("FGF18", 0x3092, 9, 0x000 );\r
218 fRegs[kFGF19] = SimpleReg_t("FGF19", 0x3093, 9, 0x000 );\r
219 fRegs[kFGF20] = SimpleReg_t("FGF20", 0x3094, 9, 0x000 );\r
220 fRegs[kFGA0] = SimpleReg_t("FGA0", 0x30A0, 6, 0x00 );\r
221 fRegs[kFGA1] = SimpleReg_t("FGA1", 0x30A1, 6, 0x00 );\r
222 fRegs[kFGA2] = SimpleReg_t("FGA2", 0x30A2, 6, 0x00 );\r
223 fRegs[kFGA3] = SimpleReg_t("FGA3", 0x30A3, 6, 0x00 );\r
224 fRegs[kFGA4] = SimpleReg_t("FGA4", 0x30A4, 6, 0x00 );\r
225 fRegs[kFGA5] = SimpleReg_t("FGA5", 0x30A5, 6, 0x00 );\r
226 fRegs[kFGA6] = SimpleReg_t("FGA6", 0x30A6, 6, 0x00 );\r
227 fRegs[kFGA7] = SimpleReg_t("FGA7", 0x30A7, 6, 0x00 );\r
228 fRegs[kFGA8] = SimpleReg_t("FGA8", 0x30A8, 6, 0x00 );\r
229 fRegs[kFGA9] = SimpleReg_t("FGA9", 0x30A9, 6, 0x00 );\r
230 fRegs[kFGA10] = SimpleReg_t("FGA10", 0x30AA, 6, 0x00 );\r
231 fRegs[kFGA11] = SimpleReg_t("FGA11", 0x30AB, 6, 0x00 );\r
232 fRegs[kFGA12] = SimpleReg_t("FGA12", 0x30AC, 6, 0x00 );\r
233 fRegs[kFGA13] = SimpleReg_t("FGA13", 0x30AD, 6, 0x00 );\r
234 fRegs[kFGA14] = SimpleReg_t("FGA14", 0x30AE, 6, 0x00 );\r
235 fRegs[kFGA15] = SimpleReg_t("FGA15", 0x30AF, 6, 0x00 );\r
236 fRegs[kFGA16] = SimpleReg_t("FGA16", 0x30B0, 6, 0x00 );\r
237 fRegs[kFGA17] = SimpleReg_t("FGA17", 0x30B1, 6, 0x00 );\r
238 fRegs[kFGA18] = SimpleReg_t("FGA18", 0x30B2, 6, 0x00 );\r
239 fRegs[kFGA19] = SimpleReg_t("FGA19", 0x30B3, 6, 0x00 );\r
240 fRegs[kFGA20] = SimpleReg_t("FGA20", 0x30B4, 6, 0x00 );\r
241 fRegs[kFLL00] = SimpleReg_t("FLL00", 0x3100, 6, 0x00 ); // non-linearity table, 64 x 6 bits\r
242 fRegs[kFLL01] = SimpleReg_t("FLL01", 0x3101, 6, 0x00 );\r
243 fRegs[kFLL02] = SimpleReg_t("FLL02", 0x3102, 6, 0x00 );\r
244 fRegs[kFLL03] = SimpleReg_t("FLL03", 0x3103, 6, 0x00 );\r
245 fRegs[kFLL04] = SimpleReg_t("FLL04", 0x3104, 6, 0x00 );\r
246 fRegs[kFLL05] = SimpleReg_t("FLL05", 0x3105, 6, 0x00 );\r
247 fRegs[kFLL06] = SimpleReg_t("FLL06", 0x3106, 6, 0x00 );\r
248 fRegs[kFLL07] = SimpleReg_t("FLL07", 0x3107, 6, 0x00 );\r
249 fRegs[kFLL08] = SimpleReg_t("FLL08", 0x3108, 6, 0x00 );\r
250 fRegs[kFLL09] = SimpleReg_t("FLL09", 0x3109, 6, 0x00 );\r
251 fRegs[kFLL0A] = SimpleReg_t("FLL0A", 0x310A, 6, 0x00 );\r
252 fRegs[kFLL0B] = SimpleReg_t("FLL0B", 0x310B, 6, 0x00 );\r
253 fRegs[kFLL0C] = SimpleReg_t("FLL0C", 0x310C, 6, 0x00 );\r
254 fRegs[kFLL0D] = SimpleReg_t("FLL0D", 0x310D, 6, 0x00 );\r
255 fRegs[kFLL0E] = SimpleReg_t("FLL0E", 0x310E, 6, 0x00 );\r
256 fRegs[kFLL0F] = SimpleReg_t("FLL0F", 0x310F, 6, 0x00 );\r
257 fRegs[kFLL10] = SimpleReg_t("FLL10", 0x3110, 6, 0x00 );\r
258 fRegs[kFLL11] = SimpleReg_t("FLL11", 0x3111, 6, 0x00 );\r
259 fRegs[kFLL12] = SimpleReg_t("FLL12", 0x3112, 6, 0x00 );\r
260 fRegs[kFLL13] = SimpleReg_t("FLL13", 0x3113, 6, 0x00 );\r
261 fRegs[kFLL14] = SimpleReg_t("FLL14", 0x3114, 6, 0x00 );\r
262 fRegs[kFLL15] = SimpleReg_t("FLL15", 0x3115, 6, 0x00 );\r
263 fRegs[kFLL16] = SimpleReg_t("FLL16", 0x3116, 6, 0x00 );\r
264 fRegs[kFLL17] = SimpleReg_t("FLL17", 0x3117, 6, 0x00 );\r
265 fRegs[kFLL18] = SimpleReg_t("FLL18", 0x3118, 6, 0x00 );\r
266 fRegs[kFLL19] = SimpleReg_t("FLL19", 0x3119, 6, 0x00 );\r
267 fRegs[kFLL1A] = SimpleReg_t("FLL1A", 0x311A, 6, 0x00 );\r
268 fRegs[kFLL1B] = SimpleReg_t("FLL1B", 0x311B, 6, 0x00 );\r
269 fRegs[kFLL1C] = SimpleReg_t("FLL1C", 0x311C, 6, 0x00 );\r
270 fRegs[kFLL1D] = SimpleReg_t("FLL1D", 0x311D, 6, 0x00 );\r
271 fRegs[kFLL1E] = SimpleReg_t("FLL1E", 0x311E, 6, 0x00 );\r
272 fRegs[kFLL1F] = SimpleReg_t("FLL1F", 0x311F, 6, 0x00 );\r
273 fRegs[kFLL20] = SimpleReg_t("FLL20", 0x3120, 6, 0x00 );\r
274 fRegs[kFLL21] = SimpleReg_t("FLL21", 0x3121, 6, 0x00 );\r
275 fRegs[kFLL22] = SimpleReg_t("FLL22", 0x3122, 6, 0x00 );\r
276 fRegs[kFLL23] = SimpleReg_t("FLL23", 0x3123, 6, 0x00 );\r
277 fRegs[kFLL24] = SimpleReg_t("FLL24", 0x3124, 6, 0x00 );\r
278 fRegs[kFLL25] = SimpleReg_t("FLL25", 0x3125, 6, 0x00 );\r
279 fRegs[kFLL26] = SimpleReg_t("FLL26", 0x3126, 6, 0x00 );\r
280 fRegs[kFLL27] = SimpleReg_t("FLL27", 0x3127, 6, 0x00 );\r
281 fRegs[kFLL28] = SimpleReg_t("FLL28", 0x3128, 6, 0x00 );\r
282 fRegs[kFLL29] = SimpleReg_t("FLL29", 0x3129, 6, 0x00 );\r
283 fRegs[kFLL2A] = SimpleReg_t("FLL2A", 0x312A, 6, 0x00 );\r
284 fRegs[kFLL2B] = SimpleReg_t("FLL2B", 0x312B, 6, 0x00 );\r
285 fRegs[kFLL2C] = SimpleReg_t("FLL2C", 0x312C, 6, 0x00 );\r
286 fRegs[kFLL2D] = SimpleReg_t("FLL2D", 0x312D, 6, 0x00 );\r
287 fRegs[kFLL2E] = SimpleReg_t("FLL2E", 0x312E, 6, 0x00 );\r
288 fRegs[kFLL2F] = SimpleReg_t("FLL2F", 0x312F, 6, 0x00 );\r
289 fRegs[kFLL30] = SimpleReg_t("FLL30", 0x3130, 6, 0x00 );\r
290 fRegs[kFLL31] = SimpleReg_t("FLL31", 0x3131, 6, 0x00 );\r
291 fRegs[kFLL32] = SimpleReg_t("FLL32", 0x3132, 6, 0x00 );\r
292 fRegs[kFLL33] = SimpleReg_t("FLL33", 0x3133, 6, 0x00 );\r
293 fRegs[kFLL34] = SimpleReg_t("FLL34", 0x3134, 6, 0x00 );\r
294 fRegs[kFLL35] = SimpleReg_t("FLL35", 0x3135, 6, 0x00 );\r
295 fRegs[kFLL36] = SimpleReg_t("FLL36", 0x3136, 6, 0x00 );\r
296 fRegs[kFLL37] = SimpleReg_t("FLL37", 0x3137, 6, 0x00 );\r
297 fRegs[kFLL38] = SimpleReg_t("FLL38", 0x3138, 6, 0x00 );\r
298 fRegs[kFLL39] = SimpleReg_t("FLL39", 0x3139, 6, 0x00 );\r
299 fRegs[kFLL3A] = SimpleReg_t("FLL3A", 0x313A, 6, 0x00 );\r
300 fRegs[kFLL3B] = SimpleReg_t("FLL3B", 0x313B, 6, 0x00 );\r
301 fRegs[kFLL3C] = SimpleReg_t("FLL3C", 0x313C, 6, 0x00 );\r
302 fRegs[kFLL3D] = SimpleReg_t("FLL3D", 0x313D, 6, 0x00 );\r
303 fRegs[kFLL3E] = SimpleReg_t("FLL3E", 0x313E, 6, 0x00 );\r
304 fRegs[kFLL3F] = SimpleReg_t("FLL3F", 0x313F, 6, 0x00 );\r
305 fRegs[kPASADEL] = SimpleReg_t("PASADEL", 0x3158, 8, 0xFF ); // end of non-lin table\r
306 fRegs[kPASAPHA] = SimpleReg_t("PASAPHA", 0x3159, 6, 0x3F );\r
307 fRegs[kPASAPRA] = SimpleReg_t("PASAPRA", 0x315A, 6, 0x0F );\r
308 fRegs[kPASADAC] = SimpleReg_t("PASADAC", 0x315B, 8, 0x80 );\r
309 fRegs[kPASACHM] = SimpleReg_t("PASACHM", 0x315C, 19, 0x7FFFF );\r
310 fRegs[kPASASTL] = SimpleReg_t("PASASTL", 0x315D, 8, 0xFF );\r
311 fRegs[kPASAPR1] = SimpleReg_t("PASAPR1", 0x315E, 1, 0x0 );\r
312 fRegs[kPASAPR0] = SimpleReg_t("PASAPR0", 0x315F, 1, 0x0 );\r
313 fRegs[kSADCTRG] = SimpleReg_t("SADCTRG", 0x3161, 1, 0x0 );\r
314 fRegs[kSADCRUN] = SimpleReg_t("SADCRUN", 0x3162, 1, 0x0 );\r
315 fRegs[kSADCPWR] = SimpleReg_t("SADCPWR", 0x3163, 3, 0x7 );\r
316 fRegs[kL0TSIM] = SimpleReg_t("L0TSIM", 0x3165, 14, 0x0050 );\r
317 fRegs[kSADCEC] = SimpleReg_t("SADCEC", 0x3166, 7, 0x00 );\r
318 fRegs[kSADCMC] = SimpleReg_t("SADCMC", 0x3170, 8, 0xC0 );\r
319 fRegs[kSADCOC] = SimpleReg_t("SADCOC", 0x3171, 8, 0x19 );\r
320 fRegs[kSADCGTB] = SimpleReg_t("SADCGTB", 0x3172, 32, 0x37737700 );\r
321 fRegs[kSEBDEN] = SimpleReg_t("SEBDEN", 0x3178, 3, 0x0 );\r
322 fRegs[kSEBDOU] = SimpleReg_t("SEBDOU", 0x3179, 3, 0x0 );\r
323 fRegs[kTPL00] = SimpleReg_t("TPL00", 0x3180, 5, 0x00 ); // pos table, 128 x 5 bits\r
324 fRegs[kTPL01] = SimpleReg_t("TPL01", 0x3181, 5, 0x00 );\r
325 fRegs[kTPL02] = SimpleReg_t("TPL02", 0x3182, 5, 0x00 );\r
326 fRegs[kTPL03] = SimpleReg_t("TPL03", 0x3183, 5, 0x00 );\r
327 fRegs[kTPL04] = SimpleReg_t("TPL04", 0x3184, 5, 0x00 );\r
328 fRegs[kTPL05] = SimpleReg_t("TPL05", 0x3185, 5, 0x00 );\r
329 fRegs[kTPL06] = SimpleReg_t("TPL06", 0x3186, 5, 0x00 );\r
330 fRegs[kTPL07] = SimpleReg_t("TPL07", 0x3187, 5, 0x00 );\r
331 fRegs[kTPL08] = SimpleReg_t("TPL08", 0x3188, 5, 0x00 );\r
332 fRegs[kTPL09] = SimpleReg_t("TPL09", 0x3189, 5, 0x00 );\r
333 fRegs[kTPL0A] = SimpleReg_t("TPL0A", 0x318A, 5, 0x00 );\r
334 fRegs[kTPL0B] = SimpleReg_t("TPL0B", 0x318B, 5, 0x00 );\r
335 fRegs[kTPL0C] = SimpleReg_t("TPL0C", 0x318C, 5, 0x00 );\r
336 fRegs[kTPL0D] = SimpleReg_t("TPL0D", 0x318D, 5, 0x00 );\r
337 fRegs[kTPL0E] = SimpleReg_t("TPL0E", 0x318E, 5, 0x00 );\r
338 fRegs[kTPL0F] = SimpleReg_t("TPL0F", 0x318F, 5, 0x00 );\r
339 fRegs[kTPL10] = SimpleReg_t("TPL10", 0x3190, 5, 0x00 );\r
340 fRegs[kTPL11] = SimpleReg_t("TPL11", 0x3191, 5, 0x00 );\r
341 fRegs[kTPL12] = SimpleReg_t("TPL12", 0x3192, 5, 0x00 );\r
342 fRegs[kTPL13] = SimpleReg_t("TPL13", 0x3193, 5, 0x00 );\r
343 fRegs[kTPL14] = SimpleReg_t("TPL14", 0x3194, 5, 0x00 );\r
344 fRegs[kTPL15] = SimpleReg_t("TPL15", 0x3195, 5, 0x00 );\r
345 fRegs[kTPL16] = SimpleReg_t("TPL16", 0x3196, 5, 0x00 );\r
346 fRegs[kTPL17] = SimpleReg_t("TPL17", 0x3197, 5, 0x00 );\r
347 fRegs[kTPL18] = SimpleReg_t("TPL18", 0x3198, 5, 0x00 );\r
348 fRegs[kTPL19] = SimpleReg_t("TPL19", 0x3199, 5, 0x00 );\r
349 fRegs[kTPL1A] = SimpleReg_t("TPL1A", 0x319A, 5, 0x00 );\r
350 fRegs[kTPL1B] = SimpleReg_t("TPL1B", 0x319B, 5, 0x00 );\r
351 fRegs[kTPL1C] = SimpleReg_t("TPL1C", 0x319C, 5, 0x00 );\r
352 fRegs[kTPL1D] = SimpleReg_t("TPL1D", 0x319D, 5, 0x00 );\r
353 fRegs[kTPL1E] = SimpleReg_t("TPL1E", 0x319E, 5, 0x00 );\r
354 fRegs[kTPL1F] = SimpleReg_t("TPL1F", 0x319F, 5, 0x00 );\r
355 fRegs[kTPL20] = SimpleReg_t("TPL20", 0x31A0, 5, 0x00 );\r
356 fRegs[kTPL21] = SimpleReg_t("TPL21", 0x31A1, 5, 0x00 );\r
357 fRegs[kTPL22] = SimpleReg_t("TPL22", 0x31A2, 5, 0x00 );\r
358 fRegs[kTPL23] = SimpleReg_t("TPL23", 0x31A3, 5, 0x00 );\r
359 fRegs[kTPL24] = SimpleReg_t("TPL24", 0x31A4, 5, 0x00 );\r
360 fRegs[kTPL25] = SimpleReg_t("TPL25", 0x31A5, 5, 0x00 );\r
361 fRegs[kTPL26] = SimpleReg_t("TPL26", 0x31A6, 5, 0x00 );\r
362 fRegs[kTPL27] = SimpleReg_t("TPL27", 0x31A7, 5, 0x00 );\r
363 fRegs[kTPL28] = SimpleReg_t("TPL28", 0x31A8, 5, 0x00 );\r
364 fRegs[kTPL29] = SimpleReg_t("TPL29", 0x31A9, 5, 0x00 );\r
365 fRegs[kTPL2A] = SimpleReg_t("TPL2A", 0x31AA, 5, 0x00 );\r
366 fRegs[kTPL2B] = SimpleReg_t("TPL2B", 0x31AB, 5, 0x00 );\r
367 fRegs[kTPL2C] = SimpleReg_t("TPL2C", 0x31AC, 5, 0x00 );\r
368 fRegs[kTPL2D] = SimpleReg_t("TPL2D", 0x31AD, 5, 0x00 );\r
369 fRegs[kTPL2E] = SimpleReg_t("TPL2E", 0x31AE, 5, 0x00 );\r
370 fRegs[kTPL2F] = SimpleReg_t("TPL2F", 0x31AF, 5, 0x00 );\r
371 fRegs[kTPL30] = SimpleReg_t("TPL30", 0x31B0, 5, 0x00 );\r
372 fRegs[kTPL31] = SimpleReg_t("TPL31", 0x31B1, 5, 0x00 );\r
373 fRegs[kTPL32] = SimpleReg_t("TPL32", 0x31B2, 5, 0x00 );\r
374 fRegs[kTPL33] = SimpleReg_t("TPL33", 0x31B3, 5, 0x00 );\r
375 fRegs[kTPL34] = SimpleReg_t("TPL34", 0x31B4, 5, 0x00 );\r
376 fRegs[kTPL35] = SimpleReg_t("TPL35", 0x31B5, 5, 0x00 );\r
377 fRegs[kTPL36] = SimpleReg_t("TPL36", 0x31B6, 5, 0x00 );\r
378 fRegs[kTPL37] = SimpleReg_t("TPL37", 0x31B7, 5, 0x00 );\r
379 fRegs[kTPL38] = SimpleReg_t("TPL38", 0x31B8, 5, 0x00 );\r
380 fRegs[kTPL39] = SimpleReg_t("TPL39", 0x31B9, 5, 0x00 );\r
381 fRegs[kTPL3A] = SimpleReg_t("TPL3A", 0x31BA, 5, 0x00 );\r
382 fRegs[kTPL3B] = SimpleReg_t("TPL3B", 0x31BB, 5, 0x00 );\r
383 fRegs[kTPL3C] = SimpleReg_t("TPL3C", 0x31BC, 5, 0x00 );\r
384 fRegs[kTPL3D] = SimpleReg_t("TPL3D", 0x31BD, 5, 0x00 );\r
385 fRegs[kTPL3E] = SimpleReg_t("TPL3E", 0x31BE, 5, 0x00 );\r
386 fRegs[kTPL3F] = SimpleReg_t("TPL3F", 0x31BF, 5, 0x00 );\r
387 fRegs[kTPL40] = SimpleReg_t("TPL40", 0x31C0, 5, 0x00 );\r
388 fRegs[kTPL41] = SimpleReg_t("TPL41", 0x31C1, 5, 0x00 );\r
389 fRegs[kTPL42] = SimpleReg_t("TPL42", 0x31C2, 5, 0x00 );\r
390 fRegs[kTPL43] = SimpleReg_t("TPL43", 0x31C3, 5, 0x00 );\r
391 fRegs[kTPL44] = SimpleReg_t("TPL44", 0x31C4, 5, 0x00 );\r
392 fRegs[kTPL45] = SimpleReg_t("TPL45", 0x31C5, 5, 0x00 );\r
393 fRegs[kTPL46] = SimpleReg_t("TPL46", 0x31C6, 5, 0x00 );\r
394 fRegs[kTPL47] = SimpleReg_t("TPL47", 0x31C7, 5, 0x00 );\r
395 fRegs[kTPL48] = SimpleReg_t("TPL48", 0x31C8, 5, 0x00 );\r
396 fRegs[kTPL49] = SimpleReg_t("TPL49", 0x31C9, 5, 0x00 );\r
397 fRegs[kTPL4A] = SimpleReg_t("TPL4A", 0x31CA, 5, 0x00 );\r
398 fRegs[kTPL4B] = SimpleReg_t("TPL4B", 0x31CB, 5, 0x00 );\r
399 fRegs[kTPL4C] = SimpleReg_t("TPL4C", 0x31CC, 5, 0x00 );\r
400 fRegs[kTPL4D] = SimpleReg_t("TPL4D", 0x31CD, 5, 0x00 );\r
401 fRegs[kTPL4E] = SimpleReg_t("TPL4E", 0x31CE, 5, 0x00 );\r
402 fRegs[kTPL4F] = SimpleReg_t("TPL4F", 0x31CF, 5, 0x00 );\r
403 fRegs[kTPL50] = SimpleReg_t("TPL50", 0x31D0, 5, 0x00 );\r
404 fRegs[kTPL51] = SimpleReg_t("TPL51", 0x31D1, 5, 0x00 );\r
405 fRegs[kTPL52] = SimpleReg_t("TPL52", 0x31D2, 5, 0x00 );\r
406 fRegs[kTPL53] = SimpleReg_t("TPL53", 0x31D3, 5, 0x00 );\r
407 fRegs[kTPL54] = SimpleReg_t("TPL54", 0x31D4, 5, 0x00 );\r
408 fRegs[kTPL55] = SimpleReg_t("TPL55", 0x31D5, 5, 0x00 );\r
409 fRegs[kTPL56] = SimpleReg_t("TPL56", 0x31D6, 5, 0x00 );\r
410 fRegs[kTPL57] = SimpleReg_t("TPL57", 0x31D7, 5, 0x00 );\r
411 fRegs[kTPL58] = SimpleReg_t("TPL58", 0x31D8, 5, 0x00 );\r
412 fRegs[kTPL59] = SimpleReg_t("TPL59", 0x31D9, 5, 0x00 );\r
413 fRegs[kTPL5A] = SimpleReg_t("TPL5A", 0x31DA, 5, 0x00 );\r
414 fRegs[kTPL5B] = SimpleReg_t("TPL5B", 0x31DB, 5, 0x00 );\r
415 fRegs[kTPL5C] = SimpleReg_t("TPL5C", 0x31DC, 5, 0x00 );\r
416 fRegs[kTPL5D] = SimpleReg_t("TPL5D", 0x31DD, 5, 0x00 );\r
417 fRegs[kTPL5E] = SimpleReg_t("TPL5E", 0x31DE, 5, 0x00 );\r
418 fRegs[kTPL5F] = SimpleReg_t("TPL5F", 0x31DF, 5, 0x00 );\r
419 fRegs[kTPL60] = SimpleReg_t("TPL60", 0x31E0, 5, 0x00 );\r
420 fRegs[kTPL61] = SimpleReg_t("TPL61", 0x31E1, 5, 0x00 );\r
421 fRegs[kTPL62] = SimpleReg_t("TPL62", 0x31E2, 5, 0x00 );\r
422 fRegs[kTPL63] = SimpleReg_t("TPL63", 0x31E3, 5, 0x00 );\r
423 fRegs[kTPL64] = SimpleReg_t("TPL64", 0x31E4, 5, 0x00 );\r
424 fRegs[kTPL65] = SimpleReg_t("TPL65", 0x31E5, 5, 0x00 );\r
425 fRegs[kTPL66] = SimpleReg_t("TPL66", 0x31E6, 5, 0x00 );\r
426 fRegs[kTPL67] = SimpleReg_t("TPL67", 0x31E7, 5, 0x00 );\r
427 fRegs[kTPL68] = SimpleReg_t("TPL68", 0x31E8, 5, 0x00 );\r
428 fRegs[kTPL69] = SimpleReg_t("TPL69", 0x31E9, 5, 0x00 );\r
429 fRegs[kTPL6A] = SimpleReg_t("TPL6A", 0x31EA, 5, 0x00 );\r
430 fRegs[kTPL6B] = SimpleReg_t("TPL6B", 0x31EB, 5, 0x00 );\r
431 fRegs[kTPL6C] = SimpleReg_t("TPL6C", 0x31EC, 5, 0x00 );\r
432 fRegs[kTPL6D] = SimpleReg_t("TPL6D", 0x31ED, 5, 0x00 );\r
433 fRegs[kTPL6E] = SimpleReg_t("TPL6E", 0x31EE, 5, 0x00 );\r
434 fRegs[kTPL6F] = SimpleReg_t("TPL6F", 0x31EF, 5, 0x00 );\r
435 fRegs[kTPL70] = SimpleReg_t("TPL70", 0x31F0, 5, 0x00 );\r
436 fRegs[kTPL71] = SimpleReg_t("TPL71", 0x31F1, 5, 0x00 );\r
437 fRegs[kTPL72] = SimpleReg_t("TPL72", 0x31F2, 5, 0x00 );\r
438 fRegs[kTPL73] = SimpleReg_t("TPL73", 0x31F3, 5, 0x00 );\r
439 fRegs[kTPL74] = SimpleReg_t("TPL74", 0x31F4, 5, 0x00 );\r
440 fRegs[kTPL75] = SimpleReg_t("TPL75", 0x31F5, 5, 0x00 );\r
441 fRegs[kTPL76] = SimpleReg_t("TPL76", 0x31F6, 5, 0x00 );\r
442 fRegs[kTPL77] = SimpleReg_t("TPL77", 0x31F7, 5, 0x00 );\r
443 fRegs[kTPL78] = SimpleReg_t("TPL78", 0x31F8, 5, 0x00 );\r
444 fRegs[kTPL79] = SimpleReg_t("TPL79", 0x31F9, 5, 0x00 );\r
445 fRegs[kTPL7A] = SimpleReg_t("TPL7A", 0x31FA, 5, 0x00 );\r
446 fRegs[kTPL7B] = SimpleReg_t("TPL7B", 0x31FB, 5, 0x00 );\r
447 fRegs[kTPL7C] = SimpleReg_t("TPL7C", 0x31FC, 5, 0x00 );\r
448 fRegs[kTPL7D] = SimpleReg_t("TPL7D", 0x31FD, 5, 0x00 );\r
449 fRegs[kTPL7E] = SimpleReg_t("TPL7E", 0x31FE, 5, 0x00 );\r
450 fRegs[kTPL7F] = SimpleReg_t("TPL7F", 0x31FF, 5, 0x00 );\r
451 fRegs[kMEMRW] = SimpleReg_t("MEMRW", 0xD000, 7, 0x79 ); // end of pos table\r
452 fRegs[kMEMCOR] = SimpleReg_t("MEMCOR", 0xD001, 9, 0x000 );\r
453 fRegs[kDMDELA] = SimpleReg_t("DMDELA", 0xD002, 4, 0x8 );\r
454 fRegs[kDMDELS] = SimpleReg_t("DMDELS", 0xD003, 4, 0x8 );\r
455\r
78d5287e 456 InitRegs();\r
7627bf12 457}\r
458\r
7d298182 459\r
7627bf12 460AliTRDtrapConfig* AliTRDtrapConfig::Instance()\r
461{\r
462 // return a pointer to an instance of this class\r
463\r
64e3d742 464 if (!fgInstance) {\r
7627bf12 465 fgInstance = new AliTRDtrapConfig();\r
64e3d742 466 fgInstance->LoadConfig();\r
467 }\r
468\r
7627bf12 469 return fgInstance;\r
470}\r
471\r
7d298182 472\r
78d5287e 473void AliTRDtrapConfig::InitRegs(void)\r
474{\r
475 // Reset the content of all TRAP registers to the reset values (see TRAP User Manual)\r
476\r
477 for (Int_t iReg = 0; iReg < kLastReg; iReg++) {\r
478\r
479 fRegisterValue[iReg].individualValue = 0x0;\r
480\r
481 fRegisterValue[iReg].globalValue = GetRegResetValue((TrapReg_t) iReg);\r
482 fRegisterValue[iReg].state = RegValue_t::kGlobal;\r
483 }\r
484}\r
485\r
7d298182 486void AliTRDtrapConfig::ResetRegs(void)\r
487{\r
488 // Reset the content of all TRAP registers to the reset values (see TRAP User Manual)\r
489\r
490 for (Int_t iReg = 0; iReg < kLastReg; iReg++) {\r
491 if(fRegisterValue[iReg].state == RegValue_t::kIndividual) {\r
78d5287e 492 if (fRegisterValue[iReg].individualValue) {\r
493 delete [] fRegisterValue[iReg].individualValue;\r
494 fRegisterValue[iReg].individualValue = 0x0;\r
495 }\r
7d298182 496 }\r
497\r
498 fRegisterValue[iReg].globalValue = GetRegResetValue((TrapReg_t) iReg);\r
499 fRegisterValue[iReg].state = RegValue_t::kGlobal;\r
500 // printf("%-8s: 0x%08x\n", GetRegName((TrapReg_t) iReg), fRegisterValue[iReg].globalValue);\r
501 }\r
502}\r
503\r
504\r
7627bf12 505Int_t AliTRDtrapConfig::GetTrapReg(TrapReg_t reg, Int_t det, Int_t rob, Int_t mcm)\r
506{\r
507 // get the value of an individual TRAP register \r
508 // if it is individual for TRAPs a valid TRAP has to be specified\r
509\r
510 if ((reg < 0) || (reg >= kLastReg)) {\r
511 AliError("Non-existing register requested");\r
512 return -1;\r
513 }\r
514 else {\r
515 if (fRegisterValue[reg].state == RegValue_t::kGlobal) {\r
516 return fRegisterValue[reg].globalValue;\r
517 }\r
518 else if (fRegisterValue[reg].state == RegValue_t::kIndividual) {\r
7d298182 519 if((det >= 0 && det < AliTRDgeometry::Ndet()) && \r
520 (rob >= 0 && rob < AliTRDfeeParam::GetNrobC1()) && \r
521 (mcm >= 0 && mcm < fgkMaxMcm)) {\r
522 return fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm];\r
523 }\r
524 else {\r
525 AliError("Invalid MCM specified or register is individual");\r
526 return -1;\r
527 }\r
528 }\r
529 else { // should never be reached\r
530 AliError("MCM register status neither kGlobal nor kIndividual");\r
531 return -1;\r
7627bf12 532 }\r
533 }\r
534 return -1;\r
535}\r
536\r
7d298182 537\r
538Bool_t AliTRDtrapConfig::SetTrapReg(TrapReg_t reg, Int_t value)\r
7627bf12 539{\r
7d298182 540 // set a global value for the given TRAP register,\r
541 // i.e. the same value for all TRAPs\r
7627bf12 542\r
7d298182 543 if (fRegisterValue[reg].state == RegValue_t::kGlobal) {\r
7627bf12 544 fRegisterValue[reg].globalValue = value;\r
7d298182 545 return kTRUE;\r
546 }\r
547 else {\r
548 AliError("Register has individual values");\r
549 }\r
550 return kFALSE;\r
551}\r
552\r
553\r
554Bool_t AliTRDtrapConfig::SetTrapReg(TrapReg_t reg, Int_t value, Int_t det)\r
555{\r
556 // set a global value for the given TRAP register,\r
557 // i.e. the same value for all TRAPs\r
558\r
559 if (fRegisterValue[reg].state == RegValue_t::kGlobal) {\r
7627bf12 560 fRegisterValue[reg].globalValue = value;\r
7d298182 561 return kTRUE;\r
562 }\r
563 else if (fRegisterValue[reg].state == RegValue_t::kIndividual) {\r
564 // if the register is in idividual mode but a broadcast is requested, the selected register is \r
565 // set to value for all MCMs on the chamber\r
566\r
567 if( (det>=0 && det<AliTRDgeometry::Ndet())) {\r
568 for(Int_t rob=0; rob<AliTRDfeeParam::GetNrobC1(); rob++) {\r
569 for(Int_t mcm=0; mcm<fgkMaxMcm; mcm++)\r
570 fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm] = value;\r
571 }\r
572 }\r
573 else {\r
574 AliError("Invalid value for det, ROB or MCM selected");\r
575 return kFALSE;\r
576 }\r
577 }\r
578 else { // should never be reached\r
579 AliError("MCM register status neither kGlobal nor kIndividual");\r
7627bf12 580 return kFALSE;\r
7d298182 581 }\r
582 \r
583 return kFALSE;\r
584}\r
585\r
586\r
587Bool_t AliTRDtrapConfig::SetTrapReg(TrapReg_t reg, Int_t value, Int_t det, Int_t rob, Int_t mcm)\r
588{\r
589 // set the value for the given TRAP register of an individual MCM \r
590\r
591 //std::cout << "-- reg: 0x" << std::hex << fRegs[reg].addr << std::dec << ", data " << value << ", det " << det << ", rob " << rob << ", mcm " << mcm << std::endl;\r
592\r
593 if( (det >= 0 && det < AliTRDgeometry::Ndet()) && \r
594 (rob >= 0 && rob < AliTRDfeeParam::GetNrobC1()) && \r
595 (mcm >= 0 && mcm < fgkMaxMcm) ) {\r
596 if (fRegisterValue[reg].state == RegValue_t::kGlobal) {\r
597 Int_t defaultValue = fRegisterValue[reg].globalValue;\r
598 \r
599 fRegisterValue[reg].state = RegValue_t::kIndividual;\r
600 fRegisterValue[reg].individualValue = new Int_t[AliTRDgeometry::Ndet()*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm];\r
601\r
602 for(Int_t i = 0; i < AliTRDgeometry::Ndet()*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm; i++)\r
603 fRegisterValue[reg].individualValue[i] = defaultValue; // set the requested register of all MCMs to the value previously stored\r
604\r
605 fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm] = value;\r
606 }\r
607 else if (fRegisterValue[reg].state == RegValue_t::kIndividual) {\r
608 fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm] = value;\r
609 }\r
610 else { // should never be reached\r
611 AliError("MCM register status neither kGlobal nor kIndividual");\r
612 return kFALSE;\r
613 }\r
7627bf12 614 }\r
7d298182 615 else {\r
616 AliError("Invalid value for det, ROB or MCM selected");\r
617 return kFALSE;\r
618 }\r
619\r
7627bf12 620 return kTRUE;\r
621}\r
622\r
7d298182 623\r
7627bf12 624Bool_t AliTRDtrapConfig::LoadConfig()\r
625{\r
626 // load a set of TRAP register values (configuration)\r
7d298182 627 // here a default set is implemented for testing\r
7627bf12 628 // for a detailed description of the registers see the TRAP manual\r
629\r
7627bf12 630 // pedestal filter\r
631 SetTrapReg(kFPNP, 4*10);\r
632 SetTrapReg(kFPTC, 0);\r
64e3d742 633 SetTrapReg(kFPBY, 0); // bypassed!\r
7627bf12 634 \r
635 // gain filter\r
636 for (Int_t adc = 0; adc < 20; adc++) {\r
637 SetTrapReg(TrapReg_t(kFGA0+adc), 40);\r
638 SetTrapReg(TrapReg_t(kFGF0+adc), 15);\r
639 }\r
640 SetTrapReg(kFGTA, 20);\r
641 SetTrapReg(kFGTB, 2060);\r
642 SetTrapReg(kFGBY, 0); // bypassed!\r
643\r
644 // tail cancellation\r
64e3d742 645 SetTrapReg(kFTAL, 267);\r
646 SetTrapReg(kFTLL, 356);\r
647 SetTrapReg(kFTLS, 387);\r
4ff7ed2b 648 SetTrapReg(kFTBY, 0);\r
7627bf12 649\r
650 // tracklet calculation\r
651 SetTrapReg(kTPQS0, 5);\r
652 SetTrapReg(kTPQE0, 10);\r
653 SetTrapReg(kTPQS1, 11);\r
654 SetTrapReg(kTPQE1, 20);\r
655 SetTrapReg(kTPFS, 5);\r
656 SetTrapReg(kTPFE, 20);\r
657 SetTrapReg(kTPVBY, 0);\r
658 SetTrapReg(kTPVT, 10);\r
64e3d742 659 SetTrapReg(kTPHT, 30);\r
660 SetTrapReg(kTPFP, 0);\r
661 SetTrapReg(kTPCL, 1);\r
662 SetTrapReg(kTPCT, 8);\r
7627bf12 663 \r
664 // event buffer\r
665 SetTrapReg(kEBSF, 1); // 0: store filtered; 1: store unfiltered\r
666 // zs applied to data stored in event buffer (sel. by EBSF)\r
667 SetTrapReg(kEBIS, 5 << 2); // single indicator threshold (plus two digits)\r
64e3d742 668 SetTrapReg(kEBIT, 20 << 2); // sum indicator threshold (plus two digits)\r
7627bf12 669 SetTrapReg(kEBIL, 0xf0); // lookup table\r
64e3d742 670 SetTrapReg(kEBIN, 0); // neighbour sensitivity\r
671\r
672 // raw data\r
673 SetTrapReg(kNES, (0x0000 << 16) | 0x1000);\r
7627bf12 674\r
675 return kTRUE;\r
676}\r
677\r
7d298182 678\r
679Bool_t AliTRDtrapConfig::LoadConfig(Int_t det, TString filename)\r
680{\r
681 // load a TRAP configuration from a file\r
682 // The file format is the format created by the standalone \r
683 // command coder: scc / show_cfdat \r
684 // which are two tools to inspect/export configurations from wingDB\r
685\r
686 ResetRegs(); // does not really make sense here???\r
687\r
688 std::ifstream infile;\r
689 infile.open(filename.Data(), std::ifstream::in);\r
690 if (!infile.is_open()) {\r
691 AliError("Can not open MCM configuration file");\r
692 return kFALSE;\r
693 }\r
694\r
695 Int_t cmd, extali, addr, data;\r
696 Int_t no;\r
697 char tmp;\r
698 \r
699 while(infile.good()) {\r
700 cmd=-1;\r
701 extali=-1;\r
702 addr=-1;\r
703 data=-1;\r
704 infile >> std::skipws >> no >> tmp >> cmd >> extali >> addr >> data;\r
705 // std::cout << "no: " << no << ", cmd " << cmd << ", extali " << extali << ", addr " << addr << ", data " << data << endl;\r
706 \r
707 if(cmd!=-1 && extali!=-1 && addr != -1 && data!= -1) {\r
708 AddValues(det, cmd, extali, addr, data);\r
709 }\r
710 else if(!infile.eof() && !infile.good()) {\r
711 infile.clear();\r
712 infile.ignore(256, '\n');\r
713 }\r
714 \r
715 if(!infile.eof())\r
716 infile.clear();\r
717 }\r
718 \r
719 infile.close();\r
720 \r
721 return kTRUE;\r
722}\r
723\r
724\r
725Bool_t AliTRDtrapConfig::PrintTrapReg(TrapReg_t reg, Int_t det, Int_t rob, Int_t mcm)\r
7627bf12 726{\r
7d298182 727 // print the value stored in the given register\r
7627bf12 728 // if it is individual a valid MCM has to be specified\r
729\r
730 if (fRegisterValue[reg].state == RegValue_t::kGlobal) {\r
7d298182 731 printf("%s (%i bits) at 0x%08x is 0x%08x and resets to: 0x%08x (currently global mode)\n", \r
7627bf12 732 GetRegName((TrapReg_t) reg),\r
733 GetRegNBits((TrapReg_t) reg),\r
734 GetRegAddress((TrapReg_t) reg),\r
735 fRegisterValue[reg].globalValue,\r
736 GetRegResetValue((TrapReg_t) reg));\r
737 }\r
738 else if (fRegisterValue[reg].state == RegValue_t::kIndividual) {\r
7d298182 739 if((det >= 0 && det < AliTRDgeometry::Ndet()) && \r
740 (rob >= 0 && rob < AliTRDfeeParam::GetNrobC1()) && \r
741 (mcm >= 0 && mcm < fgkMaxMcm)) {\r
742 printf("%s (%i bits) at 0x%08x is 0x%08x and resets to: 0x%08x (currently individual mode)\n", \r
7627bf12 743 GetRegName((TrapReg_t) reg),\r
744 GetRegNBits((TrapReg_t) reg),\r
745 GetRegAddress((TrapReg_t) reg),\r
7d298182 746 fRegisterValue[reg].individualValue[det*AliTRDfeeParam::GetNrobC1()*fgkMaxMcm + rob*fgkMaxMcm + mcm],\r
7627bf12 747 GetRegResetValue((TrapReg_t) reg));\r
748 }\r
7d298182 749 else {\r
750 AliError("Register value is MCM-specific: Invalid detector, ROB or MCM requested");\r
751 return kFALSE;\r
752 }\r
753 }\r
754 else { // should never be reached\r
755 AliError("MCM register status neither kGlobal nor kIndividual");\r
756 return kFALSE;\r
757 }\r
758 return kTRUE;\r
759}\r
760\r
761\r
762Bool_t AliTRDtrapConfig::PrintTrapAddr(Int_t addr, Int_t det, Int_t rob, Int_t mcm)\r
763{\r
764 // print the value stored at the given address in the MCM chip\r
765 TrapReg_t reg = GetRegByAddress(addr);\r
766 if (reg >= 0 && reg < kLastReg) {\r
767 return PrintTrapReg(reg, det, rob, mcm);\r
768 }\r
769 else {\r
770 AliError(Form("There is no register at address 0x%08x in the simulator", addr));\r
771 return kFALSE;\r
772 }\r
773}\r
774\r
775\r
776Bool_t AliTRDtrapConfig::AddValues(UInt_t det, UInt_t cmd, UInt_t extali, UInt_t addr, UInt_t data)\r
777{\r
778 // transfer the informations provided by LoadConfig to the internal class variables\r
779\r
780 if(cmd != fgkScsnCmdWrite) {\r
781 AliError(Form("Invalid command received: %i", cmd));\r
782 return kFALSE;\r
783 }\r
784\r
785 TrapReg_t mcmReg = GetRegByAddress(addr);\r
786\r
787 if(mcmReg >= 0 && mcmReg < kLastReg) {\r
788 Int_t rocType = AliTRDgeometry::GetStack(det) == 2 ? 0 : 1;\r
789 \r
790 for(Int_t linkPair=0; linkPair<fgkMaxLinkPairs; linkPair++) {\r
791 if(ExtAliToAli(extali, linkPair, rocType)!=0) {\r
792 Int_t i=0;\r
793 while(fMcmlist[i] != -1 && i<fMcmlistSize) {\r
794 if(fMcmlist[i]==127)\r
795 SetTrapReg( (TrapReg_t) mcmReg, data, det);\r
796 else\r
797 SetTrapReg( (TrapReg_t) mcmReg, data, det, (fMcmlist[i]>>7), (fMcmlist[i]&0x7F));\r
798 i++;\r
799 }\r
800 }\r
801 }\r
802 return kTRUE;\r
803 }\r
804 else \r
805 return kFALSE;\r
806}\r
807\r
808\r
809Int_t AliTRDtrapConfig::ExtAliToAli( UInt_t dest, UShort_t linkpair, UShort_t rocType)\r
810{\r
811 // Converts an extended ALICE ID which identifies a single MCM or a group of MCMs to\r
812 // the corresponding list of MCMs. Only broadcasts (127) are encoded as 127 \r
813 // The return value is the number of MCMs in the list\r
814\r
815 fMcmlist[0]=-1;\r
816\r
817 Short_t nmcm = 0;\r
818 UInt_t mcm, rob, robAB;\r
819 UInt_t cmA = 0, cmB = 0; // Chipmask for each A and B side\r
820 \r
821 // Default chipmask for 4 linkpairs (each bit correponds each alice-mcm)\r
822 static const UInt_t gkChipmaskDefLp[4] = { 0x1FFFF, 0x1FFFF, 0x3FFFF, 0x1FFFF };\r
823 \r
824 rob = dest >> 7; // Extract ROB pattern from dest.\r
825 mcm = dest & 0x07F; // Extract MCM pattern from dest.\r
826 robAB = GetRobAB( rob, linkpair ); // Get which ROB sides are selected.\r
827 \r
828 // Abort if no ROB is selected\r
829 if( robAB == 0 ) {\r
830 return 0;\r
831 }\r
832 \r
833 // Special case\r
834 if( mcm == 127 ) {\r
835 if( robAB == 3 ) { // This is very special 127 can stay only if two ROBs are selected\r
836 fMcmlist[0]=127; // broadcase to ALL\r
837 fMcmlist[1]=-1;\r
838 return 1;\r
839 }\r
840 cmA = cmB = 0x3FFFF;\r
841 } else if( (mcm & 0x40) != 0 ) { // If top bit is 1 but not 127, this is chip group.\r
842 if( (mcm & 0x01) != 0 ) { cmA |= 0x04444; cmB |= 0x04444; } // chip_cmrg\r
843 if( (mcm & 0x02) != 0 ) { cmA |= 0x10000; cmB |= 0x10000; } // chip_bmrg\r
844 if( (mcm & 0x04) != 0 && rocType == 0 ) { cmA |= 0x20000; cmB |= 0x20000; } // chip_hm3\r
845 if( (mcm & 0x08) != 0 && rocType == 1 ) { cmA |= 0x20000; cmB |= 0x20000; } // chip_hm4\r
846 if( (mcm & 0x10) != 0 ) { cmA |= 0x01111; cmB |= 0x08888; } // chip_edge\r
847 if( (mcm & 0x20) != 0 ) { cmA |= 0x0aaaa; cmB |= 0x03333; } // chip_norm\r
848 } else { // Otherwise, this is normal chip ID, turn on only one chip.\r
849 cmA = 1 << mcm;\r
850 cmB = 1 << mcm;\r
7627bf12 851 }\r
7d298182 852 \r
853 // Mask non-existing MCMs\r
854 cmA &= gkChipmaskDefLp[linkpair];\r
855 cmB &= gkChipmaskDefLp[linkpair];\r
856 // Remove if only one side is selected\r
857 if( robAB == 1 ) \r
858 cmB = 0;\r
859 if( robAB == 2 ) \r
860 cmA = 0;\r
861 if( robAB == 4 && linkpair != 2 ) \r
862 cmA = cmB = 0; // Restrict to only T3A and T3B\r
863 \r
864 // Finally convert chipmask to list of slaves\r
865 nmcm = ChipmaskToMCMlist( cmA, cmB, linkpair );\r
866 \r
867 return nmcm;\r
7627bf12 868}\r
7d298182 869\r
870\r
871Short_t AliTRDtrapConfig::GetRobAB( UShort_t robsel, UShort_t linkpair )\r
872{\r
873 // Converts the ROB part of the extended ALICE ID to robs\r
874\r
875 if( (robsel & 0x8) != 0 ) { // 1000 .. direct ROB selection. Only one of the 8 ROBs are used.\r
876 robsel = robsel & 7;\r
877 if( (robsel % 2) == 0 && (robsel / 2) == linkpair ) \r
878 return 1; // Even means A side (position 0,2,4,6)\r
879 if( (robsel % 2) == 1 && (robsel / 2) == linkpair ) \r
880 return 2; // Odd means B side (position 1,3,5,7)\r
881 return 0;\r
882 }\r
883 \r
884 // ROB group\r
885 if( robsel == 0 ) { return 3; } // Both ROB\r
886 if( robsel == 1 ) { return 1; } // A-side ROB\r
887 if( robsel == 2 ) { return 2; } // B-side ROB\r
888 if( robsel == 3 ) { return 3; } // Both ROB\r
889 if( robsel == 4 ) { return 4; } // Only T3A and T3B\r
890 // Other number 5 to 7 are ignored (not defined) \r
891 \r
892 return 0;\r
893}\r
894\r
895\r
896Short_t AliTRDtrapConfig::ChipmaskToMCMlist( Int_t cmA, Int_t cmB, UShort_t linkpair )\r
897{\r
898 // Converts the chipmask to a list of MCMs \r
899 \r
900 Short_t nmcm = 0;\r
901 Short_t i;\r
902 for( i = 0 ; i < fgkMaxMcm ; i++ ) {\r
903 if( (cmA & (1 << i)) != 0 ) {\r
904 fMcmlist[nmcm] = (linkpair*2 << 7) | i;\r
905 ++nmcm;\r
906 }\r
907 if( (cmB & (1 << i)) != 0 ) {\r
908 fMcmlist[nmcm] = (linkpair*2+1 << 7) | i;\r
909 ++nmcm;\r
910 }\r
911 }\r
912\r
913 fMcmlist[nmcm]=-1;\r
914 return nmcm;\r
915}\r
916\r
917\r
918AliTRDtrapConfig::TrapReg_t AliTRDtrapConfig::GetRegByAddress(Int_t address)\r
919{\r
920 TrapReg_t mcmReg = kLastReg;\r
921 Int_t reg = 0;\r
922 do {\r
923 if(fRegs[reg].addr == address)\r
924 mcmReg = (TrapReg_t) reg;\r
925 reg++;\r
926 } while (mcmReg == kLastReg && reg < kLastReg);\r
927\r
928 return mcmReg;\r
929}\r
930\r
931\r