[u/mrichter/AliRoot.git] / VZERO / AliVZEROLogicalSignal.cxx

/**************************************************************************
 * Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *
 *                                                                        *
 * Author: The ALICE Off-line Project.                                    *
 * Contributors are mentioned in the code where appropriate.              *
 *                                                                        *
 * Permission to use, copy, modify and distribute this software and its   *
 * documentation strictly for non-commercial purposes is hereby granted   *
 * without fee, provided that the above copyright notice appears in all   *
 * copies and that both the copyright notice and this permission notice   *
 * appear in the supporting documentation. The authors make no claims     *
 * about the suitability of this software for any purpose. It is          *
 * provided "as is" without express or implied warranty.                  *
 **************************************************************************/

// 
// Class AliVZEROLogicalSignal
// ---------------------------
// Describes a logical signal in the electronics. 
// Use it to generate observation windows
// which are used by AliVZEROTriggerSimulator class
// 

#include "AliLog.h"
#include "AliVZEROLogicalSignal.h"

ClassImp(AliVZEROLogicalSignal)

//_____________________________________________________________________________
AliVZEROLogicalSignal::AliVZEROLogicalSignal() : TObject(), fStart(0.), fStop(0.)
{
	// Default constructor
}
//_____________________________________________________________________________
AliVZEROLogicalSignal::AliVZEROLogicalSignal(UShort_t profilClock, UInt_t delay) : TObject(), fStart(0.), fStop(0.)
{
	// Constructor using the profilClock and delay parameters comming from the FEE
	
	Bool_t word;
	Bool_t up=kFALSE;
	Bool_t down=kFALSE;
	
	for(int i=0 ; i<5 ; i++) {
	        Int_t shift = (i<4) ? (3-i) : 4;
	        word = (profilClock >> shift) & 0x1;
		if(word&&!up) {
		        fStart = 5. * (i + 1);
			up = kTRUE;
		}
		if(!word&&up&&!down) {
		        fStop = 5. * (i + 1);
			down = kTRUE;
		}		
	}
	if(!down) fStop = 30.;
	
	fStart += delay*1e-2; // Add 10 ps par register unit
	fStop  += delay*1e-2; 
}
//_____________________________________________________________________________
AliVZEROLogicalSignal::AliVZEROLogicalSignal(const AliVZEROLogicalSignal &signal) : 
	TObject(), fStart(signal.fStart), 
	fStop(signal.fStop)
{
	// Copy constructor
}

//_____________________________________________________________________________
AliVZEROLogicalSignal::~AliVZEROLogicalSignal(){
	// Destructor
}

//_____________________________________________________________________________
AliVZEROLogicalSignal& AliVZEROLogicalSignal::operator = 
(const AliVZEROLogicalSignal& signal)
{
	// Operator =
        if(&signal == this) return *this;
	fStart = signal.fStart;
	fStop  = signal.fStop;
	return *this;
}

//_____________________________________________________________________________
AliVZEROLogicalSignal AliVZEROLogicalSignal::operator|(const AliVZEROLogicalSignal& signal) const 
{
	// Perform the Logical OR of two signals: C = A or B
	if((fStart>signal.fStop) || (signal.fStart>fStop))
		AliError(Form("Both signal do not superpose in time.\n  Start(A) = %f Stop(A) = %f\n   Start(B) = %f Stop(B) = %f",fStart, fStop, signal.fStart,signal.fStop));
	
	AliVZEROLogicalSignal result;
	if(fStart<signal.fStart) result.fStart = fStart;
	else result.fStart = signal.fStart;
	
	if(fStop>signal.fStop) result.fStop = fStop;
	else result.fStop = signal.fStop;
		
	return result;
}
//_____________________________________________________________________________
AliVZEROLogicalSignal AliVZEROLogicalSignal::operator&(const AliVZEROLogicalSignal& signal) const
{
	// Perform the Logical AND of two signals: C = A and B
	if((fStart>signal.fStop) || (signal.fStart>fStop))
		AliError(Form("Both signal do not superpose in time.\n  Start(A) = %f Stop(A) = %f\n   Start(B) = %f Stop(B) = %f",fStart, fStop, signal.fStart,signal.fStop));
	
	AliVZEROLogicalSignal result;
	if(fStart>signal.fStart) result.fStart = fStart;
	else result.fStart = signal.fStart;
	
	if(fStop<signal.fStop) result.fStop = fStop;
	else result.fStop = signal.fStop;
	
	return result;
}

//_____________________________________________________________________________
Bool_t AliVZEROLogicalSignal::IsInCoincidence(Float_t time) const
{
	// Check if a signal arriving at the time "time" is in coincidence with the logical signal
	Bool_t result = kFALSE;
	if((time>fStart) && (time<fStop)) result = kTRUE;
	return result;
}
Commit	Line	Data
a65a7e70	1	/**************************************************************************
	2	* Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *
	3	* *
	4	* Author: The ALICE Off-line Project. *
	5	* Contributors are mentioned in the code where appropriate. *
	6	* *
	7	* Permission to use, copy, modify and distribute this software and its *
	8	* documentation strictly for non-commercial purposes is hereby granted *
	9	* without fee, provided that the above copyright notice appears in all *
	10	* copies and that both the copyright notice and this permission notice *
	11	* appear in the supporting documentation. The authors make no claims *
	12	* about the suitability of this software for any purpose. It is *
	13	* provided "as is" without express or implied warranty. *
	14	**************************************************************************/
	15
	16	//
	17	// Class AliVZEROLogicalSignal
	18	// ---------------------------
	19	// Describes a logical signal in the electronics.
	20	// Use it to generate observation windows
	21	// which are used by AliVZEROTriggerSimulator class
	22	//
	23
	24	#include "AliLog.h"
	25	#include "AliVZEROLogicalSignal.h"
	26
	27	ClassImp(AliVZEROLogicalSignal)
	28
	29	//_____________________________________________________________________________
	30	AliVZEROLogicalSignal::AliVZEROLogicalSignal() : TObject(), fStart(0.), fStop(0.)
	31	{
	32	// Default constructor
	33	}
	34	//_____________________________________________________________________________
	35	AliVZEROLogicalSignal::AliVZEROLogicalSignal(UShort_t profilClock, UInt_t delay) : TObject(), fStart(0.), fStop(0.)
	36	{
	37	// Constructor using the profilClock and delay parameters comming from the FEE
	38
	39	Bool_t word;
	40	Bool_t up=kFALSE;
	41	Bool_t down=kFALSE;
	42
	43	for(int i=0 ; i<5 ; i++) {
	44	Int_t shift = (i<4) ? (3-i) : 4;
	45	word = (profilClock >> shift) & 0x1;
	46	if(word&&!up) {
	47	fStart = 5. * (i + 1);
	48	up = kTRUE;
	49	}
	50	if(!word&&up&&!down) {
	51	fStop = 5. * (i + 1);
	52	down = kTRUE;
	53	}
	54	}
	55	if(!down) fStop = 30.;
	56
	57	fStart += delay*1e-2; // Add 10 ps par register unit
	58	fStop += delay*1e-2;
	59	}
	60	//_____________________________________________________________________________
	61	AliVZEROLogicalSignal::AliVZEROLogicalSignal(const AliVZEROLogicalSignal &signal) :
	62	TObject(), fStart(signal.fStart),
	63	fStop(signal.fStop)
	64	{
65	// Copy constructor
66	}
67
68	//_____________________________________________________________________________
69	AliVZEROLogicalSignal::~AliVZEROLogicalSignal(){
70	// Destructor
71	}
72
73	//_____________________________________________________________________________
74	AliVZEROLogicalSignal& AliVZEROLogicalSignal::operator =
75	(const AliVZEROLogicalSignal& signal)
76	{
77	// Operator =
78	if(&signal == this) return *this;
79	fStart = signal.fStart;
80	fStop = signal.fStop;
81	return *this;
82	}
83
84	//_____________________________________________________________________________
85	AliVZEROLogicalSignal AliVZEROLogicalSignal::operator\|(const AliVZEROLogicalSignal& signal) const
86	{
87	// Perform the Logical OR of two signals: C = A or B
88	if((fStart>signal.fStop) \|\| (signal.fStart>fStop))
89	AliError(Form("Both signal do not superpose in time.\n Start(A) = %f Stop(A) = %f\n Start(B) = %f Stop(B) = %f",fStart, fStop, signal.fStart,signal.fStop));
90
91	AliVZEROLogicalSignal result;
92	if(fStart<signal.fStart) result.fStart = fStart;
93	else result.fStart = signal.fStart;
94
95	if(fStop>signal.fStop) result.fStop = fStop;
96	else result.fStop = signal.fStop;
97
98	return result;
99	}
100	//_____________________________________________________________________________
101	AliVZEROLogicalSignal AliVZEROLogicalSignal::operator&(const AliVZEROLogicalSignal& signal) const
102	{
103	// Perform the Logical AND of two signals: C = A and B
104	if((fStart>signal.fStop) \|\| (signal.fStart>fStop))
105	AliError(Form("Both signal do not superpose in time.\n Start(A) = %f Stop(A) = %f\n Start(B) = %f Stop(B) = %f",fStart, fStop, signal.fStart,signal.fStop));
106
107	AliVZEROLogicalSignal result;
108	if(fStart>signal.fStart) result.fStart = fStart;
109	else result.fStart = signal.fStart;
110
111	if(fStop<signal.fStop) result.fStop = fStop;
112	else result.fStop = signal.fStop;
113
114	return result;
115	}
116
117	//_____________________________________________________________________________
118	Bool_t AliVZEROLogicalSignal::IsInCoincidence(Float_t time) const
119	{
120	// Check if a signal arriving at the time "time" is in coincidence with the logical signal
121	Bool_t result = kFALSE;
122	if((time>fStart) && (time<fStop)) result = kTRUE;
123	return result;
124	}
125