[u/mrichter/AliRoot.git] / PYTHIA6 / libAliPythia6.pkg

#-*- Mode: Makefile -*-

SRCS= AliPythiaBase.cxx AliPythia.cxx AliPythia6.cxx AliGenPythia.cxx AliGenPythiaPlus.cxx AliDecayerPythia.cxx

FSRCS:= \
pythia6_common_block_address.F \
tpythia6_called_from_cc.F \
openDecayTable.F

CSRCS:= \
main.c pythia6_common_address.c 

HDRS= $(SRCS:.cxx=.h) 

DHDR:=AliPythia6LinkDef.h

EXPORT:=AliPythiaBase.h AliPythia.h AliDecayerPythia.h

EINCLUDE:=FASTSIM

ifeq (win32gcc,$(ALICE_TARGET))
PACKSOFLAGS:= $(SOFLAGS) -L$(ALICE_ROOT)/lib/tgt_$(ALICE_TARGET) \
                         -lSTEERBase -lSTEER -lEVGEN -lpythia6 -lFASTSIM -llhapdf \
                         -L$(shell root-config --libdir) -lEG -lEGPythia6
endif
Commit	Line	Data
	1	#-- Mode: Makefile --
	2
	3	SRCS= AliPythiaBase.cxx AliPythia.cxx AliPythia6.cxx AliGenPythia.cxx AliGenPythiaPlus.cxx AliDecayerPythia.cxx
	4
	5	FSRCS:= \
	6	pythia6_common_block_address.F \
	7	tpythia6_called_from_cc.F \
	8	openDecayTable.F
	9
	10	CSRCS:= \
	11	main.c pythia6_common_address.c
	12
	13	HDRS= $(SRCS:.cxx=.h)
	14
	15	DHDR:=AliPythia6LinkDef.h
	16
	17	EXPORT:=AliPythiaBase.h AliPythia.h AliDecayerPythia.h
	18
	19	EINCLUDE:=FASTSIM
	20
	21	ifeq (win32gcc,$(ALICE_TARGET))
	22	PACKSOFLAGS:= $(SOFLAGS) -L$(ALICE_ROOT)/lib/tgt_$(ALICE_TARGET) \
	23	-lSTEERBase -lSTEER -lEVGEN -lpythia6 -lFASTSIM -llhapdf \
	24	-L$(shell root-config --libdir) -lEG -lEGPythia6
	25	endif