| | 1 | /**************************************************************************\r |
| | 2 | * Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *\r |
| | 3 | * *\r |
| | 4 | * Author: The ALICE Off-line Project. *\r |
| | 5 | * Contributors are mentioned in the code where appropriate. *\r |
| | 6 | * *\r |
| | 7 | * Permission to use, copy, modify and distribute this software and its *\r |
| | 8 | * documentation strictly for non-commercial purposes is hereby granted *\r |
| | 9 | * without fee, provided that the above copyright notice appears in all *\r |
| | 10 | * copies and that both the copyright notice and this permission notice *\r |
| | 11 | * appear in the supporting documentation. The authors make no claims *\r |
| | 12 | * about the suitability of this software for any purpose. It is *\r |
| | 13 | * provided "as is" without express or implied warranty. *\r |
| | 14 | **************************************************************************/\r |
| | 15 | \r |
| | 16 | // \r |
| | 17 | // Class AliVZEROLogicalSignal\r |
| | 18 | // ---------------------------\r |
| | 19 | // Describes a logical signal in the electronics. \r |
| | 20 | // Use it to generate observation windows\r |
| | 21 | // which are used by AliVZEROTriggerSimulator class\r |
| | 22 | // \r |
| | 23 | \r |
| | 24 | #include "AliLog.h"\r |
| | 25 | #include "AliVZEROLogicalSignal.h"\r |
| | 26 | \r |
| | 27 | ClassImp(AliVZEROLogicalSignal)\r |
| | 28 | \r |
| | 29 | //_____________________________________________________________________________\r |
| | 30 | AliVZEROLogicalSignal::AliVZEROLogicalSignal() : TObject(), fStart(0.), fStop(0.)\r |
| | 31 | {\r |
| | 32 | // Default constructor\r |
| | 33 | }\r |
| | 34 | //_____________________________________________________________________________\r |
| | 35 | AliVZEROLogicalSignal::AliVZEROLogicalSignal(UShort_t profilClock, UInt_t delay) : TObject(), fStart(0.), fStop(0.)\r |
| | 36 | {\r |
| | 37 | // Constructor using the profilClock and delay parameters comming from the FEE\r |
| | 38 | \r |
| | 39 | Bool_t word;\r |
| | 40 | Bool_t up=kFALSE;\r |
| | 41 | Bool_t down=kFALSE;\r |
| | 42 | \r |
| | 43 | for(int i=0 ; i<5 ; i++) {\r |
| | 44 | Int_t shift = (i<4) ? (3-i) : 4;\r |
| | 45 | word = (profilClock >> shift) & 0x1;\r |
| | 46 | if(word&&!up) {\r |
| | 47 | fStart = 5. * (i + 1);\r |
| | 48 | up = kTRUE;\r |
| | 49 | }\r |
| | 50 | if(!word&&up&&!down) {\r |
| | 51 | fStop = 5. * (i + 1);\r |
| | 52 | down = kTRUE;\r |
| | 53 | } \r |
| | 54 | }\r |
| | 55 | if(!down) fStop = 30.;\r |
| | 56 | \r |
| | 57 | fStart += delay*1e-2; // Add 10 ps par register unit\r |
| | 58 | fStop += delay*1e-2; \r |
| | 59 | }\r |
| | 60 | //_____________________________________________________________________________\r |
| | 61 | AliVZEROLogicalSignal::AliVZEROLogicalSignal(const AliVZEROLogicalSignal &signal) : \r |
| | 62 | TObject(), fStart(signal.fStart), \r |
| | 63 | fStop(signal.fStop)\r |
| | 64 | {\r |
| | 65 | // Copy constructor\r |
| | 66 | }\r |
| | 67 | \r |
| | 68 | //_____________________________________________________________________________\r |
| | 69 | AliVZEROLogicalSignal::~AliVZEROLogicalSignal(){\r |
| | 70 | // Destructor\r |
| | 71 | }\r |
| | 72 | \r |
| | 73 | //_____________________________________________________________________________\r |
| | 74 | AliVZEROLogicalSignal& AliVZEROLogicalSignal::operator = \r |
| | 75 | (const AliVZEROLogicalSignal& signal)\r |
| | 76 | {\r |
| | 77 | // Operator =\r |
| | 78 | if(&signal == this) return *this;\r |
| | 79 | fStart = signal.fStart;\r |
| | 80 | fStop = signal.fStop;\r |
| | 81 | return *this;\r |
| | 82 | }\r |
| | 83 | \r |
| | 84 | //_____________________________________________________________________________\r |
| | 85 | AliVZEROLogicalSignal AliVZEROLogicalSignal::operator|(const AliVZEROLogicalSignal& signal) const \r |
| | 86 | {\r |
| | 87 | // Perform the Logical OR of two signals: C = A or B\r |
| | 88 | if((fStart>signal.fStop) || (signal.fStart>fStop))\r |
| | 89 | AliError(Form("Both signal do not superpose in time.\n Start(A) = %f Stop(A) = %f\n Start(B) = %f Stop(B) = %f",fStart, fStop, signal.fStart,signal.fStop));\r |
| | 90 | \r |
| | 91 | AliVZEROLogicalSignal result;\r |
| | 92 | if(fStart<signal.fStart) result.fStart = fStart;\r |
| | 93 | else result.fStart = signal.fStart;\r |
| | 94 | \r |
| | 95 | if(fStop>signal.fStop) result.fStop = fStop;\r |
| | 96 | else result.fStop = signal.fStop;\r |
| | 97 | \r |
| | 98 | return result;\r |
| | 99 | }\r |
| | 100 | //_____________________________________________________________________________\r |
| | 101 | AliVZEROLogicalSignal AliVZEROLogicalSignal::operator&(const AliVZEROLogicalSignal& signal) const\r |
| | 102 | {\r |
| | 103 | // Perform the Logical AND of two signals: C = A and B\r |
| | 104 | if((fStart>signal.fStop) || (signal.fStart>fStop))\r |
| | 105 | AliError(Form("Both signal do not superpose in time.\n Start(A) = %f Stop(A) = %f\n Start(B) = %f Stop(B) = %f",fStart, fStop, signal.fStart,signal.fStop));\r |
| | 106 | \r |
| | 107 | AliVZEROLogicalSignal result;\r |
| | 108 | if(fStart>signal.fStart) result.fStart = fStart;\r |
| | 109 | else result.fStart = signal.fStart;\r |
| | 110 | \r |
| | 111 | if(fStop<signal.fStop) result.fStop = fStop;\r |
| | 112 | else result.fStop = signal.fStop;\r |
| | 113 | \r |
| | 114 | return result;\r |
| | 115 | }\r |
| | 116 | \r |
| | 117 | //_____________________________________________________________________________\r |
| | 118 | Bool_t AliVZEROLogicalSignal::IsInCoincidence(Float_t time) const\r |
| | 119 | {\r |
| | 120 | // Check if a signal arriving at the time "time" is in coincidence with the logical signal\r |
| | 121 | Bool_t result = kFALSE;\r |
| | 122 | if((time>fStart) && (time<fStop)) result = kTRUE;\r |
| | 123 | return result;\r |
| | 124 | }\r |
| | 125 | \r |
git://git.uio.no / u / mrichter / AliRoot.git / blame_incremental