1 #ifndef AliITSQASDDDataMakerRec_H
2 #define AliITSQASDDDataMakerRec_H
3 /* Copyright(c) 2007-2009, ALICE Experiment at CERN, All rights reserved. *
4 * See cxx source for full Copyright notice */
7 // Checks the quality assurance.
8 // By comparing with reference data
12 // W. Ferrarese + P. Cerello Feb 2008
17 #include "AliITSQADataMakerRec.h"
20 class AliITSDDLModuleMapSDD;
22 class AliITSQASDDDataMakerRec: public TObject {
25 AliITSQASDDDataMakerRec(AliITSQADataMakerRec *aliITSQADataMakerRec, Bool_t kMode = kFALSE, Short_t ldc = 0);
26 AliITSQASDDDataMakerRec(const AliITSQASDDDataMakerRec& qadm);
27 AliITSQASDDDataMakerRec& operator = (const AliITSQASDDDataMakerRec& qac);
28 virtual void InitRaws();
29 virtual void InitRecPoints();
30 virtual void MakeRaws(AliRawReader *rawReader);
31 virtual void MakeRecPoints(TTree *clustersTree);
32 virtual void StartOfDetectorCycle();
33 virtual void EndOfDetectorCycle(AliQA::TASKINDEX_t task, TObjArray * list);
34 virtual ~AliITSQASDDDataMakerRec(); // dtor
35 Int_t GetOffset() { return fGenOffset; }
36 Int_t GetTaskHisto() { return fSDDhTask; }
40 static const Int_t fgknSDDmodules = 260; //number of SDD modules
41 static const Int_t fgkmodoffset = 240; //number of SPD modules
42 static const Int_t fgknAnode = 256; //anode per half-module
43 static const Int_t fgknSide =2; //side per module
44 static const Int_t fgkeqOffset = 256; //DDL offset
45 static const Int_t fgkDDLidRange = 24; //number of DDL:so DDL range is 257-280
46 static const Int_t fgkDDLIDshift = 0; //necessary option until RawStream Table is complete
47 static const Int_t fgkLADDonLAY3 = 14; //number of ladder on layer 3
48 static const Int_t fgkLADDonLAY4 = 22; //number of ladder on layer 4
50 AliITSQADataMakerRec *fAliITSQADataMakerRec;//pointer to the main ctor
51 Bool_t fkOnline; //online (1) or offline (0) use
52 Int_t fLDC; //LDC number (0 for offline, 1 to 4 for online)
53 Int_t fSDDhTask; // number of histo booked for each Task SDD
54 Int_t fGenOffset; // qachecking offset
55 Int_t fTimeBinSize; // time bin width in number of clocks
56 AliITSDDLModuleMapSDD *fDDLModuleMap;// SDD Detector configuration for the decoding
58 TProfile2D *fModuleChargeMap[2*fgknSDDmodules];//module map
59 TProfile2D *fModuleChargeMapFSE[2*fgknSDDmodules];//module map for one event
61 ClassDef(AliITSQASDDDataMakerRec,4) // description