Implementation of Trigger simulation (Raphael Tieulent)
[u/mrichter/AliRoot.git] / VZERO / AliVZEROLogicalSignal.cxx
1 /**************************************************************************
2  * Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *
3  *                                                                        *
4  * Author: The ALICE Off-line Project.                                    *
5  * Contributors are mentioned in the code where appropriate.              *
6  *                                                                        *
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10  * copies and that both the copyright notice and this permission notice   *
11  * appear in the supporting documentation. The authors make no claims     *
12  * about the suitability of this software for any purpose. It is          *
13  * provided "as is" without express or implied warranty.                  *
14  **************************************************************************/
15
16
17 //  Describes a logical signal
18 // Used by AliVZEROTriggerSim class
19 // 
20
21 #include "AliLog.h"
22 #include "AliVZEROLogicalSignal.h"
23
24 ClassImp(AliVZEROLogicalSignal)
25
26 //_____________________________________________________________________________
27 AliVZEROLogicalSignal::AliVZEROLogicalSignal() : TObject(), fStart(0.), fStop(0.)
28 {
29 }
30 //_____________________________________________________________________________
31 AliVZEROLogicalSignal::AliVZEROLogicalSignal(Float_t start, Float_t stop) : TObject(), fStart(start), fStop(stop)
32 {
33         if(fStart>fStop) AliError("Logical Signal has a Start time AFTER the Stop time");
34         if(fStart==fStop) AliWarning("Logical Signal has a zero width");
35 }
36 //_____________________________________________________________________________
37 AliVZEROLogicalSignal::AliVZEROLogicalSignal(UShort_t profilClock, UInt_t delay) : TObject(), fStart(0.), fStop(0.)
38 {
39         Bool_t word;
40         Bool_t up=kFALSE;
41         Bool_t down=kFALSE;
42         
43         for(int i=0 ; i<5 ; i++) {
44                 word = (profilClock >> i) & 0x1;
45                 if(word&&!up) {
46                         fStart = 5. * i;
47                         up = kTRUE;
48                 }
49                 if(!word&&up&&!down) {
50                         fStop = 5. * i;
51                         down = kTRUE;
52                 }               
53         }
54         if(!down) fStop = 25.;
55         
56         fStart += delay*10.e-3; // Add 10 ps par register unit
57         fStop  += delay*10.e-3; 
58 };
59 //_____________________________________________________________________________
60 AliVZEROLogicalSignal::AliVZEROLogicalSignal(const AliVZEROLogicalSignal &signal) : 
61         TObject(), fStart(signal.fStart), 
62         fStop(signal.fStop)
63 {
64         // Copy constructor
65 }
66
67 //_____________________________________________________________________________
68 AliVZEROLogicalSignal::~AliVZEROLogicalSignal(){
69 }
70
71 //_____________________________________________________________________________
72 AliVZEROLogicalSignal& AliVZEROLogicalSignal::operator = 
73 (const AliVZEROLogicalSignal& signal)
74 {
75         fStart = signal.fStart;
76         fStop  = signal.fStop;
77         return *this;
78 }
79
80 //_____________________________________________________________________________
81 AliVZEROLogicalSignal AliVZEROLogicalSignal::operator|(const AliVZEROLogicalSignal& signal) const 
82 {
83         // Perform the Logical OR of two signals: C = A or B
84         if((fStart>signal.fStop) || (signal.fStart>fStop))
85                 AliError(Form("Both signal do not superpose in time.\n  Start(A) = %f Stop(A) = %f\n   Start(B) = %f Stop(B) = %f",fStart, fStop, signal.fStart,signal.fStop));
86         
87         AliVZEROLogicalSignal result;
88         if(fStart<signal.fStart) result.fStart = fStart;
89         else result.fStart = signal.fStart;
90         
91         if(fStop>signal.fStop) result.fStop = fStop;
92         else result.fStop = signal.fStop;
93                 
94         return result;
95 }
96 //_____________________________________________________________________________
97 AliVZEROLogicalSignal AliVZEROLogicalSignal::operator&(const AliVZEROLogicalSignal& signal) const
98 {
99         // Perform the Logical AND of two signals: C = A and B
100         if((fStart>signal.fStop) || (signal.fStart>fStop))
101                 AliError(Form("Both signal do not superpose in time.\n  Start(A) = %f Stop(A) = %f\n   Start(B) = %f Stop(B) = %f",fStart, fStop, signal.fStart,signal.fStop));
102         
103         AliVZEROLogicalSignal result;
104         if(fStart>signal.fStart) result.fStart = fStart;
105         else result.fStart = signal.fStart;
106         
107         if(fStop<signal.fStop) result.fStop = fStop;
108         else result.fStop = signal.fStop;
109         
110         return result;
111 }
112
113 //_____________________________________________________________________________
114 Bool_t AliVZEROLogicalSignal::IsInCoincidence(Float_t time)
115 {
116         Bool_t result = kFALSE;
117         if((time>fStart) && (time<fStop)) result = kTRUE;
118         return result;
119 }