Fix coding rule violations (MinJung)
authorcblume <cblume@f7af4fe6-9843-0410-8265-dc069ae4e863>
Wed, 4 Mar 2009 11:53:08 +0000 (11:53 +0000)
committercblume <cblume@f7af4fe6-9843-0410-8265-dc069ae4e863>
Wed, 4 Mar 2009 11:53:08 +0000 (11:53 +0000)
TRD/AliTRDrawTPStream.cxx
TRD/AliTRDrawTPStream.h

index 28eb09a..cc747ff 100644 (file)
-#/**************************************************************************
-* Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *
-*                                                                        *
-* Author: The ALICE Off-line Project.                                    *
-* Contributors are mentioned in the code where appropriate.              *
-*                                                                        *
-* Permission to use, copy, modify and distribute this software and its   *
-* documentation strictly for non-commercial purposes is hereby granted   *
-* without fee, provided that the above copyright notice appears in all   *
-* copies and that both the copyright notice and this permission notice   *
-* appear in the supporting documentation. The authors make no claims     *
-* about the suitability of this software for any purpose. It is          *
-* provided "as is" without express or implied warranty.                  *
-**************************************************************************/
-
-/* $Id: AliTRDrawTPStream.cxx 27797 2008-08-05 14:37:22Z cblume $ */
-
-///////////////////////////////////////////////////////////////////////////////////////
-//                                                                                   //
-// This class provides access to pattern generated TRD raw data including            //
-// configuration data.                                                               //
-//                                                                                   //
-// It is based on Venelin Angelov's c++ code decoding standalone                     // 
-// configuration data                                                                //  
-// http://alice.physi.uni-heidelberg.de/svn/trd/wconfigurations/trunk/C/trap_cnf.cpp //
-// http://alice.physi.uni-heidelberg.de/svn/trd/wconfigurations/trunk/C/trap_cnf.h   //
-//                                                                                   //
-// Author: MinJung Kweon(minjung@physi.uni-heidelberg.de)                            // 
-//                                                                                   //
-///////////////////////////////////////////////////////////////////////////////////////
-
-#include "TString.h"
-#include "AliLog.h"
-
-#include "AliTRDrawStream.h"
-#include "AliTRDrawTPStream.h"
-
-
-#define GET_VALUE_AT(w,m,s) (( (w) >> (s)) & (m) )
-#define MCM_HEADER_MASK_ERR(w) ( ((w) & (0xf)) == (0xc) ? 0 : 1) 
-#define MCM_ROB_NUMBER(w) GET_VALUE_AT(w,0x7,28)
-#define MCM_MCM_NUMBER(w) GET_VALUE_AT(w,0x0f,24)
-#define MCM_EVENT_COUNTER(w) GET_VALUE_AT(w,0x00fffff,4)
-
-
-
-ClassImp(AliTRDrawTPStream)
-
-//---------------------------------------------------------------------
-AliTRDrawTPStream::AliTRDrawTPStream(Int_t rawVMajorOpt, UInt_t * pPos)
-  : AliTRDrawStreamBase()
-  , fTrapReg() 
-  , fCmdReg() 
-  , fRoReg() 
-  , fCnfPro()
-  , fDmemValid()
-  , fRegs()
-  , fDmem()
-  , fDbank()
-  , fDbankPro()
-  , fpPos(pPos)
-  , fRawVMajorOpt(rawVMajorOpt) 
-{
-  //
-  // default constructor
-  //
-
-  if (FillConfig() == kFALSE)
-    AliError("Reading reset value failed.");
-
-}
-
-//---------------------------------------------------------------------
-AliTRDrawTPStream::AliTRDrawTPStream(const AliTRDrawTPStream& /*st*/)
-  : AliTRDrawStreamBase()
-  , fTrapReg() 
-  , fCmdReg() 
-  , fRoReg() 
-  , fCnfPro()
-  , fDmemValid()
-  , fRegs()
-  , fDmem()
-  , fDbank()
-  , fDbankPro()
-  , fpPos()
-  , fRawVMajorOpt() 
-{
-  //
-  // copy constructor
-  //
-
-  AliError("Not implemeneted.");
-
-}
-
-//---------------------------------------------------------------------
-AliTRDrawTPStream &
-AliTRDrawTPStream::operator=(const AliTRDrawTPStream &)
-{
-  //
-  // we are not using this functionality
-  //
-  AliFatal("May not use.");
-  return *this;
-}
-
-//---------------------------------------------------------------------
-AliTRDrawTPStream::~AliTRDrawTPStream()
-{
-  //
-  // destructor
-  //
-}
-
-//---------------------------------------------------------------------
-Bool_t AliTRDrawTPStream::DecodeTPdata()
-{
-
-  if (fRawVMajorOpt == 7)
-    {
-     AliInfo("This is configuration data event read by first trigger.");
-     if(!AliTRDrawStream::fgEnableDecodeConfigData) return kTRUE;
-     if (DecodeConfigdata() == kFALSE) // configuration data 
-       {
-        AliError("failed to to decode configuration data");
-        return kFALSE;
-       }
-     else 
-       return kTRUE;
-    }
-  else
-    AliError("These are different type of test pattern data. You need other reader");
-
-  return kFALSE;
-}
-
-//---------------------------------------------------------------------
-Bool_t AliTRDrawTPStream::DecodeConfigdata()
-{
-
-    UInt_t packedConf[256];
-    Int_t mcmPos, mcmsRead, lengthPacked;
-
-    mcmsRead = 0;
-    do
-    {
-        mcmPos = ReadPacked(fpPos, packedConf, &lengthPacked);
-        if (mcmPos >= 0)
-        {
-            PowerUp();
-            UnPackConfN(packedConf, lengthPacked);
-            DumpCnf(mcmPos);
-            mcmsRead++;
-            AliInfo(Form("%d MCMs read up to now, last was MCM%02d\n",mcmsRead, mcmPos));
-        }
-    } while ((mcmsRead < 84) && (mcmPos >= 0)); // [mj] have to think about # of mcmsRead
-    AliInfo("Done\n");
-
-    return kTRUE;
-}
-
-//---------------------------------------------------------------------
-Int_t AliTRDrawTPStream::ReadPacked(UInt_t *word, UInt_t *pData, Int_t *nWords)
-{
-
-    UInt_t vword = *word;
-
-    Int_t  iLength;
-    UInt_t err, robNum, mcmNum, chipId, NoEndMarker;
-
-    iLength = 0;
-    err = 0;
-
-    // decode mcm header
-    if(MCM_HEADER_MASK_ERR(vword)) err++;
-
-    robNum = MCM_ROB_NUMBER(vword);
-    mcmNum = MCM_MCM_NUMBER(vword);
-    chipId = MCM_EVENT_COUNTER(vword);
-
-    if (err == 0) {
-      AliInfo(Form("MCM header ROB %d, MCM %02d, ChipId %d 0x%05x\n", robNum, mcmNum, chipId, chipId));
-    }
-    else 
-      return -1;
-
-    // read MCM data and store into array
-    NoEndMarker = 1;
-    do
-    {
-        word++;
-        vword = *word;
-
-        NoEndMarker = ((vword != ENDM_CONF) && (vword != (ENDM_CONF | 1)) && (vword != 0x10001000));
-        *pData = vword;
-        pData++;
-        iLength++;
-    } while (NoEndMarker && (iLength < 256));
-
-    word++;       
-    fpPos = word;
-
-    *nWords = iLength;
-    if (iLength == 0) 
-      return -1;
-    else
-      return mcmNum;
-}
-
-//---------------------------------------------------------------------
-void AliTRDrawTPStream::PowerUp() // power up
-{
-    // copy the reset values 
-    for (Int_t i=0; i< N_REGS; i++)
-    {
-        fRegs[i] = fTrapReg[i].fResVal;
-        fCnfPro[i] = 0;
-    }
-    // mark all DMEM cells as invalid
-    for (Int_t i=0; i< N_DMEM; i++) fDmemValid[i] = 0;
-    // mark all DBANK cells as empty
-    for (Int_t i=0; i< N_DBANK; i++) fDbankPro[i] = kDbankEmpty;
-}
-
-
-//---------------------------------------------------------------------
-Int_t AliTRDrawTPStream::UnPackConfN(UInt_t *pData, Int_t maxLength)
-{
-    Int_t debug = 0; // the debug mode not completely ready
-    Int_t step, bwidth, nwords, idx, err, exitFlag, bitcnt, werr;
-    UInt_t caddr;
-    UInt_t dat, msk, header, dataHi;
-
-    idx = 0; // index in PackedConf
-    err = 0;
-    while (idx < maxLength)
-    {
-        header = *pData;
-        if (debug) printf("read 0x%08x  ",header);
-        pData++;
-        idx++;
-        if (header & 0x01) // single data
-          {
-            dat = (header >> 2) & 0xFFFF;       // 16 bit data
-            caddr = (header >> 18) & 0x3FFF;    // 14 bit address
-            if (caddr != 0x1FFF)                // temp!!! because the end marker was wrong
-            {
-             if (header & 0x02)                 // check if > 16 bits
-               {
-                dataHi = *pData;
-                if (debug) printf("read 0x%08x  ",dataHi);
-                pData++;
-                idx++;
-                err += ((dataHi ^ (dat | 1)) & 0xFFFF) != 0;
-                dat = (dataHi & 0xFFFF0000) | dat;
-               }
-               if (debug) printf("addr=0x%04x (%s) data=0x%08x\n",caddr, Addr2Name(caddr), dat);
-               werr = SetU(caddr, dat);
-               if (werr < 0)
-                 {
-                  printf("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header);
-                 }
-               if (idx > maxLength)
-                 {
-                  printf("(single-write): no more data, missing end marker\n");
-                  return -err;
-                 }
-            }
-            else
-            {
-             printf("(single-write): address 0x%04x => old endmarker?\n",caddr);
-                return err;
-            }
-          }
-        else               // block of data
-          {
-            step   =  (header >>  1) & 0x0003;
-            bwidth = ((header >>  3) & 0x001F) + 1;
-            nwords =  (header >>  8) & 0x00FF;
-            caddr  =  (header >> 16) & 0xFFFF;
-            exitFlag = (step == 0) || (step == 3) || (nwords == 0);
-            if (exitFlag) return err;
-            switch (bwidth)
-            {
-                case    15:
-                case    10:
-                case     7:
-                case     6:
-                case     5:
-                {
-                    msk = (1 << bwidth) - 1;
-                    bitcnt = 0;
-                    while (nwords > 0)
-                    {
-                        nwords--;
-                        bitcnt -= bwidth;
-                        if (bitcnt < 0)
-                        {
-                            header = *pData;
-                            if (debug) printf("read 0x%08x  ",header);
-                            pData++;
-                            idx++;
-                            err += (header & 1);
-                            header = header >> 1;
-                            bitcnt = 31 - bwidth;
-                        }
-                        if (debug) printf("addr=0x%04x (%s) data=0x%08x\n",caddr, Addr2Name(caddr), header & msk);
-                        werr = SetU(caddr, header & msk);
-                        if (werr < 0)
-                        {
-                          printf("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header);
-                        }
-                        caddr += step;
-                        header = header >> bwidth;
-                        if (idx >= maxLength)
-                        {
-                          printf("(block-write): no end marker! %d words read\n",idx);
-                          return -err;
-                        }
-                    }
-                    break;
-                } // end case 5-15
-                case 31:
-                {
-                    while (nwords > 0)
-                    {
-                        header = *pData;
-                        if (debug) printf("read 0x%08x  ",header);
-                        pData++;
-                        idx++;
-                        nwords--;
-                        err += (header & 1);
-                        if (debug) printf("addr=0x%04x (%s) data=0x%08x\n",caddr, Addr2Name(caddr), header >> 1);
-                        werr = SetU(caddr, header >> 1);
-                        if (werr < 0)
-                        {
-                            printf("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header);
-                        }
-                        caddr += step;
-                        if (idx >= maxLength)
-                        {
-                            printf("no end marker! %d words read\n",idx);
-                            return -err;
-                        }
-                    }
-                    break;
-                }
-                default: return err;
-            } // end switch
-        } // end block case
-    } // end while
-    printf("no end marker! %d words read\n",idx);
-    return -err; // only if the max length of the block reached!
-}
-
-//---------------------------------------------------------------------
-void AliTRDrawTPStream::DumpCnf(Int_t slv)
-{
-    UInt_t idx;
-    for (idx = 0; idx < N_REGS; idx++) // config. reg
-       {
-        if (slv >= 0)
-          printf("%s\t0x%08x\t%3d %c\n", fTrapReg[idx].fName, (Int_t) fRegs[idx], slv, CnfStat(fCnfPro[idx]));
-        else
-          printf("%s\t0x%08x %c\n", fTrapReg[idx].fName, (Int_t) fRegs[idx], CnfStat(fCnfPro[idx]));
-       }
-}
-
-
-//---------------------------------------------------------------------
-const Char_t * AliTRDrawTPStream::Addr2Name(UInt_t addr)
-{
-    Int_t idx;
-    idx = 0;
-    if ( ( ( (addr >> 4) & 0xFFE) == 0x0C0) && ( ( (addr >> 2) & 1) == 1) )
-    {
-        addr = addr & 0x0C07;
-    }
-    while ((idx < N_REGS) && (fTrapReg[idx].fAddr != addr) ) idx++;
-    if (idx < N_REGS)
-        return fTrapReg[idx].fName;
-    idx = 0;
-    while ((idx < N_CMD) && (fCmdReg[idx].fAddr != addr)) idx++;
-    if (idx < N_CMD)
-        return fCmdReg[idx].fName;
-    idx = 0;
-    while ((idx < N_RO) && (fRoReg[idx].fAddr != addr)) idx++;
-    if (idx < N_RO)
-        return fRoReg[idx].fName;
-    else
-        return 0;
-}
-
-//---------------------------------------------------------------------
-Char_t AliTRDrawTPStream::CnfStat(UInt_t prop)
-{
-    if (prop == 0) return 'U';
-    else
-    if (prop == 1) return 'R';
-    else
-    if (prop == 2) return 'I';
-    else
-                   return prop;
-}
-
-//---------------------------------------------------------------------
-Int_t AliTRDrawTPStream::SetU(UInt_t addr, UInt_t newVal)
-{
-    Int_t i;
-    UInt_t maxVal = 0;
-
-    if (AddrIsDmem(addr))
-    {
-        fDmem[addr & 0x3FF] = newVal;
-        fDmemValid[addr & 0x3FF] = 1;
-        return 0;
-    }
-    else
-    if (AddrIsDbank(addr))
-    {
-        fDbank[addr & 0xFF] = newVal;
-        fDbankPro[addr & 0xFF] = kScsnDat;
-        return 0;
-    }
-    else
-    {
-        i = Addr2Idx(addr);
-        if (i < N_REGS) // found
-        {
-            fCnfPro[i] = 2;
-            if (fTrapReg[i].fNbits < 32) // create the max value from the number of bits
-            {
-                maxVal = 1;
-                maxVal = (maxVal << fTrapReg[i].fNbits) - 1;
-            }
-            if ( (fTrapReg[i].fNbits == 32) || (newVal <= maxVal) ) // in range
-            {
-                fRegs[i] = newVal;
-                return 0;
-            }
-            else
-            {   // out of range
-                fRegs[i] = newVal & maxVal;
-                printf("Out of range, writing 0x%08x to %d bits at addr = 0x%04x\n",newVal, fTrapReg[i].fNbits, addr);
-                return -2;
-            }
-        }
-        else    // not found
-            {
-                printf("(SetU): No such address, writing 0x%08x to addr = 0x%04x\n",newVal, addr);
-                return -1; // no such address
-            }
-    }
-}
-
-//---------------------------------------------------------------------
-Int_t AliTRDrawTPStream::AddrIsDmem(UInt_t addr)
-{
-    addr = (addr >> 10);
-    return (addr == 0x30);
-}
-
-//---------------------------------------------------------------------
-Int_t AliTRDrawTPStream::AddrIsDbank(UInt_t addr)
-{
-    addr = (addr >> 8);
-    return (addr == 0xF0);
-}
-
-//---------------------------------------------------------------------
-UInt_t AliTRDrawTPStream::Addr2Idx(UInt_t addr)
-{
-    Int_t idx;
-    idx = 0;
-    // check if global const
-    if ( ( ( (addr >> 4) & 0xFFE) == 0x0C0) && ( ( (addr >> 2) & 1) == 1) )
-    {
-        addr = addr & 0x0C07;
-    }
-    // searching
-    while ((idx < N_REGS) && (fTrapReg[idx].fAddr != addr)) idx++;
-       // printf("Addr = 0x%04x; Idx = %d\n",addr, idx); // debugging
-    return idx;
-}
-
-//---------------------------------------------------------------------
-Bool_t AliTRDrawTPStream::FillConfig()
-{
-
-  const SimpleRegs trapReg[N_REGS] = {
-    // Name         Address Nbits   Reset Value
-    // Global state machine
-    {"SML0",        0x0A00, 15,     0x4050},
-    {"SML1",        0x0A01, 15,     0x4200},
-    {"SML2",        0x0A02, 15,     0x4384},
-    {"SMMODE",      0x0A03, 16,     0xF0E2},
-    {"NITM0",       0x0A08, 14,     0x3FFF},
-    {"NITM1",       0x0A09, 14,     0x3FFF},
-    {"NITM2",       0x0A0A, 14,     0x3FFF},
-    {"NIP4D",       0x0A0B, 7,      0x7F},
-    {"CPU0CLK",     0x0A20, 5,      0x07},
-    {"CPU1CLK",     0x0A22, 5,      0x07},
-    {"CPU2CLK",     0x0A24, 5,      0x07},
-    {"CPU3CLK",     0x0A26, 5,      0x07},
-    {"NICLK",       0x0A28, 5,      0x07},
-    {"FILCLK",      0x0A2A, 5,      0x07},
-    {"PRECLK",      0x0A2C, 5,      0x07},
-    {"ADCEN",       0x0A2E, 5,      0x07},
-    {"NIODE",       0x0A30, 5,      0x07},
-    {"NIOCE",       0x0A32, 5,      0x21}, // bit 5 is status bit (read-only)!
-    {"NIIDE",       0x0A34, 5,      0x07},
-    {"NIICE",       0x0A36, 5,      0x07},
-    // Arbiter
-    {"ARBTIM",      0x0A3F, 4,      0x0},
-    // IVT of CPU0
-    {"IA0IRQ0",     0x0B00, 12,     0x000},
-    {"IA0IRQ1",     0x0B01, 12,     0x000},
-    {"IA0IRQ2",     0x0B02, 12,     0x000},
-    {"IA0IRQ3",     0x0B03, 12,     0x000},
-    {"IA0IRQ4",     0x0B04, 12,     0x000},
-    {"IA0IRQ5",     0x0B05, 12,     0x000},
-    {"IA0IRQ6",     0x0B06, 12,     0x000},
-    {"IA0IRQ7",     0x0B07, 12,     0x000},
-    {"IA0IRQ8",     0x0B08, 12,     0x000},
-    {"IA0IRQ9",     0x0B09, 12,     0x000},
-    {"IA0IRQA",     0x0B0A, 12,     0x000},
-    {"IA0IRQB",     0x0B0B, 12,     0x000},
-    {"IA0IRQC",     0x0B0C, 12,     0x000},
-    {"IRQSW0",      0x0B0D, 13,     0x1FFF},
-    {"IRQHW0",      0x0B0E, 13,     0x0000},
-    {"IRQHL0",      0x0B0F, 13,     0x0000},
-    // IVT of CPU1
-    {"IA1IRQ0",     0x0B20, 12,     0x000},
-    {"IA1IRQ1",     0x0B21, 12,     0x000},
-    {"IA1IRQ2",     0x0B22, 12,     0x000},
-    {"IA1IRQ3",     0x0B23, 12,     0x000},
-    {"IA1IRQ4",     0x0B24, 12,     0x000},
-    {"IA1IRQ5",     0x0B25, 12,     0x000},
-    {"IA1IRQ6",     0x0B26, 12,     0x000},
-    {"IA1IRQ7",     0x0B27, 12,     0x000},
-    {"IA1IRQ8",     0x0B28, 12,     0x000},
-    {"IA1IRQ9",     0x0B29, 12,     0x000},
-    {"IA1IRQA",     0x0B2A, 12,     0x000},
-    {"IA1IRQB",     0x0B2B, 12,     0x000},
-    {"IA1IRQC",     0x0B2C, 12,     0x000},
-    {"IRQSW1",      0x0B2D, 13,     0x1FFF},
-    {"IRQHW1",      0x0B2E, 13,     0x0000},
-    {"IRQHL1",      0x0B2F, 13,     0x0000},
-    // IVT of CPU2
-    {"IA2IRQ0",     0x0B40, 12,     0x000},
-    {"IA2IRQ1",     0x0B41, 12,     0x000},
-    {"IA2IRQ2",     0x0B42, 12,     0x000},
-    {"IA2IRQ3",     0x0B43, 12,     0x000},
-    {"IA2IRQ4",     0x0B44, 12,     0x000},
-    {"IA2IRQ5",     0x0B45, 12,     0x000},
-    {"IA2IRQ6",     0x0B46, 12,     0x000},
-    {"IA2IRQ7",     0x0B47, 12,     0x000},
-    {"IA2IRQ8",     0x0B48, 12,     0x000},
-    {"IA2IRQ9",     0x0B49, 12,     0x000},
-    {"IA2IRQA",     0x0B4A, 12,     0x000},
-    {"IA2IRQB",     0x0B4B, 12,     0x000},
-    {"IA2IRQC",     0x0B4C, 12,     0x000},
-    {"IRQSW2",      0x0B4D, 13,     0x1FFF},
-    {"IRQHW2",      0x0B4E, 13,     0x0000},
-    {"IRQHL2",      0x0B4F, 13,     0x0000},
-    // IVT of CPU3
-    {"IA3IRQ0",     0x0B60, 12,     0x000},
-    {"IA3IRQ1",     0x0B61, 12,     0x000},
-    {"IA3IRQ2",     0x0B62, 12,     0x000},
-    {"IA3IRQ3",     0x0B63, 12,     0x000},
-    {"IA3IRQ4",     0x0B64, 12,     0x000},
-    {"IA3IRQ5",     0x0B65, 12,     0x000},
-    {"IA3IRQ6",     0x0B66, 12,     0x000},
-    {"IA3IRQ7",     0x0B67, 12,     0x000},
-    {"IA3IRQ8",     0x0B68, 12,     0x000},
-    {"IA3IRQ9",     0x0B69, 12,     0x000},
-    {"IA3IRQA",     0x0B6A, 12,     0x000},
-    {"IA3IRQB",     0x0B6B, 12,     0x000},
-    {"IA3IRQC",     0x0B6C, 12,     0x000},
-    {"IRQSW3",      0x0B6D, 13,     0x1FFF},
-    {"IRQHW3",      0x0B6E, 13,     0x0000},
-    {"IRQHL3",      0x0B6F, 13,     0x0000},
-    // Global Counter/Timer
-    {"CTGDINI",     0x0B80, 32,     0x00000000},
-    {"CTGCTRL",     0x0B81, 12,     0xE3F},
-    // CPU constants
-    {"C08CPU0",     0x0C00, 32,     0x00000000},
-    {"C09CPU0",     0x0C01, 32,     0x00000000},
-    {"C10CPU0",     0x0C02, 32,     0x00000000},
-    {"C11CPU0",     0x0C03, 32,     0x00000000},
-    {"C12CPUA",     0x0C04, 32,     0x00000000},
-    {"C13CPUA",     0x0C05, 32,     0x00000000},
-    {"C14CPUA",     0x0C06, 32,     0x00000000},
-    {"C15CPUA",     0x0C07, 32,     0x00000000},
-    {"C08CPU1",     0x0C08, 32,     0x00000000},
-    {"C09CPU1",     0x0C09, 32,     0x00000000},
-    {"C10CPU1",     0x0C0A, 32,     0x00000000},
-    {"C11CPU1",     0x0C0B, 32,     0x00000000},
-    {"C08CPU2",     0x0C10, 32,     0x00000000},
-    {"C09CPU2",     0x0C11, 32,     0x00000000},
-    {"C10CPU2",     0x0C12, 32,     0x00000000},
-    {"C11CPU2",     0x0C13, 32,     0x00000000},
-    {"C08CPU3",     0x0C18, 32,     0x00000000},
-    {"C09CPU3",     0x0C19, 32,     0x00000000},
-    {"C10CPU3",     0x0C1A, 32,     0x00000000},
-    {"C11CPU3",     0x0C1B, 32,     0x00000000},
-    // NI interface
-    {"NMOD",        0x0D40, 6,      0x08},
-    {"NDLY",        0x0D41, 30,     0x24924924},
-    {"NED",         0x0D42, 16,     0xA240},
-    {"NTRO",        0x0D43, 18,     0x3FFFC},
-    {"NRRO",        0x0D44, 18,     0x3FFFC},
-
-    {"NES",         0x0D45, 32,     0x00000000},
-    {"NTP",         0x0D46, 32,     0x0000FFFF},
-    {"NBND",        0x0D47, 16,     0x6020},
-    {"NP0",         0x0D48, 11,     0x44C},
-    {"NP1",         0x0D49, 11,     0x44C},
-    {"NP2",         0x0D4A, 11,     0x44C},
-    {"NP3",         0x0D4B, 11,     0x44C},
-    {"NCUT",        0x0D4C, 32,     0xFFFFFFFF},
-    // Filter and Preprocessor
-    {"TPPT0",       0x3000, 7,      0x01},
-    {"TPFS",        0x3001, 7,      0x05},
-    {"TPFE",        0x3002, 7,      0x14},
-    {"TPPGR",       0x3003, 7,      0x15},
-    {"TPPAE",       0x3004, 7,      0x1E},
-    {"TPQS0",       0x3005, 7,      0x00},
-    {"TPQE0",       0x3006, 7,      0x0A},
-    {"TPQS1",       0x3007, 7,      0x0B},
-    {"TPQE1",       0x3008, 7,      0x14},
-    {"EBD",         0x3009, 3,      0x0},
-    {"EBAQA",       0x300A, 7,      0x00},
-    {"EBSIA",       0x300B, 7,      0x20},
-    {"EBSF",        0x300C, 1,      0x1},
-    {"EBSIM",       0x300D, 1,      0x1},
-    {"EBPP",        0x300E, 1,      0x1},
-    {"EBPC",        0x300F, 1,      0x1},
-
-    {"EBIS",        0x3014, 10,     0x005},
-    {"EBIT",        0x3015, 12,     0x028},
-    {"EBIL",        0x3016, 8,      0xF0},
-    {"EBIN",        0x3017, 1,      0x1},
-    {"FLBY",        0x3018, 1,      0x0},
-    {"FPBY",        0x3019, 1,      0x0},
-    {"FGBY",        0x301A, 1,      0x0},
-    {"FTBY",        0x301B, 1,      0x0},
-    {"FCBY",        0x301C, 1,      0x0},
-    {"FPTC",        0x3020, 2,      0x3},
-    {"FPNP",        0x3021, 9,      0x078},
-    {"FPCL",        0x3022, 1,      0x1},
-    {"FGTA",        0x3028, 12,     0x014},
-    {"FGTB",        0x3029, 12,     0x80C},
-    {"FGCL",        0x302A, 1,      0x1},
-    {"FTAL",        0x3030, 10,     0x0F6},
-    {"FTLL",        0x3031, 9,      0x11D},
-    {"FTLS",        0x3032, 9,      0x0D3},
-    {"FCW1",        0x3038, 8,      0x1E},
-    {"FCW2",        0x3039, 8,      0xD4},
-    {"FCW3",        0x303A, 8,      0xE6},
-    {"FCW4",        0x303B, 8,      0x4A},
-    {"FCW5",        0x303C, 8,      0xEF},
-    {"TPFP",        0x3040, 9,      0x037},
-    {"TPHT",        0x3041, 14,     0x00A0},
-
-    {"TPVT",        0x3042, 6,      0x00},
-    {"TPVBY",       0x3043, 1,      0x0},
-    {"TPCT",        0x3044, 5,      0x08},
-    {"TPCL",        0x3045, 5,      0x01},
-    {"TPCBY",       0x3046, 1,      0x1},
-    {"TPD",         0x3047, 4,      0xF},
-    {"TPCI0",       0x3048, 5,      0x00},
-    {"TPCI1",       0x3049, 5,      0x00},
-    {"TPCI2",       0x304A, 5,      0x00},
-    {"TPCI3",       0x304B, 5,      0x00},
-
-    {"ADCMSK",      0x3050, 21,     0x1FFFFF},
-    {"ADCINB",      0x3051, 2,      0x2},
-    {"ADCDAC",      0x3052, 5,      0x10},
-    {"ADCPAR",      0x3053, 18,     0x195EF},
-    {"ADCTST",      0x3054, 2,      0x0},
-    {"SADCAZ",      0x3055, 1,      0x1},
-
-    {"FGF0",        0x3080, 9,      0x000},
-    {"FGF1",        0x3081, 9,      0x000},
-    {"FGF2",        0x3082, 9,      0x000},
-    {"FGF3",        0x3083, 9,      0x000},
-    {"FGF4",        0x3084, 9,      0x000},
-    {"FGF5",        0x3085, 9,      0x000},
-    {"FGF6",        0x3086, 9,      0x000},
-    {"FGF7",        0x3087, 9,      0x000},
-    {"FGF8",        0x3088, 9,      0x000},
-    {"FGF9",        0x3089, 9,      0x000},
-    {"FGF10",       0x308A, 9,      0x000},
-    {"FGF11",       0x308B, 9,      0x000},
-    {"FGF12",       0x308C, 9,      0x000},
-    {"FGF13",       0x308D, 9,      0x000},
-    {"FGF14",       0x308E, 9,      0x000},
-    {"FGF15",       0x308F, 9,      0x000},
-    {"FGF16",       0x3090, 9,      0x000},
-    {"FGF17",       0x3091, 9,      0x000},
-    {"FGF18",       0x3092, 9,      0x000},
-    {"FGF19",       0x3093, 9,      0x000},
-    {"FGF20",       0x3094, 9,      0x000},
-
-    {"FGA0",        0x30A0, 6,      0x00},
-    {"FGA1",        0x30A1, 6,      0x00},
-    {"FGA2",        0x30A2, 6,      0x00},
-    {"FGA3",        0x30A3, 6,      0x00},
-    {"FGA4",        0x30A4, 6,      0x00},
-    {"FGA5",        0x30A5, 6,      0x00},
-    {"FGA6",        0x30A6, 6,      0x00},
-    {"FGA7",        0x30A7, 6,      0x00},
-    {"FGA8",        0x30A8, 6,      0x00},
-    {"FGA9",        0x30A9, 6,      0x00},
-    {"FGA10",       0x30AA, 6,      0x00},
-    {"FGA11",       0x30AB, 6,      0x00},
-    {"FGA12",       0x30AC, 6,      0x00},
-    {"FGA13",       0x30AD, 6,      0x00},
-    {"FGA14",       0x30AE, 6,      0x00},
-    {"FGA15",       0x30AF, 6,      0x00},
-    {"FGA16",       0x30B0, 6,      0x00},
-    {"FGA17",       0x30B1, 6,      0x00},
-    {"FGA18",       0x30B2, 6,      0x00},
-    {"FGA19",       0x30B3, 6,      0x00},
-    {"FGA20",       0x30B4, 6,      0x00},
-    // non-linearity table, 64 x 6 bits
-    {"FLL00",       0x3100, 6,      0x00},
-    {"FLL01",       0x3101, 6,      0x00},
-    {"FLL02",       0x3102, 6,      0x00},
-    {"FLL03",       0x3103, 6,      0x00},
-    {"FLL04",       0x3104, 6,      0x00},
-    {"FLL05",       0x3105, 6,      0x00},
-    {"FLL06",       0x3106, 6,      0x00},
-    {"FLL07",       0x3107, 6,      0x00},
-    {"FLL08",       0x3108, 6,      0x00},
-    {"FLL09",       0x3109, 6,      0x00},
-    {"FLL0A",       0x310A, 6,      0x00},
-    {"FLL0B",       0x310B, 6,      0x00},
-    {"FLL0C",       0x310C, 6,      0x00},
-    {"FLL0D",       0x310D, 6,      0x00},
-    {"FLL0E",       0x310E, 6,      0x00},
-    {"FLL0F",       0x310F, 6,      0x00},
-    {"FLL10",       0x3110, 6,      0x00},
-    {"FLL11",       0x3111, 6,      0x00},
-    {"FLL12",       0x3112, 6,      0x00},
-    {"FLL13",       0x3113, 6,      0x00},
-    {"FLL14",       0x3114, 6,      0x00},
-    {"FLL15",       0x3115, 6,      0x00},
-    {"FLL16",       0x3116, 6,      0x00},
-    {"FLL17",       0x3117, 6,      0x00},
-    {"FLL18",       0x3118, 6,      0x00},
-    {"FLL19",       0x3119, 6,      0x00},
-    {"FLL1A",       0x311A, 6,      0x00},
-    {"FLL1B",       0x311B, 6,      0x00},
-    {"FLL1C",       0x311C, 6,      0x00},
-    {"FLL1D",       0x311D, 6,      0x00},
-    {"FLL1E",       0x311E, 6,      0x00},
-    {"FLL1F",       0x311F, 6,      0x00},
-    {"FLL20",       0x3120, 6,      0x00},
-    {"FLL21",       0x3121, 6,      0x00},
-    {"FLL22",       0x3122, 6,      0x00},
-    {"FLL23",       0x3123, 6,      0x00},
-    {"FLL24",       0x3124, 6,      0x00},
-    {"FLL25",       0x3125, 6,      0x00},
-    {"FLL26",       0x3126, 6,      0x00},
-    {"FLL27",       0x3127, 6,      0x00},
-    {"FLL28",       0x3128, 6,      0x00},
-    {"FLL29",       0x3129, 6,      0x00},
-    {"FLL2A",       0x312A, 6,      0x00},
-    {"FLL2B",       0x312B, 6,      0x00},
-    {"FLL2C",       0x312C, 6,      0x00},
-    {"FLL2D",       0x312D, 6,      0x00},
-    {"FLL2E",       0x312E, 6,      0x00},
-    {"FLL2F",       0x312F, 6,      0x00},
-    {"FLL30",       0x3130, 6,      0x00},
-    {"FLL31",       0x3131, 6,      0x00},
-    {"FLL32",       0x3132, 6,      0x00},
-    {"FLL33",       0x3133, 6,      0x00},
-    {"FLL34",       0x3134, 6,      0x00},
-    {"FLL35",       0x3135, 6,      0x00},
-    {"FLL36",       0x3136, 6,      0x00},
-    {"FLL37",       0x3137, 6,      0x00},
-    {"FLL38",       0x3138, 6,      0x00},
-    {"FLL39",       0x3139, 6,      0x00},
-    {"FLL3A",       0x313A, 6,      0x00},
-    {"FLL3B",       0x313B, 6,      0x00},
-    {"FLL3C",       0x313C, 6,      0x00},
-    {"FLL3D",       0x313D, 6,      0x00},
-    {"FLL3E",       0x313E, 6,      0x00},
-    {"FLL3F",       0x313F, 6,      0x00},
-    // end of non-lin table
-    {"PASADEL",     0x3158, 8,      0xFF},
-    {"PASAPHA",     0x3159, 6,      0x3F},
-    {"PASAPRA",     0x315A, 6,      0x0F},
-    {"PASADAC",     0x315B, 8,      0x80},
-    {"PASACHM",     0x315C, 19,     0x7FFFF},
-    {"PASASTL",     0x315D, 8,      0xFF},
-    {"PASAPR1",     0x315E, 1,      0x0},
-    {"PASAPR0",     0x315F, 1,      0x0},
-    {"SADCTRG",     0x3161, 1,      0x0},
-    {"SADCRUN",     0x3162, 1,      0x0},
-    {"SADCPWR",     0x3163, 3,      0x7},
-    {"L0TSIM",      0x3165, 14,     0x0050},
-    {"SADCEC",      0x3166, 7,      0x00},
-    {"SADCMC",      0x3170, 8,      0xC0},
-    {"SADCOC",      0x3171, 8,      0x19},
-    {"SADCGTB",     0x3172, 32,     0x37737700},
-    {"SEBDEN",      0x3178, 3,      0x0},
-    {"SEBDOU",      0x3179, 3,      0x0},
-    // pos table, 128 x 5 bits
-    {"TPL00",       0x3180, 5,      0x00},
-    {"TPL01",       0x3181, 5,      0x00},
-    {"TPL02",       0x3182, 5,      0x00},
-    {"TPL03",       0x3183, 5,      0x00},
-    {"TPL04",       0x3184, 5,      0x00},
-    {"TPL05",       0x3185, 5,      0x00},
-    {"TPL06",       0x3186, 5,      0x00},
-    {"TPL07",       0x3187, 5,      0x00},
-    {"TPL08",       0x3188, 5,      0x00},
-    {"TPL09",       0x3189, 5,      0x00},
-    {"TPL0A",       0x318A, 5,      0x00},
-    {"TPL0B",       0x318B, 5,      0x00},
-    {"TPL0C",       0x318C, 5,      0x00},
-    {"TPL0D",       0x318D, 5,      0x00},
-    {"TPL0E",       0x318E, 5,      0x00},
-    {"TPL0F",       0x318F, 5,      0x00},
-    {"TPL10",       0x3190, 5,      0x00},
-    {"TPL11",       0x3191, 5,      0x00},
-    {"TPL12",       0x3192, 5,      0x00},
-    {"TPL13",       0x3193, 5,      0x00},
-    {"TPL14",       0x3194, 5,      0x00},
-    {"TPL15",       0x3195, 5,      0x00},
-    {"TPL16",       0x3196, 5,      0x00},
-    {"TPL17",       0x3197, 5,      0x00},
-    {"TPL18",       0x3198, 5,      0x00},
-    {"TPL19",       0x3199, 5,      0x00},
-    {"TPL1A",       0x319A, 5,      0x00},
-    {"TPL1B",       0x319B, 5,      0x00},
-    {"TPL1C",       0x319C, 5,      0x00},
-    {"TPL1D",       0x319D, 5,      0x00},
-    {"TPL1E",       0x319E, 5,      0x00},
-    {"TPL1F",       0x319F, 5,      0x00},
-    {"TPL20",       0x31A0, 5,      0x00},
-    {"TPL21",       0x31A1, 5,      0x00},
-    {"TPL22",       0x31A2, 5,      0x00},
-    {"TPL23",       0x31A3, 5,      0x00},
-    {"TPL24",       0x31A4, 5,      0x00},
-    {"TPL25",       0x31A5, 5,      0x00},
-    {"TPL26",       0x31A6, 5,      0x00},
-    {"TPL27",       0x31A7, 5,      0x00},
-    {"TPL28",       0x31A8, 5,      0x00},
-    {"TPL29",       0x31A9, 5,      0x00},
-    {"TPL2A",       0x31AA, 5,      0x00},
-    {"TPL2B",       0x31AB, 5,      0x00},
-    {"TPL2C",       0x31AC, 5,      0x00},
-    {"TPL2D",       0x31AD, 5,      0x00},
-    {"TPL2E",       0x31AE, 5,      0x00},
-    {"TPL2F",       0x31AF, 5,      0x00},
-    {"TPL30",       0x31B0, 5,      0x00},
-    {"TPL31",       0x31B1, 5,      0x00},
-    {"TPL32",       0x31B2, 5,      0x00},
-    {"TPL33",       0x31B3, 5,      0x00},
-    {"TPL34",       0x31B4, 5,      0x00},
-    {"TPL35",       0x31B5, 5,      0x00},
-    {"TPL36",       0x31B6, 5,      0x00},
-    {"TPL37",       0x31B7, 5,      0x00},
-    {"TPL38",       0x31B8, 5,      0x00},
-    {"TPL39",       0x31B9, 5,      0x00},
-    {"TPL3A",       0x31BA, 5,      0x00},
-    {"TPL3B",       0x31BB, 5,      0x00},
-    {"TPL3C",       0x31BC, 5,      0x00},
-    {"TPL3D",       0x31BD, 5,      0x00},
-    {"TPL3E",       0x31BE, 5,      0x00},
-    {"TPL3F",       0x31BF, 5,      0x00},
-    {"TPL40",       0x31C0, 5,      0x00},
-    {"TPL41",       0x31C1, 5,      0x00},
-    {"TPL42",       0x31C2, 5,      0x00},
-    {"TPL43",       0x31C3, 5,      0x00},
-    {"TPL44",       0x31C4, 5,      0x00},
-    {"TPL45",       0x31C5, 5,      0x00},
-    {"TPL46",       0x31C6, 5,      0x00},
-    {"TPL47",       0x31C7, 5,      0x00},
-    {"TPL48",       0x31C8, 5,      0x00},
-    {"TPL49",       0x31C9, 5,      0x00},
-    {"TPL4A",       0x31CA, 5,      0x00},
-    {"TPL4B",       0x31CB, 5,      0x00},
-    {"TPL4C",       0x31CC, 5,      0x00},
-    {"TPL4D",       0x31CD, 5,      0x00},
-    {"TPL4E",       0x31CE, 5,      0x00},
-    {"TPL4F",       0x31CF, 5,      0x00},
-    {"TPL50",       0x31D0, 5,      0x00},
-    {"TPL51",       0x31D1, 5,      0x00},
-    {"TPL52",       0x31D2, 5,      0x00},
-    {"TPL53",       0x31D3, 5,      0x00},
-    {"TPL54",       0x31D4, 5,      0x00},
-    {"TPL55",       0x31D5, 5,      0x00},
-    {"TPL56",       0x31D6, 5,      0x00},
-    {"TPL57",       0x31D7, 5,      0x00},
-    {"TPL58",       0x31D8, 5,      0x00},
-    {"TPL59",       0x31D9, 5,      0x00},
-    {"TPL5A",       0x31DA, 5,      0x00},
-    {"TPL5B",       0x31DB, 5,      0x00},
-    {"TPL5C",       0x31DC, 5,      0x00},
-    {"TPL5D",       0x31DD, 5,      0x00},
-    {"TPL5E",       0x31DE, 5,      0x00},
-    {"TPL5F",       0x31DF, 5,      0x00},
-    {"TPL60",       0x31E0, 5,      0x00},
-    {"TPL61",       0x31E1, 5,      0x00},
-    {"TPL62",       0x31E2, 5,      0x00},
-    {"TPL63",       0x31E3, 5,      0x00},
-    {"TPL64",       0x31E4, 5,      0x00},
-    {"TPL65",       0x31E5, 5,      0x00},
-    {"TPL66",       0x31E6, 5,      0x00},
-    {"TPL67",       0x31E7, 5,      0x00},
-    {"TPL68",       0x31E8, 5,      0x00},
-    {"TPL69",       0x31E9, 5,      0x00},
-    {"TPL6A",       0x31EA, 5,      0x00},
-    {"TPL6B",       0x31EB, 5,      0x00},
-    {"TPL6C",       0x31EC, 5,      0x00},
-    {"TPL6D",       0x31ED, 5,      0x00},
-    {"TPL6E",       0x31EE, 5,      0x00},
-    {"TPL6F",       0x31EF, 5,      0x00},
-    {"TPL70",       0x31F0, 5,      0x00},
-    {"TPL71",       0x31F1, 5,      0x00},
-    {"TPL72",       0x31F2, 5,      0x00},
-    {"TPL73",       0x31F3, 5,      0x00},
-    {"TPL74",       0x31F4, 5,      0x00},
-    {"TPL75",       0x31F5, 5,      0x00},
-    {"TPL76",       0x31F6, 5,      0x00},
-    {"TPL77",       0x31F7, 5,      0x00},
-    {"TPL78",       0x31F8, 5,      0x00},
-    {"TPL79",       0x31F9, 5,      0x00},
-    {"TPL7A",       0x31FA, 5,      0x00},
-    {"TPL7B",       0x31FB, 5,      0x00},
-    {"TPL7C",       0x31FC, 5,      0x00},
-    {"TPL7D",       0x31FD, 5,      0x00},
-    {"TPL7E",       0x31FE, 5,      0x00},
-    {"TPL7F",       0x31FF, 5,      0x00},
-    // end of pos table
-    {"MEMRW",       0xD000, 7,      0x79},
-    {"MEMCOR",      0xD001, 9,      0x000},
-    {"DMDELA",      0xD002, 4,      0x8},
-    {"DMDELS",      0xD003, 4,      0x8}
-  };
-
-  const CmdRegs cmdReg[N_CMD] = {
-    // Name      Address
-    {"SMCMD"   , 0x0A04},
-    {"SMOFFON" , 0x0A05},
-    {"SMON"    , 0x0A06},
-    {"SMOFF"   , 0x0A07},
-    {"CPU0SS"  , 0x0A21},
-    {"CPU1SS"  , 0x0A23},
-    {"CPU2SS"  , 0x0A25},
-    {"CPU3SS"  , 0x0A27},
-    {"NICLKSS" , 0x0A29},
-    {"FILCLKSS", 0x0A2B},
-    {"PRECLKSS", 0x0A2D},
-    {"ADCENSS" , 0x0A2F},
-    {"NIODESS" , 0x0A31},
-    {"NIOCESS" , 0x0A33},
-    {"NIIDESS" , 0x0A35},
-    {"NIICESS" , 0x0A37}
-  };
-
-  const CmdRegs roReg[N_RO] = {
-    // NI
-    {"NCTRL"  , 0x0DC0},
-    {"NFE"    , 0x0DC1},
-    {"NFSM"   , 0x0DC2},
-    // event buffer parity violation counters
-    {"EBP0"   , 0x3010},
-    {"EBP1"   , 0x3011},
-    {"EBP2"   , 0x3012},
-    {"EBP3"   , 0x3013},
-    // slow ADC
-    {"SADCC0" , 0x3168},
-    {"SADCC1" , 0x3169},
-    {"SADCC2" , 0x316A},
-    {"SADCC3" , 0x316B},
-    {"SADCC4" , 0x316C},
-    {"SADCC5" , 0x316D},
-    {"SADCC6" , 0x316E},
-    {"SADCC7" , 0x316F},
-    // hamming counters
-    {"HCNTI0" , 0xD010},
-    {"HCNTI1" , 0xD011},
-    {"HCNTI2" , 0xD012},
-    {"HCNTI3" , 0xD013},
-    {"HCNTD0" , 0xD014},
-    {"HCNTD1" , 0xD015},
-    {"HCNTD2" , 0xD016},
-    {"HCNTD3" , 0xD017},
-
-    {"CHIPID" , 0x3160},
-
-    {"SEBDIN" , 0x317A}
-  };
-
-
-  for (Int_t i = 0; i < N_REGS; i++) {
-     fTrapReg[i] = trapReg[i];
-  }
-  for (Int_t i = 0; i < N_CMD; i++) {
-     fCmdReg[i] = cmdReg[i];
-  }
-  for (Int_t i = 0; i < N_RO; i++) {
-     fRoReg[i] = roReg[i];
-  }
-
-  return kTRUE;
-}
+#/**************************************************************************\r
+* Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *\r
+*                                                                        *\r
+* Author: The ALICE Off-line Project.                                    *\r
+* Contributors are mentioned in the code where appropriate.              *\r
+*                                                                        *\r
+* Permission to use, copy, modify and distribute this software and its   *\r
+* documentation strictly for non-commercial purposes is hereby granted   *\r
+* without fee, provided that the above copyright notice appears in all   *\r
+* copies and that both the copyright notice and this permission notice   *\r
+* appear in the supporting documentation. The authors make no claims     *\r
+* about the suitability of this software for any purpose. It is          *\r
+* provided "as is" without express or implied warranty.                  *\r
+**************************************************************************/\r
+\r
+/* $Id: AliTRDrawTPStream.cxx 27797 2008-08-05 14:37:22Z cblume $ */\r
+\r
+///////////////////////////////////////////////////////////////////////////////////////\r
+//                                                                                   //\r
+// This class provides access to pattern generated TRD raw data including            //\r
+// configuration data.                                                               //\r
+//                                                                                   //\r
+// It is based on Venelin Angelov's c++ code decoding standalone                     // \r
+// configuration data                                                                //  \r
+// http://alice.physi.uni-heidelberg.de/svn/trd/wconfigurations/trunk/C/trap_cnf.cpp //\r
+// http://alice.physi.uni-heidelberg.de/svn/trd/wconfigurations/trunk/C/trap_cnf.h   //\r
+//                                                                                   //\r
+// Author: MinJung Kweon(minjung@physi.uni-heidelberg.de)                            // \r
+//                                                                                   //\r
+///////////////////////////////////////////////////////////////////////////////////////\r
+\r
+#include "AliLog.h"\r
+\r
+#include "AliTRDrawStream.h"\r
+#include "AliTRDrawTPStream.h"\r
+\r
+\r
+#define GET_VALUE_AT(w,m,s) (( (w) >> (s)) & (m) )\r
+#define MCM_HEADER_MASK_ERR(w) ( ((w) & (0xf)) == (0xc) ? 0 : 1) \r
+#define MCM_ROB_NUMBER(w) GET_VALUE_AT(w,0x7,28)\r
+#define MCM_MCM_NUMBER(w) GET_VALUE_AT(w,0x0f,24)\r
+#define MCM_EVENT_COUNTER(w) GET_VALUE_AT(w,0x00fffff,4)\r
+\r
+\r
+\r
+ClassImp(AliTRDrawTPStream)\r
+\r
+//---------------------------------------------------------------------\r
+AliTRDrawTPStream::AliTRDrawTPStream(Int_t rawVMajorOpt, UInt_t * pPos)\r
+  : AliTRDrawStreamBase()\r
+  , fTrapReg() \r
+  , fCmdReg() \r
+  , fRoReg() \r
+  , fCnfPro()\r
+  , fDmemValid()\r
+  , fRegs()\r
+  , fDmem()\r
+  , fDbank()\r
+  , fDbankPro()\r
+  , fpPos(pPos)\r
+  , fRawVMajorOpt(rawVMajorOpt) \r
+{\r
+  //\r
+  // default constructor\r
+  //\r
+\r
+  if (FillConfig() == kFALSE)\r
+    AliError("Reading reset value failed.");\r
+\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+AliTRDrawTPStream::AliTRDrawTPStream(const AliTRDrawTPStream& /*st*/)\r
+  : AliTRDrawStreamBase()\r
+  , fTrapReg() \r
+  , fCmdReg() \r
+  , fRoReg() \r
+  , fCnfPro()\r
+  , fDmemValid()\r
+  , fRegs()\r
+  , fDmem()\r
+  , fDbank()\r
+  , fDbankPro()\r
+  , fpPos()\r
+  , fRawVMajorOpt() \r
+{\r
+  //\r
+  // copy constructor\r
+  //\r
+\r
+  AliError("Not implemeneted.");\r
+\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+AliTRDrawTPStream &\r
+AliTRDrawTPStream::operator=(const AliTRDrawTPStream &)\r
+{\r
+  //\r
+  // we are not using this functionality\r
+  //\r
+  AliFatal("May not use.");\r
+  return *this;\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+AliTRDrawTPStream::~AliTRDrawTPStream()\r
+{\r
+  //\r
+  // destructor\r
+  //\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+Bool_t AliTRDrawTPStream::DecodeTPdata()\r
+{\r
+  //\r
+  // main function to decode test pattern data  \r
+  // fRawVMajorOpt version control different type of test pattern data\r
+  //\r
+\r
+  if (fRawVMajorOpt == 7)\r
+    {\r
+     AliInfo("This is configuration data event read by first trigger.");\r
+     if(!AliTRDrawStream::fgEnableDecodeConfigData) return kTRUE;\r
+     if (DecodeConfigdata() == kFALSE) // configuration data \r
+       {\r
+        AliError("failed to to decode configuration data");\r
+        return kFALSE;\r
+       }\r
+     else \r
+       return kTRUE;\r
+    }\r
+  else\r
+    AliError("These are different type of test pattern data. You need other reader");\r
+\r
+  return kFALSE;\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+Bool_t AliTRDrawTPStream::DecodeConfigdata()\r
+{\r
+  //\r
+  // main function to decode trap configuration data \r
+  //\r
+\r
+    UInt_t packedConf[256];\r
+    Int_t mcmPos, mcmsRead, lengthPacked;\r
+\r
+    mcmsRead = 0;\r
+    do\r
+    {\r
+        mcmPos = ReadPacked(fpPos, packedConf, &lengthPacked);\r
+        if (mcmPos >= 0)\r
+        {\r
+            PowerUp();\r
+            UnPackConfN(packedConf, lengthPacked);\r
+            DumpCnf(mcmPos);\r
+            mcmsRead++;\r
+            AliInfo(Form("%d MCMs read up to now, last was MCM%02d\n",mcmsRead, mcmPos));\r
+        }\r
+    } while ((mcmsRead < 84) && (mcmPos >= 0)); // [mj] have to think about # of mcmsRead\r
+    AliInfo("Done\n");\r
+\r
+    return kTRUE;\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+Int_t AliTRDrawTPStream::ReadPacked(UInt_t *word, UInt_t *pData, Int_t * const nWords)\r
+{\r
+  //\r
+  // decode packed data words\r
+  //\r
+\r
+    UInt_t vword = *word;\r
+\r
+    Int_t  iLength;\r
+    UInt_t err, robNum, mcmNum, chipId, noEndMarker;\r
+\r
+    iLength = 0;\r
+    err = 0;\r
+\r
+    // decode mcm header\r
+    if(MCM_HEADER_MASK_ERR(vword)) err++;\r
+\r
+    robNum = MCM_ROB_NUMBER(vword);\r
+    mcmNum = MCM_MCM_NUMBER(vword);\r
+    chipId = MCM_EVENT_COUNTER(vword);\r
+\r
+    if (err == 0) {\r
+      AliInfo(Form("MCM header ROB %d, MCM %02d, ChipId %d 0x%05x\n", robNum, mcmNum, chipId, chipId));\r
+    }\r
+    else \r
+      return -1;\r
+\r
+    // read MCM data and store into array\r
+    noEndMarker = 1;\r
+    do\r
+    {\r
+        word++;\r
+        vword = *word;\r
+\r
+        noEndMarker = ((vword != ENDM_CONF) && (vword != (ENDM_CONF | 1)) && (vword != 0x10001000));\r
+        *pData = vword;\r
+        pData++;\r
+        iLength++;\r
+    } while (noEndMarker && (iLength < 256));\r
+\r
+    word++;       \r
+    fpPos = word;\r
+\r
+    *nWords = iLength;\r
+    if (iLength == 0) \r
+      return -1;\r
+    else\r
+      return mcmNum;\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+void AliTRDrawTPStream::PowerUp() // power up\r
+{\r
+  //\r
+    // copy the reset values \r
+    for (Int_t i=0; i< NREGS; i++)\r
+    {\r
+        fRegs[i] = fTrapReg[i].fResVal;\r
+        fCnfPro[i] = 0;\r
+    }\r
+    // mark all DMEM cells as invalid\r
+    for (Int_t i=0; i< NDMEM; i++) fDmemValid[i] = 0;\r
+    // mark all DBANK cells as empty\r
+    for (Int_t i=0; i< NDBANK; i++) fDbankPro[i] = kDbankEmpty;\r
+}\r
+\r
+\r
+//---------------------------------------------------------------------\r
+Int_t AliTRDrawTPStream::UnPackConfN(const UInt_t *pData, Int_t maxLength)\r
+{\r
+  //\r
+\r
+    Int_t debug = 0; // the debug mode not completely ready\r
+    Int_t step, bwidth, nwords, idx, err, exitFlag, bitcnt, werr;\r
+    UInt_t caddr;\r
+    UInt_t dat, msk, header, dataHi;\r
+\r
+    idx = 0; // index in PackedConf\r
+    err = 0;\r
+    while (idx < maxLength)\r
+    {\r
+        header = *pData;\r
+        if (debug) printf("read 0x%08x  ",header);\r
+        pData++;\r
+        idx++;\r
+        if (header & 0x01) // single data\r
+          {\r
+            dat = (header >> 2) & 0xFFFF;       // 16 bit data\r
+            caddr = (header >> 18) & 0x3FFF;    // 14 bit address\r
+            if (caddr != 0x1FFF)                // temp!!! because the end marker was wrong\r
+            {\r
+             if (header & 0x02)                 // check if > 16 bits\r
+               {\r
+                dataHi = *pData;\r
+                if (debug) printf("read 0x%08x  ",dataHi);\r
+                pData++;\r
+                idx++;\r
+                err += ((dataHi ^ (dat | 1)) & 0xFFFF) != 0;\r
+                dat = (dataHi & 0xFFFF0000) | dat;\r
+               }\r
+               if (debug) printf("addr=0x%04x (%s) data=0x%08x\n",caddr, Addr2Name(caddr), dat);\r
+               werr = SetU(caddr, dat);\r
+               if (werr < 0)\r
+                 {\r
+                  printf("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header);\r
+                 }\r
+               if (idx > maxLength)\r
+                 {\r
+                  printf("(single-write): no more data, missing end marker\n");\r
+                  return -err;\r
+                 }\r
+            }\r
+            else\r
+            {\r
+             printf("(single-write): address 0x%04x => old endmarker?\n",caddr);\r
+                return err;\r
+            }\r
+          }\r
+        else               // block of data\r
+          {\r
+            step   =  (header >>  1) & 0x0003;\r
+            bwidth = ((header >>  3) & 0x001F) + 1;\r
+            nwords =  (header >>  8) & 0x00FF;\r
+            caddr  =  (header >> 16) & 0xFFFF;\r
+            exitFlag = (step == 0) || (step == 3) || (nwords == 0);\r
+            if (exitFlag) return err;\r
+            switch (bwidth)\r
+            {\r
+                case    15:\r
+                case    10:\r
+                case     7:\r
+                case     6:\r
+                case     5:\r
+                {\r
+                    msk = (1 << bwidth) - 1;\r
+                    bitcnt = 0;\r
+                    while (nwords > 0)\r
+                    {\r
+                        nwords--;\r
+                        bitcnt -= bwidth;\r
+                        if (bitcnt < 0)\r
+                        {\r
+                            header = *pData;\r
+                            if (debug) printf("read 0x%08x  ",header);\r
+                            pData++;\r
+                            idx++;\r
+                            err += (header & 1);\r
+                            header = header >> 1;\r
+                            bitcnt = 31 - bwidth;\r
+                        }\r
+                        if (debug) printf("addr=0x%04x (%s) data=0x%08x\n",caddr, Addr2Name(caddr), header & msk);\r
+                        werr = SetU(caddr, header & msk);\r
+                        if (werr < 0)\r
+                        {\r
+                          printf("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header);\r
+                        }\r
+                        caddr += step;\r
+                        header = header >> bwidth;\r
+                        if (idx >= maxLength)\r
+                        {\r
+                          printf("(block-write): no end marker! %d words read\n",idx);\r
+                          return -err;\r
+                        }\r
+                    }\r
+                    break;\r
+                } // end case 5-15\r
+                case 31:\r
+                {\r
+                    while (nwords > 0)\r
+                    {\r
+                        header = *pData;\r
+                        if (debug) printf("read 0x%08x  ",header);\r
+                        pData++;\r
+                        idx++;\r
+                        nwords--;\r
+                        err += (header & 1);\r
+                        if (debug) printf("addr=0x%04x (%s) data=0x%08x\n",caddr, Addr2Name(caddr), header >> 1);\r
+                        werr = SetU(caddr, header >> 1);\r
+                        if (werr < 0)\r
+                        {\r
+                            printf("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header);\r
+                        }\r
+                        caddr += step;\r
+                        if (idx >= maxLength)\r
+                        {\r
+                            printf("no end marker! %d words read\n",idx);\r
+                            return -err;\r
+                        }\r
+                    }\r
+                    break;\r
+                }\r
+                default: return err;\r
+            } // end switch\r
+        } // end block case\r
+    } // end while\r
+    printf("no end marker! %d words read\n",idx);\r
+    return -err; // only if the max length of the block reached!\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+void AliTRDrawTPStream::DumpCnf(Int_t slv)\r
+{\r
+  //\r
+    UInt_t idx;\r
+    for (idx = 0; idx < NREGS; idx++) // config. reg\r
+       {\r
+        if (slv >= 0)\r
+          printf("%s\t0x%08x\t%3d %c\n", fTrapReg[idx].fName, (Int_t) fRegs[idx], slv, CnfStat(fCnfPro[idx]));\r
+        else\r
+          printf("%s\t0x%08x %c\n", fTrapReg[idx].fName, (Int_t) fRegs[idx], CnfStat(fCnfPro[idx]));\r
+       }\r
+}\r
+\r
+\r
+//---------------------------------------------------------------------\r
+const Char_t * AliTRDrawTPStream::Addr2Name(UInt_t addr) const\r
+{\r
+  //\r
+    Int_t idx;\r
+    idx = 0;\r
+    if ( ( ( (addr >> 4) & 0xFFE) == 0x0C0) && ( ( (addr >> 2) & 1) == 1) )\r
+    {\r
+        addr = addr & 0x0C07;\r
+    }\r
+    while ((idx < NREGS) && (fTrapReg[idx].fAddr != addr) ) idx++;\r
+    if (idx < NREGS)\r
+        return fTrapReg[idx].fName;\r
+    idx = 0;\r
+    while ((idx < NCMD) && (fCmdReg[idx].fAddr != addr)) idx++;\r
+    if (idx < NCMD)\r
+        return fCmdReg[idx].fName;\r
+    idx = 0;\r
+    while ((idx < NRO) && (fRoReg[idx].fAddr != addr)) idx++;\r
+    if (idx < NRO)\r
+        return fRoReg[idx].fName;\r
+    else\r
+        return 0;\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+Char_t AliTRDrawTPStream::CnfStat(UInt_t prop) const\r
+{\r
+  //\r
+    if (prop == 0) return 'U';\r
+    else\r
+    if (prop == 1) return 'R';\r
+    else\r
+    if (prop == 2) return 'I';\r
+    else\r
+                   return prop;\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+Int_t AliTRDrawTPStream::SetU(UInt_t addr, UInt_t newVal)\r
+{\r
+  //\r
+    Int_t i;\r
+    UInt_t maxVal = 0;\r
+\r
+    if (AddrIsDmem(addr))\r
+    {\r
+        fDmem[addr & 0x3FF] = newVal;\r
+        fDmemValid[addr & 0x3FF] = 1;\r
+        return 0;\r
+    }\r
+    else\r
+    if (AddrIsDbank(addr))\r
+    {\r
+        fDbank[addr & 0xFF] = newVal;\r
+        fDbankPro[addr & 0xFF] = kScsnDat;\r
+        return 0;\r
+    }\r
+    else\r
+    {\r
+        i = Addr2Idx(addr);\r
+        if (i < NREGS) // found\r
+        {\r
+            fCnfPro[i] = 2;\r
+            if (fTrapReg[i].fNbits < 32) // create the max value from the number of bits\r
+            {\r
+                maxVal = 1;\r
+                maxVal = (maxVal << fTrapReg[i].fNbits) - 1;\r
+            }\r
+            if ( (fTrapReg[i].fNbits == 32) || (newVal <= maxVal) ) // in range\r
+            {\r
+                fRegs[i] = newVal;\r
+                return 0;\r
+            }\r
+            else\r
+            {   // out of range\r
+                fRegs[i] = newVal & maxVal;\r
+                printf("Out of range, writing 0x%08x to %d bits at addr = 0x%04x\n",newVal, fTrapReg[i].fNbits, addr);\r
+                return -2;\r
+            }\r
+        }\r
+        else    // not found\r
+            {\r
+                printf("(SetU): No such address, writing 0x%08x to addr = 0x%04x\n",newVal, addr);\r
+                return -1; // no such address\r
+            }\r
+    }\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+Int_t AliTRDrawTPStream::AddrIsDmem(UInt_t addr) const\r
+{\r
+    addr = (addr >> 10);\r
+    return (addr == 0x30);\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+Int_t AliTRDrawTPStream::AddrIsDbank(UInt_t addr) const\r
+{\r
+    addr = (addr >> 8);\r
+    return (addr == 0xF0);\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+UInt_t AliTRDrawTPStream::Addr2Idx(UInt_t addr) const\r
+{\r
+  //\r
+    Int_t idx;\r
+    idx = 0;\r
+    // check if global const\r
+    if ( ( ( (addr >> 4) & 0xFFE) == 0x0C0) && ( ( (addr >> 2) & 1) == 1) )\r
+    {\r
+        addr = addr & 0x0C07;\r
+    }\r
+    // searching\r
+    while ((idx < NREGS) && (fTrapReg[idx].fAddr != addr)) idx++;\r
+       // printf("Addr = 0x%04x; Idx = %d\n",addr, idx); // debugging\r
+    return idx;\r
+}\r
+\r
+//---------------------------------------------------------------------\r
+Bool_t AliTRDrawTPStream::FillConfig()\r
+{\r
+  // fill array with configuraiton information \r
+\r
+  const SimpleRegs kTrapReg[NREGS] = {\r
+    // Name         Address Nbits   Reset Value\r
+    // Global state machine\r
+    {"SML0",        0x0A00, 15,     0x4050},\r
+    {"SML1",        0x0A01, 15,     0x4200},\r
+    {"SML2",        0x0A02, 15,     0x4384},\r
+    {"SMMODE",      0x0A03, 16,     0xF0E2},\r
+    {"NITM0",       0x0A08, 14,     0x3FFF},\r
+    {"NITM1",       0x0A09, 14,     0x3FFF},\r
+    {"NITM2",       0x0A0A, 14,     0x3FFF},\r
+    {"NIP4D",       0x0A0B, 7,      0x7F},\r
+    {"CPU0CLK",     0x0A20, 5,      0x07},\r
+    {"CPU1CLK",     0x0A22, 5,      0x07},\r
+    {"CPU2CLK",     0x0A24, 5,      0x07},\r
+    {"CPU3CLK",     0x0A26, 5,      0x07},\r
+    {"NICLK",       0x0A28, 5,      0x07},\r
+    {"FILCLK",      0x0A2A, 5,      0x07},\r
+    {"PRECLK",      0x0A2C, 5,      0x07},\r
+    {"ADCEN",       0x0A2E, 5,      0x07},\r
+    {"NIODE",       0x0A30, 5,      0x07},\r
+    {"NIOCE",       0x0A32, 5,      0x21}, // bit 5 is status bit (read-only)!\r
+    {"NIIDE",       0x0A34, 5,      0x07},\r
+    {"NIICE",       0x0A36, 5,      0x07},\r
+    // Arbiter\r
+    {"ARBTIM",      0x0A3F, 4,      0x0},\r
+    // IVT of CPU0\r
+    {"IA0IRQ0",     0x0B00, 12,     0x000},\r
+    {"IA0IRQ1",     0x0B01, 12,     0x000},\r
+    {"IA0IRQ2",     0x0B02, 12,     0x000},\r
+    {"IA0IRQ3",     0x0B03, 12,     0x000},\r
+    {"IA0IRQ4",     0x0B04, 12,     0x000},\r
+    {"IA0IRQ5",     0x0B05, 12,     0x000},\r
+    {"IA0IRQ6",     0x0B06, 12,     0x000},\r
+    {"IA0IRQ7",     0x0B07, 12,     0x000},\r
+    {"IA0IRQ8",     0x0B08, 12,     0x000},\r
+    {"IA0IRQ9",     0x0B09, 12,     0x000},\r
+    {"IA0IRQA",     0x0B0A, 12,     0x000},\r
+    {"IA0IRQB",     0x0B0B, 12,     0x000},\r
+    {"IA0IRQC",     0x0B0C, 12,     0x000},\r
+    {"IRQSW0",      0x0B0D, 13,     0x1FFF},\r
+    {"IRQHW0",      0x0B0E, 13,     0x0000},\r
+    {"IRQHL0",      0x0B0F, 13,     0x0000},\r
+    // IVT of CPU1\r
+    {"IA1IRQ0",     0x0B20, 12,     0x000},\r
+    {"IA1IRQ1",     0x0B21, 12,     0x000},\r
+    {"IA1IRQ2",     0x0B22, 12,     0x000},\r
+    {"IA1IRQ3",     0x0B23, 12,     0x000},\r
+    {"IA1IRQ4",     0x0B24, 12,     0x000},\r
+    {"IA1IRQ5",     0x0B25, 12,     0x000},\r
+    {"IA1IRQ6",     0x0B26, 12,     0x000},\r
+    {"IA1IRQ7",     0x0B27, 12,     0x000},\r
+    {"IA1IRQ8",     0x0B28, 12,     0x000},\r
+    {"IA1IRQ9",     0x0B29, 12,     0x000},\r
+    {"IA1IRQA",     0x0B2A, 12,     0x000},\r
+    {"IA1IRQB",     0x0B2B, 12,     0x000},\r
+    {"IA1IRQC",     0x0B2C, 12,     0x000},\r
+    {"IRQSW1",      0x0B2D, 13,     0x1FFF},\r
+    {"IRQHW1",      0x0B2E, 13,     0x0000},\r
+    {"IRQHL1",      0x0B2F, 13,     0x0000},\r
+    // IVT of CPU2\r
+    {"IA2IRQ0",     0x0B40, 12,     0x000},\r
+    {"IA2IRQ1",     0x0B41, 12,     0x000},\r
+    {"IA2IRQ2",     0x0B42, 12,     0x000},\r
+    {"IA2IRQ3",     0x0B43, 12,     0x000},\r
+    {"IA2IRQ4",     0x0B44, 12,     0x000},\r
+    {"IA2IRQ5",     0x0B45, 12,     0x000},\r
+    {"IA2IRQ6",     0x0B46, 12,     0x000},\r
+    {"IA2IRQ7",     0x0B47, 12,     0x000},\r
+    {"IA2IRQ8",     0x0B48, 12,     0x000},\r
+    {"IA2IRQ9",     0x0B49, 12,     0x000},\r
+    {"IA2IRQA",     0x0B4A, 12,     0x000},\r
+    {"IA2IRQB",     0x0B4B, 12,     0x000},\r
+    {"IA2IRQC",     0x0B4C, 12,     0x000},\r
+    {"IRQSW2",      0x0B4D, 13,     0x1FFF},\r
+    {"IRQHW2",      0x0B4E, 13,     0x0000},\r
+    {"IRQHL2",      0x0B4F, 13,     0x0000},\r
+    // IVT of CPU3\r
+    {"IA3IRQ0",     0x0B60, 12,     0x000},\r
+    {"IA3IRQ1",     0x0B61, 12,     0x000},\r
+    {"IA3IRQ2",     0x0B62, 12,     0x000},\r
+    {"IA3IRQ3",     0x0B63, 12,     0x000},\r
+    {"IA3IRQ4",     0x0B64, 12,     0x000},\r
+    {"IA3IRQ5",     0x0B65, 12,     0x000},\r
+    {"IA3IRQ6",     0x0B66, 12,     0x000},\r
+    {"IA3IRQ7",     0x0B67, 12,     0x000},\r
+    {"IA3IRQ8",     0x0B68, 12,     0x000},\r
+    {"IA3IRQ9",     0x0B69, 12,     0x000},\r
+    {"IA3IRQA",     0x0B6A, 12,     0x000},\r
+    {"IA3IRQB",     0x0B6B, 12,     0x000},\r
+    {"IA3IRQC",     0x0B6C, 12,     0x000},\r
+    {"IRQSW3",      0x0B6D, 13,     0x1FFF},\r
+    {"IRQHW3",      0x0B6E, 13,     0x0000},\r
+    {"IRQHL3",      0x0B6F, 13,     0x0000},\r
+    // Global Counter/Timer\r
+    {"CTGDINI",     0x0B80, 32,     0x00000000},\r
+    {"CTGCTRL",     0x0B81, 12,     0xE3F},\r
+    // CPU constants\r
+    {"C08CPU0",     0x0C00, 32,     0x00000000},\r
+    {"C09CPU0",     0x0C01, 32,     0x00000000},\r
+    {"C10CPU0",     0x0C02, 32,     0x00000000},\r
+    {"C11CPU0",     0x0C03, 32,     0x00000000},\r
+    {"C12CPUA",     0x0C04, 32,     0x00000000},\r
+    {"C13CPUA",     0x0C05, 32,     0x00000000},\r
+    {"C14CPUA",     0x0C06, 32,     0x00000000},\r
+    {"C15CPUA",     0x0C07, 32,     0x00000000},\r
+    {"C08CPU1",     0x0C08, 32,     0x00000000},\r
+    {"C09CPU1",     0x0C09, 32,     0x00000000},\r
+    {"C10CPU1",     0x0C0A, 32,     0x00000000},\r
+    {"C11CPU1",     0x0C0B, 32,     0x00000000},\r
+    {"C08CPU2",     0x0C10, 32,     0x00000000},\r
+    {"C09CPU2",     0x0C11, 32,     0x00000000},\r
+    {"C10CPU2",     0x0C12, 32,     0x00000000},\r
+    {"C11CPU2",     0x0C13, 32,     0x00000000},\r
+    {"C08CPU3",     0x0C18, 32,     0x00000000},\r
+    {"C09CPU3",     0x0C19, 32,     0x00000000},\r
+    {"C10CPU3",     0x0C1A, 32,     0x00000000},\r
+    {"C11CPU3",     0x0C1B, 32,     0x00000000},\r
+    // NI interface\r
+    {"NMOD",        0x0D40, 6,      0x08},\r
+    {"NDLY",        0x0D41, 30,     0x24924924},\r
+    {"NED",         0x0D42, 16,     0xA240},\r
+    {"NTRO",        0x0D43, 18,     0x3FFFC},\r
+    {"NRRO",        0x0D44, 18,     0x3FFFC},\r
+\r
+    {"NES",         0x0D45, 32,     0x00000000},\r
+    {"NTP",         0x0D46, 32,     0x0000FFFF},\r
+    {"NBND",        0x0D47, 16,     0x6020},\r
+    {"NP0",         0x0D48, 11,     0x44C},\r
+    {"NP1",         0x0D49, 11,     0x44C},\r
+    {"NP2",         0x0D4A, 11,     0x44C},\r
+    {"NP3",         0x0D4B, 11,     0x44C},\r
+    {"NCUT",        0x0D4C, 32,     0xFFFFFFFF},\r
+    // Filter and Preprocessor\r
+    {"TPPT0",       0x3000, 7,      0x01},\r
+    {"TPFS",        0x3001, 7,      0x05},\r
+    {"TPFE",        0x3002, 7,      0x14},\r
+    {"TPPGR",       0x3003, 7,      0x15},\r
+    {"TPPAE",       0x3004, 7,      0x1E},\r
+    {"TPQS0",       0x3005, 7,      0x00},\r
+    {"TPQE0",       0x3006, 7,      0x0A},\r
+    {"TPQS1",       0x3007, 7,      0x0B},\r
+    {"TPQE1",       0x3008, 7,      0x14},\r
+    {"EBD",         0x3009, 3,      0x0},\r
+    {"EBAQA",       0x300A, 7,      0x00},\r
+    {"EBSIA",       0x300B, 7,      0x20},\r
+    {"EBSF",        0x300C, 1,      0x1},\r
+    {"EBSIM",       0x300D, 1,      0x1},\r
+    {"EBPP",        0x300E, 1,      0x1},\r
+    {"EBPC",        0x300F, 1,      0x1},\r
+\r
+    {"EBIS",        0x3014, 10,     0x005},\r
+    {"EBIT",        0x3015, 12,     0x028},\r
+    {"EBIL",        0x3016, 8,      0xF0},\r
+    {"EBIN",        0x3017, 1,      0x1},\r
+    {"FLBY",        0x3018, 1,      0x0},\r
+    {"FPBY",        0x3019, 1,      0x0},\r
+    {"FGBY",        0x301A, 1,      0x0},\r
+    {"FTBY",        0x301B, 1,      0x0},\r
+    {"FCBY",        0x301C, 1,      0x0},\r
+    {"FPTC",        0x3020, 2,      0x3},\r
+    {"FPNP",        0x3021, 9,      0x078},\r
+    {"FPCL",        0x3022, 1,      0x1},\r
+    {"FGTA",        0x3028, 12,     0x014},\r
+    {"FGTB",        0x3029, 12,     0x80C},\r
+    {"FGCL",        0x302A, 1,      0x1},\r
+    {"FTAL",        0x3030, 10,     0x0F6},\r
+    {"FTLL",        0x3031, 9,      0x11D},\r
+    {"FTLS",        0x3032, 9,      0x0D3},\r
+    {"FCW1",        0x3038, 8,      0x1E},\r
+    {"FCW2",        0x3039, 8,      0xD4},\r
+    {"FCW3",        0x303A, 8,      0xE6},\r
+    {"FCW4",        0x303B, 8,      0x4A},\r
+    {"FCW5",        0x303C, 8,      0xEF},\r
+    {"TPFP",        0x3040, 9,      0x037},\r
+    {"TPHT",        0x3041, 14,     0x00A0},\r
+\r
+    {"TPVT",        0x3042, 6,      0x00},\r
+    {"TPVBY",       0x3043, 1,      0x0},\r
+    {"TPCT",        0x3044, 5,      0x08},\r
+    {"TPCL",        0x3045, 5,      0x01},\r
+    {"TPCBY",       0x3046, 1,      0x1},\r
+    {"TPD",         0x3047, 4,      0xF},\r
+    {"TPCI0",       0x3048, 5,      0x00},\r
+    {"TPCI1",       0x3049, 5,      0x00},\r
+    {"TPCI2",       0x304A, 5,      0x00},\r
+    {"TPCI3",       0x304B, 5,      0x00},\r
+\r
+    {"ADCMSK",      0x3050, 21,     0x1FFFFF},\r
+    {"ADCINB",      0x3051, 2,      0x2},\r
+    {"ADCDAC",      0x3052, 5,      0x10},\r
+    {"ADCPAR",      0x3053, 18,     0x195EF},\r
+    {"ADCTST",      0x3054, 2,      0x0},\r
+    {"SADCAZ",      0x3055, 1,      0x1},\r
+\r
+    {"FGF0",        0x3080, 9,      0x000},\r
+    {"FGF1",        0x3081, 9,      0x000},\r
+    {"FGF2",        0x3082, 9,      0x000},\r
+    {"FGF3",        0x3083, 9,      0x000},\r
+    {"FGF4",        0x3084, 9,      0x000},\r
+    {"FGF5",        0x3085, 9,      0x000},\r
+    {"FGF6",        0x3086, 9,      0x000},\r
+    {"FGF7",        0x3087, 9,      0x000},\r
+    {"FGF8",        0x3088, 9,      0x000},\r
+    {"FGF9",        0x3089, 9,      0x000},\r
+    {"FGF10",       0x308A, 9,      0x000},\r
+    {"FGF11",       0x308B, 9,      0x000},\r
+    {"FGF12",       0x308C, 9,      0x000},\r
+    {"FGF13",       0x308D, 9,      0x000},\r
+    {"FGF14",       0x308E, 9,      0x000},\r
+    {"FGF15",       0x308F, 9,      0x000},\r
+    {"FGF16",       0x3090, 9,      0x000},\r
+    {"FGF17",       0x3091, 9,      0x000},\r
+    {"FGF18",       0x3092, 9,      0x000},\r
+    {"FGF19",       0x3093, 9,      0x000},\r
+    {"FGF20",       0x3094, 9,      0x000},\r
+\r
+    {"FGA0",        0x30A0, 6,      0x00},\r
+    {"FGA1",        0x30A1, 6,      0x00},\r
+    {"FGA2",        0x30A2, 6,      0x00},\r
+    {"FGA3",        0x30A3, 6,      0x00},\r
+    {"FGA4",        0x30A4, 6,      0x00},\r
+    {"FGA5",        0x30A5, 6,      0x00},\r
+    {"FGA6",        0x30A6, 6,      0x00},\r
+    {"FGA7",        0x30A7, 6,      0x00},\r
+    {"FGA8",        0x30A8, 6,      0x00},\r
+    {"FGA9",        0x30A9, 6,      0x00},\r
+    {"FGA10",       0x30AA, 6,      0x00},\r
+    {"FGA11",       0x30AB, 6,      0x00},\r
+    {"FGA12",       0x30AC, 6,      0x00},\r
+    {"FGA13",       0x30AD, 6,      0x00},\r
+    {"FGA14",       0x30AE, 6,      0x00},\r
+    {"FGA15",       0x30AF, 6,      0x00},\r
+    {"FGA16",       0x30B0, 6,      0x00},\r
+    {"FGA17",       0x30B1, 6,      0x00},\r
+    {"FGA18",       0x30B2, 6,      0x00},\r
+    {"FGA19",       0x30B3, 6,      0x00},\r
+    {"FGA20",       0x30B4, 6,      0x00},\r
+    // non-linearity table, 64 x 6 bits\r
+    {"FLL00",       0x3100, 6,      0x00},\r
+    {"FLL01",       0x3101, 6,      0x00},\r
+    {"FLL02",       0x3102, 6,      0x00},\r
+    {"FLL03",       0x3103, 6,      0x00},\r
+    {"FLL04",       0x3104, 6,      0x00},\r
+    {"FLL05",       0x3105, 6,      0x00},\r
+    {"FLL06",       0x3106, 6,      0x00},\r
+    {"FLL07",       0x3107, 6,      0x00},\r
+    {"FLL08",       0x3108, 6,      0x00},\r
+    {"FLL09",       0x3109, 6,      0x00},\r
+    {"FLL0A",       0x310A, 6,      0x00},\r
+    {"FLL0B",       0x310B, 6,      0x00},\r
+    {"FLL0C",       0x310C, 6,      0x00},\r
+    {"FLL0D",       0x310D, 6,      0x00},\r
+    {"FLL0E",       0x310E, 6,      0x00},\r
+    {"FLL0F",       0x310F, 6,      0x00},\r
+    {"FLL10",       0x3110, 6,      0x00},\r
+    {"FLL11",       0x3111, 6,      0x00},\r
+    {"FLL12",       0x3112, 6,      0x00},\r
+    {"FLL13",       0x3113, 6,      0x00},\r
+    {"FLL14",       0x3114, 6,      0x00},\r
+    {"FLL15",       0x3115, 6,      0x00},\r
+    {"FLL16",       0x3116, 6,      0x00},\r
+    {"FLL17",       0x3117, 6,      0x00},\r
+    {"FLL18",       0x3118, 6,      0x00},\r
+    {"FLL19",       0x3119, 6,      0x00},\r
+    {"FLL1A",       0x311A, 6,      0x00},\r
+    {"FLL1B",       0x311B, 6,      0x00},\r
+    {"FLL1C",       0x311C, 6,      0x00},\r
+    {"FLL1D",       0x311D, 6,      0x00},\r
+    {"FLL1E",       0x311E, 6,      0x00},\r
+    {"FLL1F",       0x311F, 6,      0x00},\r
+    {"FLL20",       0x3120, 6,      0x00},\r
+    {"FLL21",       0x3121, 6,      0x00},\r
+    {"FLL22",       0x3122, 6,      0x00},\r
+    {"FLL23",       0x3123, 6,      0x00},\r
+    {"FLL24",       0x3124, 6,      0x00},\r
+    {"FLL25",       0x3125, 6,      0x00},\r
+    {"FLL26",       0x3126, 6,      0x00},\r
+    {"FLL27",       0x3127, 6,      0x00},\r
+    {"FLL28",       0x3128, 6,      0x00},\r
+    {"FLL29",       0x3129, 6,      0x00},\r
+    {"FLL2A",       0x312A, 6,      0x00},\r
+    {"FLL2B",       0x312B, 6,      0x00},\r
+    {"FLL2C",       0x312C, 6,      0x00},\r
+    {"FLL2D",       0x312D, 6,      0x00},\r
+    {"FLL2E",       0x312E, 6,      0x00},\r
+    {"FLL2F",       0x312F, 6,      0x00},\r
+    {"FLL30",       0x3130, 6,      0x00},\r
+    {"FLL31",       0x3131, 6,      0x00},\r
+    {"FLL32",       0x3132, 6,      0x00},\r
+    {"FLL33",       0x3133, 6,      0x00},\r
+    {"FLL34",       0x3134, 6,      0x00},\r
+    {"FLL35",       0x3135, 6,      0x00},\r
+    {"FLL36",       0x3136, 6,      0x00},\r
+    {"FLL37",       0x3137, 6,      0x00},\r
+    {"FLL38",       0x3138, 6,      0x00},\r
+    {"FLL39",       0x3139, 6,      0x00},\r
+    {"FLL3A",       0x313A, 6,      0x00},\r
+    {"FLL3B",       0x313B, 6,      0x00},\r
+    {"FLL3C",       0x313C, 6,      0x00},\r
+    {"FLL3D",       0x313D, 6,      0x00},\r
+    {"FLL3E",       0x313E, 6,      0x00},\r
+    {"FLL3F",       0x313F, 6,      0x00},\r
+    // end of non-lin table\r
+    {"PASADEL",     0x3158, 8,      0xFF},\r
+    {"PASAPHA",     0x3159, 6,      0x3F},\r
+    {"PASAPRA",     0x315A, 6,      0x0F},\r
+    {"PASADAC",     0x315B, 8,      0x80},\r
+    {"PASACHM",     0x315C, 19,     0x7FFFF},\r
+    {"PASASTL",     0x315D, 8,      0xFF},\r
+    {"PASAPR1",     0x315E, 1,      0x0},\r
+    {"PASAPR0",     0x315F, 1,      0x0},\r
+    {"SADCTRG",     0x3161, 1,      0x0},\r
+    {"SADCRUN",     0x3162, 1,      0x0},\r
+    {"SADCPWR",     0x3163, 3,      0x7},\r
+    {"L0TSIM",      0x3165, 14,     0x0050},\r
+    {"SADCEC",      0x3166, 7,      0x00},\r
+    {"SADCMC",      0x3170, 8,      0xC0},\r
+    {"SADCOC",      0x3171, 8,      0x19},\r
+    {"SADCGTB",     0x3172, 32,     0x37737700},\r
+    {"SEBDEN",      0x3178, 3,      0x0},\r
+    {"SEBDOU",      0x3179, 3,      0x0},\r
+    // pos table, 128 x 5 bits\r
+    {"TPL00",       0x3180, 5,      0x00},\r
+    {"TPL01",       0x3181, 5,      0x00},\r
+    {"TPL02",       0x3182, 5,      0x00},\r
+    {"TPL03",       0x3183, 5,      0x00},\r
+    {"TPL04",       0x3184, 5,      0x00},\r
+    {"TPL05",       0x3185, 5,      0x00},\r
+    {"TPL06",       0x3186, 5,      0x00},\r
+    {"TPL07",       0x3187, 5,      0x00},\r
+    {"TPL08",       0x3188, 5,      0x00},\r
+    {"TPL09",       0x3189, 5,      0x00},\r
+    {"TPL0A",       0x318A, 5,      0x00},\r
+    {"TPL0B",       0x318B, 5,      0x00},\r
+    {"TPL0C",       0x318C, 5,      0x00},\r
+    {"TPL0D",       0x318D, 5,      0x00},\r
+    {"TPL0E",       0x318E, 5,      0x00},\r
+    {"TPL0F",       0x318F, 5,      0x00},\r
+    {"TPL10",       0x3190, 5,      0x00},\r
+    {"TPL11",       0x3191, 5,      0x00},\r
+    {"TPL12",       0x3192, 5,      0x00},\r
+    {"TPL13",       0x3193, 5,      0x00},\r
+    {"TPL14",       0x3194, 5,      0x00},\r
+    {"TPL15",       0x3195, 5,      0x00},\r
+    {"TPL16",       0x3196, 5,      0x00},\r
+    {"TPL17",       0x3197, 5,      0x00},\r
+    {"TPL18",       0x3198, 5,      0x00},\r
+    {"TPL19",       0x3199, 5,      0x00},\r
+    {"TPL1A",       0x319A, 5,      0x00},\r
+    {"TPL1B",       0x319B, 5,      0x00},\r
+    {"TPL1C",       0x319C, 5,      0x00},\r
+    {"TPL1D",       0x319D, 5,      0x00},\r
+    {"TPL1E",       0x319E, 5,      0x00},\r
+    {"TPL1F",       0x319F, 5,      0x00},\r
+    {"TPL20",       0x31A0, 5,      0x00},\r
+    {"TPL21",       0x31A1, 5,      0x00},\r
+    {"TPL22",       0x31A2, 5,      0x00},\r
+    {"TPL23",       0x31A3, 5,      0x00},\r
+    {"TPL24",       0x31A4, 5,      0x00},\r
+    {"TPL25",       0x31A5, 5,      0x00},\r
+    {"TPL26",       0x31A6, 5,      0x00},\r
+    {"TPL27",       0x31A7, 5,      0x00},\r
+    {"TPL28",       0x31A8, 5,      0x00},\r
+    {"TPL29",       0x31A9, 5,      0x00},\r
+    {"TPL2A",       0x31AA, 5,      0x00},\r
+    {"TPL2B",       0x31AB, 5,      0x00},\r
+    {"TPL2C",       0x31AC, 5,      0x00},\r
+    {"TPL2D",       0x31AD, 5,      0x00},\r
+    {"TPL2E",       0x31AE, 5,      0x00},\r
+    {"TPL2F",       0x31AF, 5,      0x00},\r
+    {"TPL30",       0x31B0, 5,      0x00},\r
+    {"TPL31",       0x31B1, 5,      0x00},\r
+    {"TPL32",       0x31B2, 5,      0x00},\r
+    {"TPL33",       0x31B3, 5,      0x00},\r
+    {"TPL34",       0x31B4, 5,      0x00},\r
+    {"TPL35",       0x31B5, 5,      0x00},\r
+    {"TPL36",       0x31B6, 5,      0x00},\r
+    {"TPL37",       0x31B7, 5,      0x00},\r
+    {"TPL38",       0x31B8, 5,      0x00},\r
+    {"TPL39",       0x31B9, 5,      0x00},\r
+    {"TPL3A",       0x31BA, 5,      0x00},\r
+    {"TPL3B",       0x31BB, 5,      0x00},\r
+    {"TPL3C",       0x31BC, 5,      0x00},\r
+    {"TPL3D",       0x31BD, 5,      0x00},\r
+    {"TPL3E",       0x31BE, 5,      0x00},\r
+    {"TPL3F",       0x31BF, 5,      0x00},\r
+    {"TPL40",       0x31C0, 5,      0x00},\r
+    {"TPL41",       0x31C1, 5,      0x00},\r
+    {"TPL42",       0x31C2, 5,      0x00},\r
+    {"TPL43",       0x31C3, 5,      0x00},\r
+    {"TPL44",       0x31C4, 5,      0x00},\r
+    {"TPL45",       0x31C5, 5,      0x00},\r
+    {"TPL46",       0x31C6, 5,      0x00},\r
+    {"TPL47",       0x31C7, 5,      0x00},\r
+    {"TPL48",       0x31C8, 5,      0x00},\r
+    {"TPL49",       0x31C9, 5,      0x00},\r
+    {"TPL4A",       0x31CA, 5,      0x00},\r
+    {"TPL4B",       0x31CB, 5,      0x00},\r
+    {"TPL4C",       0x31CC, 5,      0x00},\r
+    {"TPL4D",       0x31CD, 5,      0x00},\r
+    {"TPL4E",       0x31CE, 5,      0x00},\r
+    {"TPL4F",       0x31CF, 5,      0x00},\r
+    {"TPL50",       0x31D0, 5,      0x00},\r
+    {"TPL51",       0x31D1, 5,      0x00},\r
+    {"TPL52",       0x31D2, 5,      0x00},\r
+    {"TPL53",       0x31D3, 5,      0x00},\r
+    {"TPL54",       0x31D4, 5,      0x00},\r
+    {"TPL55",       0x31D5, 5,      0x00},\r
+    {"TPL56",       0x31D6, 5,      0x00},\r
+    {"TPL57",       0x31D7, 5,      0x00},\r
+    {"TPL58",       0x31D8, 5,      0x00},\r
+    {"TPL59",       0x31D9, 5,      0x00},\r
+    {"TPL5A",       0x31DA, 5,      0x00},\r
+    {"TPL5B",       0x31DB, 5,      0x00},\r
+    {"TPL5C",       0x31DC, 5,      0x00},\r
+    {"TPL5D",       0x31DD, 5,      0x00},\r
+    {"TPL5E",       0x31DE, 5,      0x00},\r
+    {"TPL5F",       0x31DF, 5,      0x00},\r
+    {"TPL60",       0x31E0, 5,      0x00},\r
+    {"TPL61",       0x31E1, 5,      0x00},\r
+    {"TPL62",       0x31E2, 5,      0x00},\r
+    {"TPL63",       0x31E3, 5,      0x00},\r
+    {"TPL64",       0x31E4, 5,      0x00},\r
+    {"TPL65",       0x31E5, 5,      0x00},\r
+    {"TPL66",       0x31E6, 5,      0x00},\r
+    {"TPL67",       0x31E7, 5,      0x00},\r
+    {"TPL68",       0x31E8, 5,      0x00},\r
+    {"TPL69",       0x31E9, 5,      0x00},\r
+    {"TPL6A",       0x31EA, 5,      0x00},\r
+    {"TPL6B",       0x31EB, 5,      0x00},\r
+    {"TPL6C",       0x31EC, 5,      0x00},\r
+    {"TPL6D",       0x31ED, 5,      0x00},\r
+    {"TPL6E",       0x31EE, 5,      0x00},\r
+    {"TPL6F",       0x31EF, 5,      0x00},\r
+    {"TPL70",       0x31F0, 5,      0x00},\r
+    {"TPL71",       0x31F1, 5,      0x00},\r
+    {"TPL72",       0x31F2, 5,      0x00},\r
+    {"TPL73",       0x31F3, 5,      0x00},\r
+    {"TPL74",       0x31F4, 5,      0x00},\r
+    {"TPL75",       0x31F5, 5,      0x00},\r
+    {"TPL76",       0x31F6, 5,      0x00},\r
+    {"TPL77",       0x31F7, 5,      0x00},\r
+    {"TPL78",       0x31F8, 5,      0x00},\r
+    {"TPL79",       0x31F9, 5,      0x00},\r
+    {"TPL7A",       0x31FA, 5,      0x00},\r
+    {"TPL7B",       0x31FB, 5,      0x00},\r
+    {"TPL7C",       0x31FC, 5,      0x00},\r
+    {"TPL7D",       0x31FD, 5,      0x00},\r
+    {"TPL7E",       0x31FE, 5,      0x00},\r
+    {"TPL7F",       0x31FF, 5,      0x00},\r
+    // end of pos table\r
+    {"MEMRW",       0xD000, 7,      0x79},\r
+    {"MEMCOR",      0xD001, 9,      0x000},\r
+    {"DMDELA",      0xD002, 4,      0x8},\r
+    {"DMDELS",      0xD003, 4,      0x8}\r
+  };\r
+\r
+  const CmdRegs kCmdReg[NCMD] = {\r
+    // Name      Address\r
+    {"SMCMD"   , 0x0A04},\r
+    {"SMOFFON" , 0x0A05},\r
+    {"SMON"    , 0x0A06},\r
+    {"SMOFF"   , 0x0A07},\r
+    {"CPU0SS"  , 0x0A21},\r
+    {"CPU1SS"  , 0x0A23},\r
+    {"CPU2SS"  , 0x0A25},\r
+    {"CPU3SS"  , 0x0A27},\r
+    {"NICLKSS" , 0x0A29},\r
+    {"FILCLKSS", 0x0A2B},\r
+    {"PRECLKSS", 0x0A2D},\r
+    {"ADCENSS" , 0x0A2F},\r
+    {"NIODESS" , 0x0A31},\r
+    {"NIOCESS" , 0x0A33},\r
+    {"NIIDESS" , 0x0A35},\r
+    {"NIICESS" , 0x0A37}\r
+  };\r
+\r
+  const CmdRegs kRoReg[NRO] = {\r
+    // NI\r
+    {"NCTRL"  , 0x0DC0},\r
+    {"NFE"    , 0x0DC1},\r
+    {"NFSM"   , 0x0DC2},\r
+    // event buffer parity violation counters\r
+    {"EBP0"   , 0x3010},\r
+    {"EBP1"   , 0x3011},\r
+    {"EBP2"   , 0x3012},\r
+    {"EBP3"   , 0x3013},\r
+    // slow ADC\r
+    {"SADCC0" , 0x3168},\r
+    {"SADCC1" , 0x3169},\r
+    {"SADCC2" , 0x316A},\r
+    {"SADCC3" , 0x316B},\r
+    {"SADCC4" , 0x316C},\r
+    {"SADCC5" , 0x316D},\r
+    {"SADCC6" , 0x316E},\r
+    {"SADCC7" , 0x316F},\r
+    // hamming counters\r
+    {"HCNTI0" , 0xD010},\r
+    {"HCNTI1" , 0xD011},\r
+    {"HCNTI2" , 0xD012},\r
+    {"HCNTI3" , 0xD013},\r
+    {"HCNTD0" , 0xD014},\r
+    {"HCNTD1" , 0xD015},\r
+    {"HCNTD2" , 0xD016},\r
+    {"HCNTD3" , 0xD017},\r
+\r
+    {"CHIPID" , 0x3160},\r
+\r
+    {"SEBDIN" , 0x317A}\r
+  };\r
+\r
+\r
+  for (Int_t i = 0; i < NREGS; i++) {\r
+     fTrapReg[i] = kTrapReg[i];\r
+  }\r
+  for (Int_t i = 0; i < NCMD; i++) {\r
+     fCmdReg[i] = kCmdReg[i];\r
+  }\r
+  for (Int_t i = 0; i < NRO; i++) {\r
+     fRoReg[i] = kRoReg[i];\r
+  }\r
+\r
+  return kTRUE;\r
+}\r
index ec5c80a..62147f6 100644 (file)
-#ifndef ALITRDRAWTPSTREAM_H
-#define ALITRDRAWTPSTREAM_H
-
-/* Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *
- * See cxx source for full Copyright notice                               */
-
-/* $Id: AliTRDrawTPStream.h 27696 2008-07-31 09:18:53Z cblume $ */
-
-///////////////////////////////////////////////////////////////////////////////////////
-//                                                                                   //
-// This class provides access to pattern generated TRD raw data including            //
-// configuration data.                                                               //
-//                                                                                   //
-///////////////////////////////////////////////////////////////////////////////////////
-
-
-#define N_REGS       433      // number of conf. registers
-#define N_CMD         16      // number of command registers
-#define N_RO          25      // number of command registers
-#define N_BLOCKS      38      // number of blocks
-#define N_BLOCKS_n    64      // number of blocks
-#define N_PACKD_DAT 0xE0      // the max size of the packed conf., the absolute max is 256!
-#define N_NO_BCST      3      // number of regs without broadcast
-#define N_DMEM     0x400      // number of DMEM words
-#define N_DBANK    0x100      // number of DBANK words
-#define N_IMEM    0x1000      // number of IMEM words/CPU
-#define IMEM_EMPTY 0x80000000 // mark for empty IMEM
-#define DBANK_ADDR 0xF000     // start address of DBANK in GIO
-#define DMEM_ADDR  0xC000     // start address of DMEM in GIO
-#define ENDM_CONF  0x7FFF00FE // end marker for the packed configuration
-
-#include "TObject.h"
-#include "TString.h"
-#include "AliTRDrawStreamBase.h"
-
-
-
-class AliTRDrawTPStream : public AliTRDrawStreamBase
-{ // class def begin
-
- public:
-
-  struct SimpleRegs {
-     const Char_t     * fName;  //! Name of the register 
-     UInt_t    fAddr;    // Address in GIO of TRAP
-     UInt_t    fNbits;   // Number of bits, from 1 to 32
-     UInt_t    fResVal;  // reset value [mj]
-  };
-
-  struct CmdRegs{
-     const Char_t     * fName;  //! Name of the command register
-     UInt_t    fAddr;    // Address in GIO of TRAP
-  };
-
-
-  Bool_t       DecodeTPdata();
-  Bool_t       DecodeConfigdata();
-  Bool_t       FillConfig();
-  Int_t                ReadPacked(UInt_t *word, UInt_t *pdata, Int_t *len);
-  Int_t                UnPackConfN(UInt_t *pData, Int_t maxLength);
-  Int_t                SetU(UInt_t addr, UInt_t newVal);
-  Int_t                AddrIsDmem(UInt_t addr);
-  Int_t                AddrIsDbank(UInt_t addr);
-  UInt_t       Addr2Idx(UInt_t addr);
-  const Char_t * Addr2Name(UInt_t addr); //!
-  Char_t       CnfStat(UInt_t prop);
-  void         PowerUp();
-  void         DumpCnf(Int_t slv);
-  
-  enum DbankProp {kDbankEmpty=0, kDbankHeader, kDbankData, kDbankNoB, kDbankCrc32, kDbankEheader, kScsnDat}; 
-
-  SimpleRegs fTrapReg[N_REGS];       // all TRAP configuration registers 
-  CmdRegs    fCmdReg[N_CMD];         // all TRAP command registers
-  CmdRegs    fRoReg[N_RO];           // all TRAP command registers
-
-
-  //--------------------------------------------------------
-  AliTRDrawTPStream(Int_t rawVMajorOpt, UInt_t * pPos);
-  AliTRDrawTPStream(const AliTRDrawTPStream& st);
-  AliTRDrawTPStream &operator=(const AliTRDrawTPStream &);
-  virtual ~AliTRDrawTPStream();
-  //--------------------------------------------------------
-
-
- protected:
-
-  UInt_t       fCnfPro[N_REGS];
-  UInt_t       fDmemValid[N_DMEM];  // 0- empty, 1- valid
-  UInt_t       fRegs[N_REGS];       // the actual content of all conf. registers
-  UInt_t       fDmem[N_DMEM];       // content of the DMEM, in GIO from 0xC000 to 0xC3FF
-  UInt_t       fDbank[N_DBANK];     // 32 bit data, to be send to DBANK
-  DbankProp    fDbankPro[N_DBANK];  // property: 0-empty, 1- header, 2- data, 3- data no broadcast, 4- crc-32 checksum, 5- empty header
-
-  UInt_t       *fpPos;              //! current position in the buffer
-  Int_t                fRawVMajorOpt;       // Raw data version
-
-
-  ClassDef(AliTRDrawTPStream, 0)     // Pattern generated TRD raw data
-
-}; 
-
-#endif
+#ifndef ALITRDRAWTPSTREAM_H\r
+#define ALITRDRAWTPSTREAM_H\r
+\r
+/* Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *\r
+ * See cxx source for full Copyright notice                               */\r
+\r
+/* $Id: AliTRDrawTPStream.h 27696 2008-07-31 09:18:53Z cblume $ */\r
+\r
+///////////////////////////////////////////////////////////////////////////////////////\r
+//                                                                                   //\r
+// This class provides access to pattern generated TRD raw data including            //\r
+// configuration data.                                                               //\r
+//                                                                                   //\r
+///////////////////////////////////////////////////////////////////////////////////////\r
+\r
+\r
+#define NREGS       433      // number of conf. registers\r
+#define NCMD         16      // number of command registers\r
+#define NRO          25      // number of command registers\r
+#define N_BLOCKS      38      // number of blocks\r
+#define N_BLOCKS_n    64      // number of blocks\r
+#define N_PACKD_DAT 0xE0      // the max size of the packed conf., the absolute max is 256!\r
+#define N_NO_BCST      3      // number of regs without broadcast\r
+#define NDMEM     0x400      // number of DMEM words\r
+#define NDBANK    0x100      // number of DBANK words\r
+#define N_IMEM    0x1000      // number of IMEM words/CPU\r
+#define IMEM_EMPTY 0x80000000 // mark for empty IMEM\r
+#define DBANK_ADDR 0xF000     // start address of DBANK in GIO\r
+#define DMEM_ADDR  0xC000     // start address of DMEM in GIO\r
+#define ENDM_CONF  0x7FFF00FE // end marker for the packed configuration\r
+\r
+#include "TObject.h"\r
+#include "TString.h"\r
+#include "AliTRDrawStreamBase.h"\r
+\r
+\r
+\r
+class AliTRDrawTPStream : public AliTRDrawStreamBase\r
+{ // class def begin\r
+\r
+ public:\r
+\r
+  struct SimpleRegs {\r
+     const Char_t     * fName;  //! Name of the register \r
+     UInt_t    fAddr;    // Address in GIO of TRAP\r
+     UInt_t    fNbits;   // Number of bits, from 1 to 32\r
+     UInt_t    fResVal;  // reset value [mj]\r
+  };\r
+\r
+  struct CmdRegs{\r
+     const Char_t     * fName;  //! Name of the command register\r
+     UInt_t    fAddr;    // Address in GIO of TRAP\r
+  };\r
+\r
+  AliTRDrawTPStream(Int_t rawVMajorOpt, UInt_t * pPos);\r
+  AliTRDrawTPStream(const AliTRDrawTPStream& st);\r
+  AliTRDrawTPStream &operator=(const AliTRDrawTPStream &);\r
+  virtual ~AliTRDrawTPStream();\r
+\r
+  Bool_t       DecodeTPdata();\r
+  Bool_t       DecodeConfigdata();\r
+  Bool_t       FillConfig();\r
+  Int_t                ReadPacked(UInt_t *word, UInt_t *pdata, Int_t * const len);\r
+  Int_t                UnPackConfN(const UInt_t *pData, Int_t maxLength);\r
+  Int_t                SetU(UInt_t addr, UInt_t newVal);\r
+  Int_t                AddrIsDmem(UInt_t addr) const;\r
+  Int_t                AddrIsDbank(UInt_t addr) const;\r
+  UInt_t       Addr2Idx(UInt_t addr) const;\r
+  const Char_t * Addr2Name(UInt_t addr) const; //!\r
+  Char_t       CnfStat(UInt_t prop) const;\r
+  void         PowerUp();\r
+  void         DumpCnf(Int_t slv);\r
+  \r
+\r
+\r
+ protected:\r
+\r
+  enum DbankProp {kDbankEmpty=0, kDbankHeader, kDbankData, kDbankNoB, kDbankCrc32, kDbankEheader, kScsnDat}; \r
+\r
+  SimpleRegs fTrapReg[NREGS];       // all TRAP configuration registers \r
+  CmdRegs    fCmdReg[NCMD];         // all TRAP command registers\r
+  CmdRegs    fRoReg[NRO];           // all TRAP command registers\r
+\r
+  UInt_t       fCnfPro[NREGS];     // something ...\r
+  UInt_t       fDmemValid[NDMEM];  // 0- empty, 1- valid\r
+  UInt_t       fRegs[NREGS];       // the actual content of all conf. registers\r
+  UInt_t       fDmem[NDMEM];       // content of the DMEM, in GIO from 0xC000 to 0xC3FF\r
+  UInt_t       fDbank[NDBANK];     // 32 bit data, to be send to DBANK\r
+  DbankProp    fDbankPro[NDBANK];  // property: 0-empty, 1- header, 2- data, 3- data no broadcast, 4- crc-32 checksum, 5- empty header\r
+\r
+  UInt_t       *fpPos;              //! current position in the buffer\r
+  Int_t                fRawVMajorOpt;       // Raw data version\r
+\r
+\r
+  ClassDef(AliTRDrawTPStream, 0)     // Pattern generated TRD raw data\r
+\r
+}; \r
+\r
+#endif\r