fIndex++;
buf[fIndex]=baseWord;
+ // DRM status header 4
+ baseWord=0;
+ word = 1; // 0001 -> DRM data are coming from the VME slot number 1
+ AliBitPacking::PackWord(word,baseWord, 0, 3);
+ word = 0; // temperature
+ AliBitPacking::PackWord(word,baseWord, 4,13);
+ word = 0; // zero
+ AliBitPacking::PackWord(word,baseWord, 14,14);
+ word = 0; // ACK
+ AliBitPacking::PackWord(word,baseWord, 15,15);
+ word = 0; // Sens AD
+ AliBitPacking::PackWord(word,baseWord, 16,18);
+ word = 0; // zero
+ AliBitPacking::PackWord(word,baseWord, 19,19);
+ word = 0; // reserved for future use
+ AliBitPacking::PackWord(word,baseWord, 20,27);
+ word = 4; // 0100 -> DRM header ID
+ AliBitPacking::PackWord(word,baseWord,28,31);
+ fIndex++;
+ buf[fIndex]=baseWord;
+
// DRM status header 3
baseWord=0;
word = 1; // 0001 -> DRM data are coming from the VME slot number 1
AliBitPacking::PackWord(word,baseWord, 0, 3);
- word = 0; // TTC event counter
- AliBitPacking::PackWord(word,baseWord, 4,27);
+ word = 0; // L0 BCID
+ AliBitPacking::PackWord(word,baseWord, 4,15);
+ word = 0; // Run Time info
+ AliBitPacking::PackWord(word,baseWord, 16,27);
word = 4; // 0100 -> DRM header ID
AliBitPacking::PackWord(word,baseWord,28,31);
fIndex++;
word = 0; //
AliBitPacking::PackWord(word,baseWord,15,15);
word = 0; // fault ID
- AliBitPacking::PackWord(word,baseWord,16,27);
+ AliBitPacking::PackWord(word,baseWord,16,26);
+ word = 0; // RTO
+ AliBitPacking::PackWord(word,baseWord,27,27);
word = 4; // 0100 -> DRM header ID
AliBitPacking::PackWord(word,baseWord,28,31);
fIndex++;
word = 1; // LHC clock status: 1/0
AliBitPacking::PackWord(word,baseWord,15,15);
+ word = 0; // Vers ID
+ AliBitPacking::PackWord(word,baseWord,16,20);
+ word = 0; // DRMH size
+ AliBitPacking::PackWord(word,baseWord,21,24);
word = 0; // reserved for future use
- AliBitPacking::PackWord(word,baseWord,16,27);
+ AliBitPacking::PackWord(word,baseWord,25,27);
word = 4; // 0100 -> DRM header ID
AliBitPacking::PackWord(word,baseWord,28,31);
fIndex++;
#define DRM_C_BIT_MASK 0x00008000
#define DRM_C_BIT_POSITION 15
+//DRM Vers-ID mask/position
+#define DRM_VERS_ID_MASK 0x001f0000
+#define DRM_VERS_ID_POSITION 16
+
+//DRM DRM Header size mask/position
+#define DRM_HEADER_SIZE_MASK 0x01e00000
+#define DRM_HEADER_SIZE_POSITION 21
+
//DRM status header 2 word required bit pattern
#define DRM_STATUS_HEADER_2 0x40000001
#define DRM_ENABLE_ID_MASK 0x00007ff0
#define DRM_ENABLE_ID_POSITION 4
+//DRM zero in word2 mask/position
+#define DRM_ZERO_WORD2_MASK 0x00008000
+#define DRM_ZERO_WORD2_POSITION 15
+
//DRM fault ID mask/position
#define DRM_FAULT_ID_MASK 0x07ff0000
#define DRM_FAULT_ID_POSITION 16
+//DRM RTO bit mask/position
+#define DRM_RTO_BIT_MASK 0x08000000
+#define DRM_RTO_BIT_POSITION 27
+
//DRM status header 3 word required bit pattern
#define DRM_STATUS_HEADER_3 0x40000001
-//DRM TTC event counter mask/position
-#define DRM_TTC_EVENT_COUNTER_MASK 0x0ffffff0
-#define DRM_TTC_EVENT_COUNTER_POSITION 4
+//DRM L0 BCID mask/position
+#define DRM_L0_BCID_MASK 0x0000fff0
+#define DRM_L0_BCID_POSITION 4
+
+//DRM Run Time Info mask/position
+#define DRM_RUNTIME_INFO_MASK 0x0fff0000
+#define DRM_RUNTIME_INFO_POSITION 16
+
+//DRM status header 4 word required bit pattern
+#define DRM_STATUS_HEADER_4 0x40000001
+
+//DRM Temperature mask/position
+#define DRM_TEMPERATURE_MASK 0x00003ff0
+#define DRM_TEMPERATURE_POSITION 4
+
+//DRM 1st zero in word4 mask/position
+#define DRM_ZERO_1_WORD4_MASK 0x00004000
+#define DRM_ZERO_1_WORD4_POSITION 14
+
+//DRM ACK mask/position
+#define DRM_ACK_MASK 0x00008000
+#define DRM_ACK_POSITION 15
+
+//DRM Sens AD mask/position
+#define DRM_SENS_AD_MASK 0x00070000
+#define DRM_SENS_AD_POSITION 16
+
+//DRM 2nd zero in word4 mask/position
+#define DRM_ZERO_2_WORD4_MASK 0x00080000
+#define DRM_ZERO_2_WORD4_POSITION 19
//DRM event CRC mask/position
-//#define DRM_EVENT_CRC_MASK 0x001ffff0
#define DRM_EVENT_CRC_MASK 0x000ffff0
#define DRM_EVENT_CRC_POSITION 4