]> git.uio.no Git - u/mrichter/AliRoot.git/commitdiff
Treatment of bad SDD half-modules (F. Prino)
authorprino <prino@f7af4fe6-9843-0410-8265-dc069ae4e863>
Tue, 8 Sep 2009 12:59:12 +0000 (12:59 +0000)
committerprino <prino@f7af4fe6-9843-0410-8265-dc069ae4e863>
Tue, 8 Sep 2009 12:59:12 +0000 (12:59 +0000)
ITS/AliITSPreprocessorSDD.cxx
ITS/ShowCalibrationSDD.C

index 6a2bb4206d1d5f9738ef78c8e9e70da28eb224ea..44a52b0ba3aec216fc34dcb87ca8ef5ec570b853 100644 (file)
@@ -123,9 +123,10 @@ UInt_t AliITSPreprocessorSDD::ProcessPulser(AliITSDDLModuleMapSDD* ddlmap){
   delete sourceList;
   // Read ADC sampling frequency from fee.conf
   Int_t amSamplFreq=40;
+  Int_t retfscf;
   FILE* feefil=fopen("fee.conf","r");
   if(feefil){
-    fscanf(feefil,"%d \n",&amSamplFreq);
+    retfscf=fscanf(feefil,"%d \n",&amSamplFreq);
     fclose(feefil);
     Log(Form("AM sampling frequency = %d MHz",amSamplFreq));
   }else{
@@ -141,6 +142,8 @@ UInt_t AliITSPreprocessorSDD::ProcessPulser(AliITSDDLModuleMapSDD* ddlmap){
       if(amSamplFreq!=40) cal->SetAMAt20MHz();
       numOfBadChannels[modID]=0;
       Int_t badch[kNumberOfChannels];
+      Bool_t sid0ok=kTRUE;
+      Bool_t sid1ok=kTRUE;
       for(Int_t isid=0;isid<=1;isid++){
        TString inpFileName;
        inpFileName.Form("./SDDbase_ddl%02dc%02d_sid%d.data",iddl,imod,isid);
@@ -148,17 +151,36 @@ UInt_t AliITSPreprocessorSDD::ProcessPulser(AliITSDDLModuleMapSDD* ddlmap){
        FILE* basFil = fopen(inpFileName,"read");
        if (basFil == 0) {
          Log(Form("File %s not found.",inpFileName.Data()));
-         cal->SetBad();
+         if(isid==0){
+           sid0ok=kFALSE;
+           for(Int_t iChip=0; iChip<4; iChip++) cal->SetChipBad(iChip);
+           cal->SetDeadChannels(cal->GetDeadChannels()+256);
+           for(Int_t iAnode=0; iAnode<256; iAnode++) cal->SetBadChannel(iAnode,iAnode);
+         }else{
+           sid1ok=kFALSE;
+           for(Int_t iChip=4; iChip<8; iChip++) cal->SetChipBad(iChip);
+           cal->SetDeadChannels(cal->GetDeadChannels()+256);
+           for(Int_t iAnode=0; iAnode<256; iAnode++) cal->SetBadChannel(iAnode,iAnode+256);
+         }
          continue;
        }
-       fscanf(basFil,"%d %d %d\n",&im,&is,&isgoodmod);
-       if(!isgoodmod) cal->SetBad();
-       fscanf(basFil,"%d\n",&th);
-       fscanf(basFil,"%d\n",&tl);
+
+       retfscf=fscanf(basFil,"%d %d %d\n",&im,&is,&isgoodmod);
+       if(!isgoodmod){
+         if(isid==0){
+           sid0ok=kFALSE;
+           for(Int_t iChip=0; iChip<4; iChip++) cal->SetChipBad(iChip);
+         }else{
+           sid1ok=kFALSE;
+           for(Int_t iChip=4; iChip<8; iChip++) cal->SetChipBad(iChip);
+         }
+       }
+       retfscf=fscanf(basFil,"%d\n",&th);
+       retfscf=fscanf(basFil,"%d\n",&tl);
        cal->SetZSLowThreshold(isid,tl);
        cal->SetZSHighThreshold(isid,th);
        for(Int_t ian=0;ian<(kNumberOfChannels/2);ian++){
-         fscanf(basFil,"%d %d %f %d %d %f %f %f %f\n",&i,&isgoodan,&baseline,&basmin,&basoff,&rawnoise,&cmn,&corn,&gain);
+         retfscf=fscanf(basFil,"%d %d %f %d %d %f %f %f %f\n",&i,&isgoodan,&baseline,&basmin,&basoff,&rawnoise,&cmn,&corn,&gain);
          Int_t ich=ian;
          if(isid==1) ich+=256;
          if(!isgoodan){ 
@@ -176,6 +198,7 @@ UInt_t AliITSPreprocessorSDD::ProcessPulser(AliITSDDLModuleMapSDD* ddlmap){
        }
        fclose(basFil);
       }
+      if(!sid0ok && !sid1ok) cal->SetBad();
       Log(Form("Put calib obj for module %d (DDL %d  Carlos %d)",modID,iddl,imod));
       calSDD.AddAt(cal,modID);
     }
@@ -229,7 +252,7 @@ UInt_t AliITSPreprocessorSDD::ProcessInjector(AliITSDDLModuleMapSDD* ddlmap){
     ind++;
   }
   delete sourceList;
-
+  Int_t retfscf;
 
   for(Int_t iddl=0;iddl<kNumberOfDDL;iddl++){
     for(Int_t imod=0;imod<kModulesPerDDL;imod++){
@@ -248,12 +271,12 @@ UInt_t AliITSPreprocessorSDD::ProcessInjector(AliITSDDLModuleMapSDD* ddlmap){
          vdrift.AddAt(arr,2*modID+isid);
          continue;
        }
-       fscanf(injFil,"%d",&polDeg);
+       retfscf=fscanf(injFil,"%d",&polDeg);
        while (!feof(injFil)){
-         fscanf(injFil,"%d %u ",&evNumb,&timeStamp);
+         retfscf=fscanf(injFil,"%d %u ",&evNumb,&timeStamp);
          if(feof(injFil)) break;
          for(Int_t ic=0;ic<4;ic++){ 
-           fscanf(injFil,"%f ",&auxP);
+           retfscf=fscanf(injFil,"%f ",&auxP);
            param[ic]=auxP;
          }
 
index 9ef47066238f34036dd024a24b4baaaf55f208c7..f2dc0f00490a0b85a0ce2920e14db1efbab5330d 100644 (file)
@@ -26,14 +26,14 @@ void ShowCalibrationSDD(Int_t iMod=0, Char_t *filnam="$ALICE_ROOT/ITS/Calib/Cali
 
   TFile *f=TFile::Open(filnam);
   AliCDBEntry *ent=(AliCDBEntry*)f->Get("AliCDBEntry");
-  TH2I* hlay3=new TH2I("hlay3","Layer 3",6,-0.5,5.5,14,-0.5,13.5);
+  TH2I* hlay3=new TH2I("hlay3","Layer 3",12,-0.5,5.5,14,-0.5,13.5);
   hlay3->GetXaxis()->SetTitle("Detector");
   hlay3->GetYaxis()->SetTitle("Ladder");
   hlay3->GetXaxis()->SetTickLength(0);
   hlay3->GetYaxis()->SetTickLength(0);
   hlay3->SetStats(0);
   hlay3->SetMinimum(-1);
-  TH2I* hlay4=new TH2I("hlay4","Layer 4",8,-0.5,7.5,22,-0.5,21.5);
+  TH2I* hlay4=new TH2I("hlay4","Layer 4",16,-0.5,7.5,22,-0.5,21.5);
   hlay4->GetXaxis()->SetTitle("Detector");
   hlay4->GetYaxis()->SetTitle("Ladder");
   hlay4->GetXaxis()->SetTickLength(0);
@@ -67,14 +67,17 @@ void ShowCalibrationSDD(Int_t iMod=0, Char_t *filnam="$ALICE_ROOT/ITS/Calib/Cali
     printf("Module %d (%d)   status = ",i,i+240);
     Int_t lay,lad,det;
     AliITSgeomTGeo::GetModuleId(i+240,lay,lad,det);
+    Int_t index=1+(det-1)*2;
     if(cal->IsBad()){ 
       printf("BAD\t");
       if(lay==3){ 
        badModCounter3++;
-       hlay3->SetBinContent(det,lad,0);
+       hlay3->SetBinContent(index,lad,0);
+       hlay3->SetBinContent(index+1,lad,0);
       }else if(lay==4){ 
        badModCounter4++;
-       hlay4->SetBinContent(det,lad,0);
+       hlay4->SetBinContent(index,lad,0);
+       hlay4->SetBinContent(index+1,lad,0);
       }
       hmodstatus->SetBinContent(i+1,0);
     }else{ 
@@ -82,10 +85,28 @@ void ShowCalibrationSDD(Int_t iMod=0, Char_t *filnam="$ALICE_ROOT/ITS/Calib/Cali
       hmodstatus->SetBinContent(i+1,1);
       if(lay==3){ 
        badAnodeCounterGoodMod3+=cal->GetDeadChannels();
-       hlay3->SetBinContent(det,lad,1);
+       if(cal->IsChipBad(0) && cal->IsChipBad(1) && cal->IsChipBad(2) && cal->IsChipBad(3)){
+         hlay3->SetBinContent(index,lad,0);
+       }else{
+         hlay3->SetBinContent(index,lad,1);
+       }
+       if(cal->IsChipBad(4) && cal->IsChipBad(5) && cal->IsChipBad(6) && cal->IsChipBad(7)){
+         hlay3->SetBinContent(index+1,lad,0);
+       }else{
+         hlay3->SetBinContent(index+1,lad,1);
+       }
       }else{ 
        badAnodeCounterGoodMod4+=cal->GetDeadChannels();
-       hlay4->SetBinContent(det,lad,1);
+       if(cal->IsChipBad(0) && cal->IsChipBad(1) && cal->IsChipBad(2) && cal->IsChipBad(3)){
+         hlay4->SetBinContent(index,lad,0);
+       }else{
+         hlay4->SetBinContent(index,lad,1);
+       }
+       if(cal->IsChipBad(4) && cal->IsChipBad(5) && cal->IsChipBad(6) && cal->IsChipBad(7)){
+         hlay4->SetBinContent(index+1,lad,0);
+       }else{
+         hlay4->SetBinContent(index+1,lad,1);
+       }
       }
      }
     printf("   Chip Status (0=OK, 1=BAD): ");