fFECERRA(0),
fFECERRB(0),
fERRREG2(0),
+ fERRREG3(0),
+ fERRREG4(0),
fActiveFECsA(0),
fActiveFECsB(0),
fAltroCFG1(0),
fFECERRA(stream.fFECERRA),
fFECERRB(stream.fFECERRB),
fERRREG2(stream.fERRREG2),
+ fERRREG3(stream.fERRREG3),
+ fERRREG4(stream.fERRREG4),
fActiveFECsA(stream.fActiveFECsA),
fActiveFECsB(stream.fActiveFECsB),
fAltroCFG1(stream.fAltroCFG1),
fFECERRA = stream.fFECERRA;
fFECERRB = stream.fFECERRB;
fERRREG2 = stream.fERRREG2;
+ fERRREG3 = stream.fERRREG3;
+ fERRREG4 = stream.fERRREG4;
fActiveFECsA = stream.fActiveFECsA;
fActiveFECsB = stream.fActiveFECsB;
fAltroCFG1 = stream.fAltroCFG1;
fRCUTrailerData = NULL;
fRCUTrailerSize = 0;
- fFECERRA = fFECERRB = fERRREG2 = fActiveFECsA = fActiveFECsB = fAltroCFG1 = fAltroCFG2 = 0;
+ fFECERRA = fFECERRB = fERRREG2 = fERRREG3 = fERRREG4 = fActiveFECsA = fActiveFECsB = fAltroCFG1 = fAltroCFG2 = 0;
fDDLNumber = fPrevDDLNumber = fRCUId = fPrevRCUId = fHWAddress = fPrevHWAddress = fTime = fPrevTime = fSignal = fTimeBunch = -1;
fPrevTime = fTime;
while (fCount == 0) { // next trailer
- if (fPosition <= 0) { // next payload
+ while (fPosition <= 0) { // next payload
do {
if (!fRawReader->ReadNextData(fData)) return kFALSE;
} while (fRawReader->GetDataSize() == 0);
if (nFillWords == 0) {
fRawReader->AddMajorErrorLog(kAltroTrailerErr,"no 0x2AA");
// PrintDebug();
- AliWarning("Incorrect trailer found ! Expected 0x2AA not found !");
+ AliWarning(Form("Incorrect trailer found ! Expected 0x2AA not found (0x%x != 0x2AA) ! Current position %d, DDL=%d",
+ temp,fPosition,fDDLNumber));
// trying to recover and find the next bunch
- while ((fPosition > 5) && (temp != 0x2AA)) temp = GetNextWord();
+ while ((fPosition > 2) && (temp != 0x2AA)) temp = GetNextWord();
if (temp != 0x2AA) {
fCount = fPosition = 0;
return kFALSE;
}
//Then read the trailer
- if (fPosition < 5) {
+ if (fPosition < 2) {
fRawReader->AddMajorErrorLog(kAltroTrailerErr,Form("size %d < 5",
- fPosition));
+ fPosition));
// PrintDebug();
AliWarning(Form("Incorrect raw data size ! Expected at least 5 words but found %d !",fPosition));
fCount = fPosition = 0;
return kFALSE;
}
fCount |= ((temp & 0x3FF) >> 6);
- if (fCount == 0) return kFALSE;
+
if (fCount >= fPosition) {
fRawReader->AddMajorErrorLog(kAltroTrailerErr,"invalid size");
// PrintDebug();
break;
case 3:
// ERR_REG3
- if (parData != 0xAAAAAA) {
- fRawReader->AddMinorErrorLog(kRCUTrailerErr,"no 0xAAAAAA");
- AliWarning(Form("Parameter code %d : no 0xAAAAAA found !",
- parCode));
- }
+ fERRREG3 = parData & 0xFFF;
break;
case 4:
// ERR_REG4
- if (parData != 0xAAAAAA) {
- fRawReader->AddMinorErrorLog(kRCUTrailerErr,"no 0xAAAAAA");
- AliWarning(Form("Parameter code %d : no 0xAAAAAA found !",
- parCode));
- }
+ fERRREG4 = parData & 0xFFF;
break;
case 5:
// FEC_RO_A
printf("RCU trailer:\n===========\n");
printf("FECERRA: 0x%x\nFECERRB: 0x%x\n",fFECERRA,fFECERRB);
printf("ERRREG2: 0x%x\n",fERRREG2);
+ printf("#channels skipped due to address mismatch: %d\n",GetNChAddrMismatch());
+ printf("#channels skipped due to bad block length: %d\n",GetNChLengthMismatch());
printf("Active FECs (branch A): 0x%x\nActive FECs (branch B): 0x%x\n",fActiveFECsA,fActiveFECsB);
printf("Baseline corr: 0x%x\n",GetBaselineCorr());
printf("Number of presamples: %d\nNumber of postsamples: %d\n",GetNPresamples(),GetNPostsamples());
printf("Number of pretrigger samples: %d\n",GetNPretriggerSamples());
printf("Number of samples per channel: %d\n",GetNSamplesPerCh());
printf("Sparse readout: %d\n",GetSparseRO());
- printf("Sampling time: %f s\n",GetTSample());
- printf("L1 Phase: %f s\n",GetL1Phase());
+ printf("Sampling time: %e s\n",GetTSample());
+ printf("L1 Phase: %e s\n",GetL1Phase());
+ printf("AltroCFG1: 0x%x\nAltroCFG2: 0x%x\n",GetAltroCFG1(),GetAltroCFG2());
printf("===========\n");
}
UInt_t GetFECERRA() const { return fFECERRA; }
UInt_t GetFECERRB() const { return fFECERRB; }
UShort_t GetERRREG2() const { return fERRREG2; }
+ UShort_t GetNChAddrMismatch() const { return fERRREG3; }
+ UShort_t GetNChLengthMismatch() const { return fERRREG4; }
+
UShort_t GetActiveFECsA() const { return fActiveFECsA; }
UShort_t GetActiveFECsB() const { return fActiveFECsB; }
UInt_t fFECERRA; // contains errors related to ALTROBUS transactions
UInt_t fFECERRB; // contains errors related to ALTROBUS transactions
UShort_t fERRREG2; // contains errors related to ALTROBUS transactions or trailer of ALTRO channel block
+ UShort_t fERRREG3; // contains number of altro channels skipped due to an address mismatch
+ UShort_t fERRREG4; // contains number of altro channels skipped due to a block length mismatch
UShort_t fActiveFECsA; // bit pattern of active FECs in branch A
UShort_t fActiveFECsB; // bit pattern of active FECs in branch B
UInt_t fAltroCFG1; // ALTROCFG1 register