Adding VZERO and TFluka, correcting a typo

diff --git a/build/module.dep b/build/module.dep
index a0c9ea3d4604ac6e6f1a3f7f664917685083f103..5214d0686b02a51bce8b30896b08f4033a2e6a46 100644 (file)
--- a/build/module.dep
+++ b/build/module.dep
@@ -11,9 +11,9 @@ HIJING/module.mk:     HIJING/libhijing.pkg HIJING/libdummyhijing.pkg
 HERWIG/module.mk:      HERWIG/libherwig.pkg 
 ITS/module.mk:         ITS/libITS.pkg
 MEVSIM/module.mk:      MEVSIM/libmevsim.pkg MEVSIM/libdummymevsim.pkg
-MINICERN/module.mk:    MINICERN/libminicern.pkg
+MINICERN/module.mk:    MINICERN/libminicern.pkg HERWIG/libdummyherwig.pkg
 MUON/module.mk:                MUON/libMUON.pkg
-PDF/moudle.mk:         PDF/libpdf.pkg
+PDF/module.mk:         PDF/libpdf.pkg
 PHOS/module.mk:                PHOS/libPHOS.pkg
 PMD/module.mk:         PMD/libPMD.pkg
 PYTHIA/module.mk:      PYTHIA/libpythia.pkg
@@ -35,4 +35,6 @@ THbtp/module.mk:      THbtp/libTHbtp.pkg
 HBTP/module.mk:                HBTP/libHBTP.pkg HBTP/libdummyHBTP.pkg
 HBTAN/module.mk:       HBTAN/libHBTAN.pkg
 TGeant4/module.mk:     TGeant4/libTGeant4.pkg
-AliGeant4/module.mk:    AliGeant4/libAliGeant4.pkg
\ No newline at end of file
+AliGeant4/module.mk:    AliGeant4/libAliGeant4.pkg
+TFluka/module.mk:       TFluka/libTFluka.pkg
+VZERO/module.mk:        VZERO/libVZERO.pkg