TRD/AliTRDrawTPStream.cxx

   1 #/**************************************************************************
   2 * Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *
   3 *                                                                        *
   4 * Author: The ALICE Off-line Project.                                    *
   5 * Contributors are mentioned in the code where appropriate.              *
   6 *                                                                        *
   7 * Permission to use, copy, modify and distribute this software and its   *
   8 * documentation strictly for non-commercial purposes is hereby granted   *
   9 * without fee, provided that the above copyright notice appears in all   *
  10 * copies and that both the copyright notice and this permission notice   *
  11 * appear in the supporting documentation. The authors make no claims     *
  12 * about the suitability of this software for any purpose. It is          *
  13 * provided "as is" without express or implied warranty.                  *
  14 **************************************************************************/
  15
  16 /* $Id: AliTRDrawTPStream.cxx 27797 2008-08-05 14:37:22Z cblume $ */
  17
  18 ///////////////////////////////////////////////////////////////////////////////////////
  19 //                                                                                   //
  20 // This class provides access to pattern generated TRD raw data including            //
  21 // configuration data.                                                               //
  22 //                                                                                   //
  23 // It is based on Venelin Angelov's c++ code decoding standalone                     //
  24 // configuration data                                                                //
  25 // http://alice.physi.uni-heidelberg.de/svn/trd/wconfigurations/trunk/C/trap_cnf.cpp //
  26 // http://alice.physi.uni-heidelberg.de/svn/trd/wconfigurations/trunk/C/trap_cnf.h   //
  27 //                                                                                   //
  28 // Author: MinJung Kweon(minjung@physi.uni-heidelberg.de)                            //
  29 //                                                                                   //
  30 ///////////////////////////////////////////////////////////////////////////////////////
  31
  32 #include "TString.h"
  33 #include "AliLog.h"
  34
  35 #include "AliTRDrawTPStream.h"
  36
  37
  38 #define GET_VALUE_AT(w,m,s) (( (w) >> (s)) & (m) )
  39 #define MCM_HEADER_MASK_ERR(w) ( ((w) & (0xf)) == (0xc) ? 0 : 1)
  40 #define MCM_ROB_NUMBER(w) GET_VALUE_AT(w,0x7,28)
  41 #define MCM_MCM_NUMBER(w) GET_VALUE_AT(w,0x0f,24)
  42 #define MCM_EVENT_COUNTER(w) GET_VALUE_AT(w,0x00fffff,4)
  43
  44
  45
  46 ClassImp(AliTRDrawTPStream)
  47
  48 //---------------------------------------------------------------------
  49 AliTRDrawTPStream::AliTRDrawTPStream(Int_t rawVMajorOpt, UInt_t * pPos)
  50   : AliTRDrawStreamBase()
  51   , fTrapReg()
  52   , fCmdReg()
  53   , fRoReg()
  54   , fCnfPro()
  55   , fDmemValid()
  56   , fRegs()
  57   , fDmem()
  58   , fDbank()
  59   , fDbankPro()
  60   , fpPos(pPos)
  61   , fRawVMajorOpt(rawVMajorOpt)
  62 {
  63   //
  64   // default constructor
  65   //
  66
  67   if (FillConfig() == kFALSE)
  68     AliError("Reading reset value failed.");
  69
  70 }
  71
  72 //---------------------------------------------------------------------
  73 AliTRDrawTPStream::AliTRDrawTPStream(const AliTRDrawTPStream& /*st*/)
  74   : AliTRDrawStreamBase()
  75   , fTrapReg()
  76   , fCmdReg()
  77   , fRoReg()
  78   , fCnfPro()
  79   , fDmemValid()
  80   , fRegs()
  81   , fDmem()
  82   , fDbank()
  83   , fDbankPro()
  84   , fpPos()
  85   , fRawVMajorOpt()
  86 {
  87   //
  88   // copy constructor
  89   //
  90
  91   AliError("Not implemeneted.");
  92
  93 }
  94
  95 //---------------------------------------------------------------------
  96 AliTRDrawTPStream &
  97 AliTRDrawTPStream::operator=(const AliTRDrawTPStream &)
  98 {
  99   //
 100   // we are not using this functionality
 101   //
 102   AliFatal("May not use.");
 103   return *this;
 104 }
 105
 106 //---------------------------------------------------------------------
 107 AliTRDrawTPStream::~AliTRDrawTPStream()
 108 {
 109   //
 110   // destructor
 111   //
 112 }
 113
 114 //---------------------------------------------------------------------
 115 Bool_t AliTRDrawTPStream::DecodeTPdata()
 116 {
 117   //////////////////////////////////////////////////////////////////////////////////////
 118   //since this is not yet tested with test pattern data, by default, it returns false!!!
 119   AliError("These are test pattern data. You need other reader");
 120   return kFALSE;
 121   //////////////////////////////////////////////////////////////////////////////////////
 122
 123   if (fRawVMajorOpt == 7)
 124     {
 125      if (DecodeConfigdata() == kFALSE) // configuration data
 126        {
 127         AliError("failed to to decode configuration data");
 128         return kFALSE;
 129        }
 130      else
 131        return kTRUE;
 132     }
 133   else
 134     AliError("These are different type of test pattern data. You need other reader");
 135
 136   return kFALSE;
 137 }
 138
 139 //---------------------------------------------------------------------
 140 Bool_t AliTRDrawTPStream::DecodeConfigdata()
 141 {
 142
 143     UInt_t packedConf[256];
 144     Int_t mcmPos, mcmsRead, lengthPacked;
 145
 146     mcmsRead = 0;
 147     do
 148     {
 149         mcmPos = ReadPacked(fpPos, packedConf, &lengthPacked);
 150         if (mcmPos >= 0)
 151         {
 152             PowerUp();
 153             UnPackConfN(packedConf, lengthPacked);
 154             DumpCnf(mcmPos);
 155             mcmsRead++;
 156             AliInfo(Form("%d MCMs read up to now, last was MCM%02d\n",mcmsRead, mcmPos));
 157         }
 158     } while ((mcmsRead < 84) && (mcmPos >= 0)); // [mj] have to think about # of mcmsRead
 159     AliInfo("Done\n");
 160
 161     return kTRUE;
 162 }
 163
 164 //---------------------------------------------------------------------
 165 Int_t AliTRDrawTPStream::ReadPacked(UInt_t *word, UInt_t *pData, Int_t *nWords)
 166 {
 167
 168     UInt_t vword = *word;
 169
 170     Int_t  iLength;
 171     UInt_t err, robNum, mcmNum, chipId, NoEndMarker;
 172
 173     iLength = 0;
 174     err = 0;
 175
 176     // decode mcm header
 177     if(!MCM_HEADER_MASK_ERR(vword)) err++;
 178
 179     robNum = MCM_ROB_NUMBER(vword);
 180     mcmNum = MCM_MCM_NUMBER(vword);
 181     chipId = MCM_EVENT_COUNTER(vword);
 182
 183     if (err == 0) {
 184       AliInfo(Form("MCM header ROB %d, MCM %02d, ChipId %d 0x%05x\n", robNum, mcmNum, chipId, chipId));
 185     }
 186     else
 187       return -1;
 188
 189     // read MCM data and store into array
 190     NoEndMarker = 1;
 191     do
 192     {
 193         word++;
 194         vword = *word;
 195
 196         NoEndMarker = ((vword != ENDM_CONF) && (vword != (ENDM_CONF | 1)) && (vword != 0x10001000));
 197         *pData = vword;
 198         pData++;
 199         iLength++;
 200     } while (NoEndMarker && (iLength < 256));
 201
 202     *nWords = iLength;
 203     if (iLength == 0)
 204       return -1;
 205     else
 206       return mcmNum;
 207 }
 208
 209 //---------------------------------------------------------------------
 210 void AliTRDrawTPStream::PowerUp() // power up
 211 {
 212     // copy the reset values
 213     for (Int_t i=0; i< N_REGS; i++)
 214     {
 215         fRegs[i] = fTrapReg[i].fResVal;
 216         fCnfPro[i] = 0;
 217     }
 218     // mark all DMEM cells as invalid
 219     for (Int_t i=0; i< N_DMEM; i++) fDmemValid[i] = 0;
 220     // mark all DBANK cells as empty
 221     for (Int_t i=0; i< N_DBANK; i++) fDbankPro[i] = kDbankEmpty;
 222 }
 223
 224
 225 //---------------------------------------------------------------------
 226 Int_t AliTRDrawTPStream::UnPackConfN(UInt_t *pData, Int_t maxLength)
 227 {
 228     Int_t debug = 0; // the debug mode not completely ready
 229     Int_t step, bwidth, nwords, idx, err, exitFlag, bitcnt, werr;
 230     UInt_t caddr;
 231     UInt_t dat, msk, header, dataHi;
 232
 233     idx = 0; // index in PackedConf
 234     err = 0;
 235     while (idx < maxLength)
 236     {
 237         header = *pData;
 238         if (debug) printf("read 0x%08x  ",header);
 239         pData++;
 240         idx++;
 241         if (header & 0x01) // single data
 242           {
 243             dat = (header >> 2) & 0xFFFF;       // 16 bit data
 244             caddr = (header >> 18) & 0x3FFF;    // 14 bit address
 245             if (caddr != 0x1FFF)                // temp!!! because the end marker was wrong
 246             {
 247              if (header & 0x02)                 // check if > 16 bits
 248                {
 249                 dataHi = *pData;
 250                 if (debug) printf("read 0x%08x  ",dataHi);
 251                 pData++;
 252                 idx++;
 253                 err += ((dataHi ^ (dat | 1)) & 0xFFFF) != 0;
 254                 dat = (dataHi & 0xFFFF0000) | dat;
 255                }
 256                if (debug) printf("addr=0x%04x (%s) data=0x%08x\n",caddr, Addr2Name(caddr), dat);
 257                werr = SetU(caddr, dat);
 258                if (werr < 0)
 259                  {
 260                   printf("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header);
 261                  }
 262                if (idx > maxLength)
 263                  {
 264                   printf("(single-write): no more data, missing end marker\n");
 265                   return -err;
 266                  }
 267             }
 268             else
 269             {
 270              printf("(single-write): address 0x%04x => old endmarker?\n",caddr);
 271                 return err;
 272             }
 273           }
 274         else               // block of data
 275           {
 276             step   =  (header >>  1) & 0x0003;
 277             bwidth = ((header >>  3) & 0x001F) + 1;
 278             nwords =  (header >>  8) & 0x00FF;
 279             caddr  =  (header >> 16) & 0xFFFF;
 280             exitFlag = (step == 0) || (step == 3) || (nwords == 0);
 281             if (exitFlag) return err;
 282             switch (bwidth)
 283             {
 284                 case    15:
 285                 case    10:
 286                 case     7:
 287                 case     6:
 288                 case     5:
 289                 {
 290                     msk = (1 << bwidth) - 1;
 291                     bitcnt = 0;
 292                     while (nwords > 0)
 293                     {
 294                         nwords--;
 295                         bitcnt -= bwidth;
 296                         if (bitcnt < 0)
 297                         {
 298                             header = *pData;
 299                             if (debug) printf("read 0x%08x  ",header);
 300                             pData++;
 301                             idx++;
 302                             err += (header & 1);
 303                             header = header >> 1;
 304                             bitcnt = 31 - bwidth;
 305                         }
 306                         if (debug) printf("addr=0x%04x (%s) data=0x%08x\n",caddr, Addr2Name(caddr), header & msk);
 307                         werr = SetU(caddr, header & msk);
 308                         if (werr < 0)
 309                         {
 310                           printf("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header);
 311                         }
 312                         caddr += step;
 313                         header = header >> bwidth;
 314                         if (idx >= maxLength)
 315                         {
 316                           printf("(block-write): no end marker! %d words read\n",idx);
 317                           return -err;
 318                         }
 319                     }
 320                     break;
 321                 } // end case 5-15
 322                 case 31:
 323                 {
 324                     while (nwords > 0)
 325                     {
 326                         header = *pData;
 327                         if (debug) printf("read 0x%08x  ",header);
 328                         pData++;
 329                         idx++;
 330                         nwords--;
 331                         err += (header & 1);
 332                         if (debug) printf("addr=0x%04x (%s) data=0x%08x\n",caddr, Addr2Name(caddr), header >> 1);
 333                         werr = SetU(caddr, header >> 1);
 334                         if (werr < 0)
 335                         {
 336                             printf("(single-write): non-existing address 0x%04x containing 0x%08x\n", caddr, header);
 337                         }
 338                         caddr += step;
 339                         if (idx >= maxLength)
 340                         {
 341                             printf("no end marker! %d words read\n",idx);
 342                             return -err;
 343                         }
 344                     }
 345                     break;
 346                 }
 347                 default: return err;
 348             } // end switch
 349         } // end block case
 350     } // end while
 351     printf("no end marker! %d words read\n",idx);
 352     return -err; // only if the max length of the block reached!
 353 }
 354
 355 //---------------------------------------------------------------------
 356 void AliTRDrawTPStream::DumpCnf(Int_t slv)
 357 {
 358     UInt_t idx;
 359     for (idx = 0; idx < N_REGS; idx++) // config. reg
 360        {
 361         if (slv >= 0)
 362           printf("%s\t0x%08x\t%3d %c\n", fTrapReg[idx].fName, (Int_t) fRegs[idx], slv, CnfStat(fCnfPro[idx]));
 363         else
 364           printf("%s\t0x%08x %c\n", fTrapReg[idx].fName, (Int_t) fRegs[idx], CnfStat(fCnfPro[idx]));
 365        }
 366 }
 367
 368
 369 //---------------------------------------------------------------------
 370 const Char_t * AliTRDrawTPStream::Addr2Name(UInt_t addr)
 371 {
 372     Int_t idx;
 373     idx = 0;
 374     if ( ( ( (addr >> 4) & 0xFFE) == 0x0C0) && ( ( (addr >> 2) & 1) == 1) )
 375     {
 376         addr = addr & 0x0C07;
 377     }
 378     while ((idx < N_REGS) && (fTrapReg[idx].fAddr != addr) ) idx++;
 379     if (idx < N_REGS)
 380         return fTrapReg[idx].fName;
 381     idx = 0;
 382     while ((idx < N_CMD) && (fCmdReg[idx].fAddr != addr)) idx++;
 383     if (idx < N_CMD)
 384         return fCmdReg[idx].fName;
 385     idx = 0;
 386     while ((idx < N_RO) && (fRoReg[idx].fAddr != addr)) idx++;
 387     if (idx < N_RO)
 388         return fRoReg[idx].fName;
 389     else
 390         return 0;
 391 }
 392
 393 //---------------------------------------------------------------------
 394 Char_t AliTRDrawTPStream::CnfStat(UInt_t prop)
 395 {
 396     if (prop == 0) return 'U';
 397     else
 398     if (prop == 1) return 'R';
 399     else
 400     if (prop == 2) return 'I';
 401     else
 402                    return prop;
 403 }
 404
 405 //---------------------------------------------------------------------
 406 Int_t AliTRDrawTPStream::SetU(UInt_t addr, UInt_t newVal)
 407 {
 408     Int_t i;
 409     UInt_t maxVal = 0;
 410
 411     if (AddrIsDmem(addr))
 412     {
 413         fDmem[addr & 0x3FF] = newVal;
 414         fDmemValid[addr & 0x3FF] = 1;
 415         return 0;
 416     }
 417     else
 418     if (AddrIsDbank(addr))
 419     {
 420         fDbank[addr & 0xFF] = newVal;
 421         fDbankPro[addr & 0xFF] = kScsnDat;
 422         return 0;
 423     }
 424     else
 425     {
 426         i = Addr2Idx(addr);
 427         if (i < N_REGS) // found
 428         {
 429             fCnfPro[i] = 2;
 430             if (fTrapReg[i].fNbits < 32) // create the max value from the number of bits
 431             {
 432                 maxVal = 1;
 433                 maxVal = (maxVal << fTrapReg[i].fNbits) - 1;
 434             }
 435             if ( (fTrapReg[i].fNbits == 32) || (newVal <= maxVal) ) // in range
 436             {
 437                 fRegs[i] = newVal;
 438                 return 0;
 439             }
 440             else
 441             {   // out of range
 442                 fRegs[i] = newVal & maxVal;
 443                 printf("Out of range, writing 0x%08x to %d bits at addr = 0x%04x\n",newVal, fTrapReg[i].fNbits, addr);
 444                 return -2;
 445             }
 446         }
 447         else    // not found
 448             {
 449                 printf("(SetU): No such address, writing 0x%08x to addr = 0x%04x\n",newVal, addr);
 450                 return -1; // no such address
 451             }
 452     }
 453 }
 454
 455 //---------------------------------------------------------------------
 456 Int_t AliTRDrawTPStream::AddrIsDmem(UInt_t addr)
 457 {
 458     addr = (addr >> 10);
 459     return (addr == 0x30);
 460 }
 461
 462 //---------------------------------------------------------------------
 463 Int_t AliTRDrawTPStream::AddrIsDbank(UInt_t addr)
 464 {
 465     addr = (addr >> 8);
 466     return (addr == 0xF0);
 467 }
 468
 469 //---------------------------------------------------------------------
 470 UInt_t AliTRDrawTPStream::Addr2Idx(UInt_t addr)
 471 {
 472     Int_t idx;
 473     idx = 0;
 474     // check if global const
 475     if ( ( ( (addr >> 4) & 0xFFE) == 0x0C0) && ( ( (addr >> 2) & 1) == 1) )
 476     {
 477         addr = addr & 0x0C07;
 478     }
 479     // searching
 480     while ((idx < N_REGS) && (fTrapReg[idx].fAddr != addr)) idx++;
 481        // printf("Addr = 0x%04x; Idx = %d\n",addr, idx); // debugging
 482     return idx;
 483 }
 484
 485 //---------------------------------------------------------------------
 486 Bool_t AliTRDrawTPStream::FillConfig()
 487 {
 488
 489   const SimpleRegs trapReg[N_REGS] = {
 490     // Name         Address Nbits   Reset Value
 491     // Global state machine
 492     {"SML0",        0x0A00, 15,     0x4050},
 493     {"SML1",        0x0A01, 15,     0x4200},
 494     {"SML2",        0x0A02, 15,     0x4384},
 495     {"SMMODE",      0x0A03, 16,     0xF0E2},
 496     {"NITM0",       0x0A08, 14,     0x3FFF},
 497     {"NITM1",       0x0A09, 14,     0x3FFF},
 498     {"NITM2",       0x0A0A, 14,     0x3FFF},
 499     {"NIP4D",       0x0A0B, 7,      0x7F},
 500     {"CPU0CLK",     0x0A20, 5,      0x07},
 501     {"CPU1CLK",     0x0A22, 5,      0x07},
 502     {"CPU2CLK",     0x0A24, 5,      0x07},
 503     {"CPU3CLK",     0x0A26, 5,      0x07},
 504     {"NICLK",       0x0A28, 5,      0x07},
 505     {"FILCLK",      0x0A2A, 5,      0x07},
 506     {"PRECLK",      0x0A2C, 5,      0x07},
 507     {"ADCEN",       0x0A2E, 5,      0x07},
 508     {"NIODE",       0x0A30, 5,      0x07},
 509     {"NIOCE",       0x0A32, 5,      0x21}, // bit 5 is status bit (read-only)!
 510     {"NIIDE",       0x0A34, 5,      0x07},
 511     {"NIICE",       0x0A36, 5,      0x07},
 512     // Arbiter
 513     {"ARBTIM",      0x0A3F, 4,      0x0},
 514     // IVT of CPU0
 515     {"IA0IRQ0",     0x0B00, 12,     0x000},
 516     {"IA0IRQ1",     0x0B01, 12,     0x000},
 517     {"IA0IRQ2",     0x0B02, 12,     0x000},
 518     {"IA0IRQ3",     0x0B03, 12,     0x000},
 519     {"IA0IRQ4",     0x0B04, 12,     0x000},
 520     {"IA0IRQ5",     0x0B05, 12,     0x000},
 521     {"IA0IRQ6",     0x0B06, 12,     0x000},
 522     {"IA0IRQ7",     0x0B07, 12,     0x000},
 523     {"IA0IRQ8",     0x0B08, 12,     0x000},
 524     {"IA0IRQ9",     0x0B09, 12,     0x000},
 525     {"IA0IRQA",     0x0B0A, 12,     0x000},
 526     {"IA0IRQB",     0x0B0B, 12,     0x000},
 527     {"IA0IRQC",     0x0B0C, 12,     0x000},
 528     {"IRQSW0",      0x0B0D, 13,     0x1FFF},
 529     {"IRQHW0",      0x0B0E, 13,     0x0000},
 530     {"IRQHL0",      0x0B0F, 13,     0x0000},
 531     // IVT of CPU1
 532     {"IA1IRQ0",     0x0B20, 12,     0x000},
 533     {"IA1IRQ1",     0x0B21, 12,     0x000},
 534     {"IA1IRQ2",     0x0B22, 12,     0x000},
 535     {"IA1IRQ3",     0x0B23, 12,     0x000},
 536     {"IA1IRQ4",     0x0B24, 12,     0x000},
 537     {"IA1IRQ5",     0x0B25, 12,     0x000},
 538     {"IA1IRQ6",     0x0B26, 12,     0x000},
 539     {"IA1IRQ7",     0x0B27, 12,     0x000},
 540     {"IA1IRQ8",     0x0B28, 12,     0x000},
 541     {"IA1IRQ9",     0x0B29, 12,     0x000},
 542     {"IA1IRQA",     0x0B2A, 12,     0x000},
 543     {"IA1IRQB",     0x0B2B, 12,     0x000},
 544     {"IA1IRQC",     0x0B2C, 12,     0x000},
 545     {"IRQSW1",      0x0B2D, 13,     0x1FFF},
 546     {"IRQHW1",      0x0B2E, 13,     0x0000},
 547     {"IRQHL1",      0x0B2F, 13,     0x0000},
 548     // IVT of CPU2
 549     {"IA2IRQ0",     0x0B40, 12,     0x000},
 550     {"IA2IRQ1",     0x0B41, 12,     0x000},
 551     {"IA2IRQ2",     0x0B42, 12,     0x000},
 552     {"IA2IRQ3",     0x0B43, 12,     0x000},
 553     {"IA2IRQ4",     0x0B44, 12,     0x000},
 554     {"IA2IRQ5",     0x0B45, 12,     0x000},
 555     {"IA2IRQ6",     0x0B46, 12,     0x000},
 556     {"IA2IRQ7",     0x0B47, 12,     0x000},
 557     {"IA2IRQ8",     0x0B48, 12,     0x000},
 558     {"IA2IRQ9",     0x0B49, 12,     0x000},
 559     {"IA2IRQA",     0x0B4A, 12,     0x000},
 560     {"IA2IRQB",     0x0B4B, 12,     0x000},
 561     {"IA2IRQC",     0x0B4C, 12,     0x000},
 562     {"IRQSW2",      0x0B4D, 13,     0x1FFF},
 563     {"IRQHW2",      0x0B4E, 13,     0x0000},
 564     {"IRQHL2",      0x0B4F, 13,     0x0000},
 565     // IVT of CPU3
 566     {"IA3IRQ0",     0x0B60, 12,     0x000},
 567     {"IA3IRQ1",     0x0B61, 12,     0x000},
 568     {"IA3IRQ2",     0x0B62, 12,     0x000},
 569     {"IA3IRQ3",     0x0B63, 12,     0x000},
 570     {"IA3IRQ4",     0x0B64, 12,     0x000},
 571     {"IA3IRQ5",     0x0B65, 12,     0x000},
 572     {"IA3IRQ6",     0x0B66, 12,     0x000},
 573     {"IA3IRQ7",     0x0B67, 12,     0x000},
 574     {"IA3IRQ8",     0x0B68, 12,     0x000},
 575     {"IA3IRQ9",     0x0B69, 12,     0x000},
 576     {"IA3IRQA",     0x0B6A, 12,     0x000},
 577     {"IA3IRQB",     0x0B6B, 12,     0x000},
 578     {"IA3IRQC",     0x0B6C, 12,     0x000},
 579     {"IRQSW3",      0x0B6D, 13,     0x1FFF},
 580     {"IRQHW3",      0x0B6E, 13,     0x0000},
 581     {"IRQHL3",      0x0B6F, 13,     0x0000},
 582     // Global Counter/Timer
 583     {"CTGDINI",     0x0B80, 32,     0x00000000},
 584     {"CTGCTRL",     0x0B81, 12,     0xE3F},
 585     // CPU constants
 586     {"C08CPU0",     0x0C00, 32,     0x00000000},
 587     {"C09CPU0",     0x0C01, 32,     0x00000000},
 588     {"C10CPU0",     0x0C02, 32,     0x00000000},
 589     {"C11CPU0",     0x0C03, 32,     0x00000000},
 590     {"C12CPUA",     0x0C04, 32,     0x00000000},
 591     {"C13CPUA",     0x0C05, 32,     0x00000000},
 592     {"C14CPUA",     0x0C06, 32,     0x00000000},
 593     {"C15CPUA",     0x0C07, 32,     0x00000000},
 594     {"C08CPU1",     0x0C08, 32,     0x00000000},
 595     {"C09CPU1",     0x0C09, 32,     0x00000000},
 596     {"C10CPU1",     0x0C0A, 32,     0x00000000},
 597     {"C11CPU1",     0x0C0B, 32,     0x00000000},
 598     {"C08CPU2",     0x0C10, 32,     0x00000000},
 599     {"C09CPU2",     0x0C11, 32,     0x00000000},
 600     {"C10CPU2",     0x0C12, 32,     0x00000000},
 601     {"C11CPU2",     0x0C13, 32,     0x00000000},
 602     {"C08CPU3",     0x0C18, 32,     0x00000000},
 603     {"C09CPU3",     0x0C19, 32,     0x00000000},
 604     {"C10CPU3",     0x0C1A, 32,     0x00000000},
 605     {"C11CPU3",     0x0C1B, 32,     0x00000000},
 606     // NI interface
 607     {"NMOD",        0x0D40, 6,      0x08},
 608     {"NDLY",        0x0D41, 30,     0x24924924},
 609     {"NED",         0x0D42, 16,     0xA240},
 610     {"NTRO",        0x0D43, 18,     0x3FFFC},
 611     {"NRRO",        0x0D44, 18,     0x3FFFC},
 612
 613     {"NES",         0x0D45, 32,     0x00000000},
 614     {"NTP",         0x0D46, 32,     0x0000FFFF},
 615     {"NBND",        0x0D47, 16,     0x6020},
 616     {"NP0",         0x0D48, 11,     0x44C},
 617     {"NP1",         0x0D49, 11,     0x44C},
 618     {"NP2",         0x0D4A, 11,     0x44C},
 619     {"NP3",         0x0D4B, 11,     0x44C},
 620     {"NCUT",        0x0D4C, 32,     0xFFFFFFFF},
 621     // Filter and Preprocessor
 622     {"TPPT0",       0x3000, 7,      0x01},
 623     {"TPFS",        0x3001, 7,      0x05},
 624     {"TPFE",        0x3002, 7,      0x14},
 625     {"TPPGR",       0x3003, 7,      0x15},
 626     {"TPPAE",       0x3004, 7,      0x1E},
 627     {"TPQS0",       0x3005, 7,      0x00},
 628     {"TPQE0",       0x3006, 7,      0x0A},
 629     {"TPQS1",       0x3007, 7,      0x0B},
 630     {"TPQE1",       0x3008, 7,      0x14},
 631     {"EBD",         0x3009, 3,      0x0},
 632     {"EBAQA",       0x300A, 7,      0x00},
 633     {"EBSIA",       0x300B, 7,      0x20},
 634     {"EBSF",        0x300C, 1,      0x1},
 635     {"EBSIM",       0x300D, 1,      0x1},
 636     {"EBPP",        0x300E, 1,      0x1},
 637     {"EBPC",        0x300F, 1,      0x1},
 638
 639     {"EBIS",        0x3014, 10,     0x005},
 640     {"EBIT",        0x3015, 12,     0x028},
 641     {"EBIL",        0x3016, 8,      0xF0},
 642     {"EBIN",        0x3017, 1,      0x1},
 643     {"FLBY",        0x3018, 1,      0x0},
 644     {"FPBY",        0x3019, 1,      0x0},
 645     {"FGBY",        0x301A, 1,      0x0},
 646     {"FTBY",        0x301B, 1,      0x0},
 647     {"FCBY",        0x301C, 1,      0x0},
 648     {"FPTC",        0x3020, 2,      0x3},
 649     {"FPNP",        0x3021, 9,      0x078},
 650     {"FPCL",        0x3022, 1,      0x1},
 651     {"FGTA",        0x3028, 12,     0x014},
 652     {"FGTB",        0x3029, 12,     0x80C},
 653     {"FGCL",        0x302A, 1,      0x1},
 654     {"FTAL",        0x3030, 10,     0x0F6},
 655     {"FTLL",        0x3031, 9,      0x11D},
 656     {"FTLS",        0x3032, 9,      0x0D3},
 657     {"FCW1",        0x3038, 8,      0x1E},
 658     {"FCW2",        0x3039, 8,      0xD4},
 659     {"FCW3",        0x303A, 8,      0xE6},
 660     {"FCW4",        0x303B, 8,      0x4A},
 661     {"FCW5",        0x303C, 8,      0xEF},
 662     {"TPFP",        0x3040, 9,      0x037},
 663     {"TPHT",        0x3041, 14,     0x00A0},
 664
 665     {"TPVT",        0x3042, 6,      0x00},
 666     {"TPVBY",       0x3043, 1,      0x0},
 667     {"TPCT",        0x3044, 5,      0x08},
 668     {"TPCL",        0x3045, 5,      0x01},
 669     {"TPCBY",       0x3046, 1,      0x1},
 670     {"TPD",         0x3047, 4,      0xF},
 671     {"TPCI0",       0x3048, 5,      0x00},
 672     {"TPCI1",       0x3049, 5,      0x00},
 673     {"TPCI2",       0x304A, 5,      0x00},
 674     {"TPCI3",       0x304B, 5,      0x00},
 675
 676     {"ADCMSK",      0x3050, 21,     0x1FFFFF},
 677     {"ADCINB",      0x3051, 2,      0x2},
 678     {"ADCDAC",      0x3052, 5,      0x10},
 679     {"ADCPAR",      0x3053, 18,     0x195EF},
 680     {"ADCTST",      0x3054, 2,      0x0},
 681     {"SADCAZ",      0x3055, 1,      0x1},
 682
 683     {"FGF0",        0x3080, 9,      0x000},
 684     {"FGF1",        0x3081, 9,      0x000},
 685     {"FGF2",        0x3082, 9,      0x000},
 686     {"FGF3",        0x3083, 9,      0x000},
 687     {"FGF4",        0x3084, 9,      0x000},
 688     {"FGF5",        0x3085, 9,      0x000},
 689     {"FGF6",        0x3086, 9,      0x000},
 690     {"FGF7",        0x3087, 9,      0x000},
 691     {"FGF8",        0x3088, 9,      0x000},
 692     {"FGF9",        0x3089, 9,      0x000},
 693     {"FGF10",       0x308A, 9,      0x000},
 694     {"FGF11",       0x308B, 9,      0x000},
 695     {"FGF12",       0x308C, 9,      0x000},
 696     {"FGF13",       0x308D, 9,      0x000},
 697     {"FGF14",       0x308E, 9,      0x000},
 698     {"FGF15",       0x308F, 9,      0x000},
 699     {"FGF16",       0x3090, 9,      0x000},
 700     {"FGF17",       0x3091, 9,      0x000},
 701     {"FGF18",       0x3092, 9,      0x000},
 702     {"FGF19",       0x3093, 9,      0x000},
 703     {"FGF20",       0x3094, 9,      0x000},
 704
 705     {"FGA0",        0x30A0, 6,      0x00},
 706     {"FGA1",        0x30A1, 6,      0x00},
 707     {"FGA2",        0x30A2, 6,      0x00},
 708     {"FGA3",        0x30A3, 6,      0x00},
 709     {"FGA4",        0x30A4, 6,      0x00},
 710     {"FGA5",        0x30A5, 6,      0x00},
 711     {"FGA6",        0x30A6, 6,      0x00},
 712     {"FGA7",        0x30A7, 6,      0x00},
 713     {"FGA8",        0x30A8, 6,      0x00},
 714     {"FGA9",        0x30A9, 6,      0x00},
 715     {"FGA10",       0x30AA, 6,      0x00},
 716     {"FGA11",       0x30AB, 6,      0x00},
 717     {"FGA12",       0x30AC, 6,      0x00},
 718     {"FGA13",       0x30AD, 6,      0x00},
 719     {"FGA14",       0x30AE, 6,      0x00},
 720     {"FGA15",       0x30AF, 6,      0x00},
 721     {"FGA16",       0x30B0, 6,      0x00},
 722     {"FGA17",       0x30B1, 6,      0x00},
 723     {"FGA18",       0x30B2, 6,      0x00},
 724     {"FGA19",       0x30B3, 6,      0x00},
 725     {"FGA20",       0x30B4, 6,      0x00},
 726     // non-linearity table, 64 x 6 bits
 727     {"FLL00",       0x3100, 6,      0x00},
 728     {"FLL01",       0x3101, 6,      0x00},
 729     {"FLL02",       0x3102, 6,      0x00},
 730     {"FLL03",       0x3103, 6,      0x00},
 731     {"FLL04",       0x3104, 6,      0x00},
 732     {"FLL05",       0x3105, 6,      0x00},
 733     {"FLL06",       0x3106, 6,      0x00},
 734     {"FLL07",       0x3107, 6,      0x00},
 735     {"FLL08",       0x3108, 6,      0x00},
 736     {"FLL09",       0x3109, 6,      0x00},
 737     {"FLL0A",       0x310A, 6,      0x00},
 738     {"FLL0B",       0x310B, 6,      0x00},
 739     {"FLL0C",       0x310C, 6,      0x00},
 740     {"FLL0D",       0x310D, 6,      0x00},
 741     {"FLL0E",       0x310E, 6,      0x00},
 742     {"FLL0F",       0x310F, 6,      0x00},
 743     {"FLL10",       0x3110, 6,      0x00},
 744     {"FLL11",       0x3111, 6,      0x00},
 745     {"FLL12",       0x3112, 6,      0x00},
 746     {"FLL13",       0x3113, 6,      0x00},
 747     {"FLL14",       0x3114, 6,      0x00},
 748     {"FLL15",       0x3115, 6,      0x00},
 749     {"FLL16",       0x3116, 6,      0x00},
 750     {"FLL17",       0x3117, 6,      0x00},
 751     {"FLL18",       0x3118, 6,      0x00},
 752     {"FLL19",       0x3119, 6,      0x00},
 753     {"FLL1A",       0x311A, 6,      0x00},
 754     {"FLL1B",       0x311B, 6,      0x00},
 755     {"FLL1C",       0x311C, 6,      0x00},
 756     {"FLL1D",       0x311D, 6,      0x00},
 757     {"FLL1E",       0x311E, 6,      0x00},
 758     {"FLL1F",       0x311F, 6,      0x00},
 759     {"FLL20",       0x3120, 6,      0x00},
 760     {"FLL21",       0x3121, 6,      0x00},
 761     {"FLL22",       0x3122, 6,      0x00},
 762     {"FLL23",       0x3123, 6,      0x00},
 763     {"FLL24",       0x3124, 6,      0x00},
 764     {"FLL25",       0x3125, 6,      0x00},
 765     {"FLL26",       0x3126, 6,      0x00},
 766     {"FLL27",       0x3127, 6,      0x00},
 767     {"FLL28",       0x3128, 6,      0x00},
 768     {"FLL29",       0x3129, 6,      0x00},
 769     {"FLL2A",       0x312A, 6,      0x00},
 770     {"FLL2B",       0x312B, 6,      0x00},
 771     {"FLL2C",       0x312C, 6,      0x00},
 772     {"FLL2D",       0x312D, 6,      0x00},
 773     {"FLL2E",       0x312E, 6,      0x00},
 774     {"FLL2F",       0x312F, 6,      0x00},
 775     {"FLL30",       0x3130, 6,      0x00},
 776     {"FLL31",       0x3131, 6,      0x00},
 777     {"FLL32",       0x3132, 6,      0x00},
 778     {"FLL33",       0x3133, 6,      0x00},
 779     {"FLL34",       0x3134, 6,      0x00},
 780     {"FLL35",       0x3135, 6,      0x00},
 781     {"FLL36",       0x3136, 6,      0x00},
 782     {"FLL37",       0x3137, 6,      0x00},
 783     {"FLL38",       0x3138, 6,      0x00},
 784     {"FLL39",       0x3139, 6,      0x00},
 785     {"FLL3A",       0x313A, 6,      0x00},
 786     {"FLL3B",       0x313B, 6,      0x00},
 787     {"FLL3C",       0x313C, 6,      0x00},
 788     {"FLL3D",       0x313D, 6,      0x00},
 789     {"FLL3E",       0x313E, 6,      0x00},
 790     {"FLL3F",       0x313F, 6,      0x00},
 791     // end of non-lin table
 792     {"PASADEL",     0x3158, 8,      0xFF},
 793     {"PASAPHA",     0x3159, 6,      0x3F},
 794     {"PASAPRA",     0x315A, 6,      0x0F},
 795     {"PASADAC",     0x315B, 8,      0x80},
 796     {"PASACHM",     0x315C, 19,     0x7FFFF},
 797     {"PASASTL",     0x315D, 8,      0xFF},
 798     {"PASAPR1",     0x315E, 1,      0x0},
 799     {"PASAPR0",     0x315F, 1,      0x0},
 800     {"SADCTRG",     0x3161, 1,      0x0},
 801     {"SADCRUN",     0x3162, 1,      0x0},
 802     {"SADCPWR",     0x3163, 3,      0x7},
 803     {"L0TSIM",      0x3165, 14,     0x0050},
 804     {"SADCEC",      0x3166, 7,      0x00},
 805     {"SADCMC",      0x3170, 8,      0xC0},
 806     {"SADCOC",      0x3171, 8,      0x19},
 807     {"SADCGTB",     0x3172, 32,     0x37737700},
 808     {"SEBDEN",      0x3178, 3,      0x0},
 809     {"SEBDOU",      0x3179, 3,      0x0},
 810     // pos table, 128 x 5 bits
 811     {"TPL00",       0x3180, 5,      0x00},
 812     {"TPL01",       0x3181, 5,      0x00},
 813     {"TPL02",       0x3182, 5,      0x00},
 814     {"TPL03",       0x3183, 5,      0x00},
 815     {"TPL04",       0x3184, 5,      0x00},
 816     {"TPL05",       0x3185, 5,      0x00},
 817     {"TPL06",       0x3186, 5,      0x00},
 818     {"TPL07",       0x3187, 5,      0x00},
 819     {"TPL08",       0x3188, 5,      0x00},
 820     {"TPL09",       0x3189, 5,      0x00},
 821     {"TPL0A",       0x318A, 5,      0x00},
 822     {"TPL0B",       0x318B, 5,      0x00},
 823     {"TPL0C",       0x318C, 5,      0x00},
 824     {"TPL0D",       0x318D, 5,      0x00},
 825     {"TPL0E",       0x318E, 5,      0x00},
 826     {"TPL0F",       0x318F, 5,      0x00},
 827     {"TPL10",       0x3190, 5,      0x00},
 828     {"TPL11",       0x3191, 5,      0x00},
 829     {"TPL12",       0x3192, 5,      0x00},
 830     {"TPL13",       0x3193, 5,      0x00},
 831     {"TPL14",       0x3194, 5,      0x00},
 832     {"TPL15",       0x3195, 5,      0x00},
 833     {"TPL16",       0x3196, 5,      0x00},
 834     {"TPL17",       0x3197, 5,      0x00},
 835     {"TPL18",       0x3198, 5,      0x00},
 836     {"TPL19",       0x3199, 5,      0x00},
 837     {"TPL1A",       0x319A, 5,      0x00},
 838     {"TPL1B",       0x319B, 5,      0x00},
 839     {"TPL1C",       0x319C, 5,      0x00},
 840     {"TPL1D",       0x319D, 5,      0x00},
 841     {"TPL1E",       0x319E, 5,      0x00},
 842     {"TPL1F",       0x319F, 5,      0x00},
 843     {"TPL20",       0x31A0, 5,      0x00},
 844     {"TPL21",       0x31A1, 5,      0x00},
 845     {"TPL22",       0x31A2, 5,      0x00},
 846     {"TPL23",       0x31A3, 5,      0x00},
 847     {"TPL24",       0x31A4, 5,      0x00},
 848     {"TPL25",       0x31A5, 5,      0x00},
 849     {"TPL26",       0x31A6, 5,      0x00},
 850     {"TPL27",       0x31A7, 5,      0x00},
 851     {"TPL28",       0x31A8, 5,      0x00},
 852     {"TPL29",       0x31A9, 5,      0x00},
 853     {"TPL2A",       0x31AA, 5,      0x00},
 854     {"TPL2B",       0x31AB, 5,      0x00},
 855     {"TPL2C",       0x31AC, 5,      0x00},
 856     {"TPL2D",       0x31AD, 5,      0x00},
 857     {"TPL2E",       0x31AE, 5,      0x00},
 858     {"TPL2F",       0x31AF, 5,      0x00},
 859     {"TPL30",       0x31B0, 5,      0x00},
 860     {"TPL31",       0x31B1, 5,      0x00},
 861     {"TPL32",       0x31B2, 5,      0x00},
 862     {"TPL33",       0x31B3, 5,      0x00},
 863     {"TPL34",       0x31B4, 5,      0x00},
 864     {"TPL35",       0x31B5, 5,      0x00},
 865     {"TPL36",       0x31B6, 5,      0x00},
 866     {"TPL37",       0x31B7, 5,      0x00},
 867     {"TPL38",       0x31B8, 5,      0x00},
 868     {"TPL39",       0x31B9, 5,      0x00},
 869     {"TPL3A",       0x31BA, 5,      0x00},
 870     {"TPL3B",       0x31BB, 5,      0x00},
 871     {"TPL3C",       0x31BC, 5,      0x00},
 872     {"TPL3D",       0x31BD, 5,      0x00},
 873     {"TPL3E",       0x31BE, 5,      0x00},
 874     {"TPL3F",       0x31BF, 5,      0x00},
 875     {"TPL40",       0x31C0, 5,      0x00},
 876     {"TPL41",       0x31C1, 5,      0x00},
 877     {"TPL42",       0x31C2, 5,      0x00},
 878     {"TPL43",       0x31C3, 5,      0x00},
 879     {"TPL44",       0x31C4, 5,      0x00},
 880     {"TPL45",       0x31C5, 5,      0x00},
 881     {"TPL46",       0x31C6, 5,      0x00},
 882     {"TPL47",       0x31C7, 5,      0x00},
 883     {"TPL48",       0x31C8, 5,      0x00},
 884     {"TPL49",       0x31C9, 5,      0x00},
 885     {"TPL4A",       0x31CA, 5,      0x00},
 886     {"TPL4B",       0x31CB, 5,      0x00},
 887     {"TPL4C",       0x31CC, 5,      0x00},
 888     {"TPL4D",       0x31CD, 5,      0x00},
 889     {"TPL4E",       0x31CE, 5,      0x00},
 890     {"TPL4F",       0x31CF, 5,      0x00},
 891     {"TPL50",       0x31D0, 5,      0x00},
 892     {"TPL51",       0x31D1, 5,      0x00},
 893     {"TPL52",       0x31D2, 5,      0x00},
 894     {"TPL53",       0x31D3, 5,      0x00},
 895     {"TPL54",       0x31D4, 5,      0x00},
 896     {"TPL55",       0x31D5, 5,      0x00},
 897     {"TPL56",       0x31D6, 5,      0x00},
 898     {"TPL57",       0x31D7, 5,      0x00},
 899     {"TPL58",       0x31D8, 5,      0x00},
 900     {"TPL59",       0x31D9, 5,      0x00},
 901     {"TPL5A",       0x31DA, 5,      0x00},
 902     {"TPL5B",       0x31DB, 5,      0x00},
 903     {"TPL5C",       0x31DC, 5,      0x00},
 904     {"TPL5D",       0x31DD, 5,      0x00},
 905     {"TPL5E",       0x31DE, 5,      0x00},
 906     {"TPL5F",       0x31DF, 5,      0x00},
 907     {"TPL60",       0x31E0, 5,      0x00},
 908     {"TPL61",       0x31E1, 5,      0x00},
 909     {"TPL62",       0x31E2, 5,      0x00},
 910     {"TPL63",       0x31E3, 5,      0x00},
 911     {"TPL64",       0x31E4, 5,      0x00},
 912     {"TPL65",       0x31E5, 5,      0x00},
 913     {"TPL66",       0x31E6, 5,      0x00},
 914     {"TPL67",       0x31E7, 5,      0x00},
 915     {"TPL68",       0x31E8, 5,      0x00},
 916     {"TPL69",       0x31E9, 5,      0x00},
 917     {"TPL6A",       0x31EA, 5,      0x00},
 918     {"TPL6B",       0x31EB, 5,      0x00},
 919     {"TPL6C",       0x31EC, 5,      0x00},
 920     {"TPL6D",       0x31ED, 5,      0x00},
 921     {"TPL6E",       0x31EE, 5,      0x00},
 922     {"TPL6F",       0x31EF, 5,      0x00},
 923     {"TPL70",       0x31F0, 5,      0x00},
 924     {"TPL71",       0x31F1, 5,      0x00},
 925     {"TPL72",       0x31F2, 5,      0x00},
 926     {"TPL73",       0x31F3, 5,      0x00},
 927     {"TPL74",       0x31F4, 5,      0x00},
 928     {"TPL75",       0x31F5, 5,      0x00},
 929     {"TPL76",       0x31F6, 5,      0x00},
 930     {"TPL77",       0x31F7, 5,      0x00},
 931     {"TPL78",       0x31F8, 5,      0x00},
 932     {"TPL79",       0x31F9, 5,      0x00},
 933     {"TPL7A",       0x31FA, 5,      0x00},
 934     {"TPL7B",       0x31FB, 5,      0x00},
 935     {"TPL7C",       0x31FC, 5,      0x00},
 936     {"TPL7D",       0x31FD, 5,      0x00},
 937     {"TPL7E",       0x31FE, 5,      0x00},
 938     {"TPL7F",       0x31FF, 5,      0x00},
 939     // end of pos table
 940     {"MEMRW",       0xD000, 7,      0x79},
 941     {"MEMCOR",      0xD001, 9,      0x000},
 942     {"DMDELA",      0xD002, 4,      0x8},
 943     {"DMDELS",      0xD003, 4,      0x8}
 944   };
 945
 946   const CmdRegs cmdReg[N_CMD] = {
 947     // Name      Address
 948     {"SMCMD"   , 0x0A04},
 949     {"SMOFFON" , 0x0A05},
 950     {"SMON"    , 0x0A06},
 951     {"SMOFF"   , 0x0A07},
 952     {"CPU0SS"  , 0x0A21},
 953     {"CPU1SS"  , 0x0A23},
 954     {"CPU2SS"  , 0x0A25},
 955     {"CPU3SS"  , 0x0A27},
 956     {"NICLKSS" , 0x0A29},
 957     {"FILCLKSS", 0x0A2B},
 958     {"PRECLKSS", 0x0A2D},
 959     {"ADCENSS" , 0x0A2F},
 960     {"NIODESS" , 0x0A31},
 961     {"NIOCESS" , 0x0A33},
 962     {"NIIDESS" , 0x0A35},
 963     {"NIICESS" , 0x0A37}
 964   };
 965
 966   const CmdRegs roReg[N_RO] = {
 967     // NI
 968     {"NCTRL"  , 0x0DC0},
 969     {"NFE"    , 0x0DC1},
 970     {"NFSM"   , 0x0DC2},
 971     // event buffer parity violation counters
 972     {"EBP0"   , 0x3010},
 973     {"EBP1"   , 0x3011},
 974     {"EBP2"   , 0x3012},
 975     {"EBP3"   , 0x3013},
 976     // slow ADC
 977     {"SADCC0" , 0x3168},
 978     {"SADCC1" , 0x3169},
 979     {"SADCC2" , 0x316A},
 980     {"SADCC3" , 0x316B},
 981     {"SADCC4" , 0x316C},
 982     {"SADCC5" , 0x316D},
 983     {"SADCC6" , 0x316E},
 984     {"SADCC7" , 0x316F},
 985     // hamming counters
 986     {"HCNTI0" , 0xD010},
 987     {"HCNTI1" , 0xD011},
 988     {"HCNTI2" , 0xD012},
 989     {"HCNTI3" , 0xD013},
 990     {"HCNTD0" , 0xD014},
 991     {"HCNTD1" , 0xD015},
 992     {"HCNTD2" , 0xD016},
 993     {"HCNTD3" , 0xD017},
 994
 995     {"CHIPID" , 0x3160},
 996
 997     {"SEBDIN" , 0x317A}
 998   };
 999
1000
1001   for (Int_t i = 0; i < N_REGS; i++) {
1002      fTrapReg[i] = trapReg[i];
1003   }
1004   for (Int_t i = 0; i < N_CMD; i++) {
1005      fCmdReg[i] = cmdReg[i];
1006   }
1007   for (Int_t i = 0; i < N_RO; i++) {
1008      fRoReg[i] = roReg[i];
1009   }
1010
1011   return kTRUE;
1012 }