virtual Int_t GetAnode() const {return fCoord1;}
virtual Int_t GetTime() const {return fCoord2;}
virtual Int_t GetChannel() const {return fChannel;}
virtual Int_t GetAnode() const {return fCoord1;}
virtual Int_t GetTime() const {return fCoord2;}
virtual Int_t GetChannel() const {return fChannel;}
- virtual void SetDDLModuleMap(AliITSDDLModuleMapSDD* ddlsdd){fDDLModuleMap->SetDDLMap(ddlsdd);}
+ virtual void SetADCEncoded(Bool_t fl=kTRUE){
+ fADCEncoded=fl;
+ }
+ virtual void SetDDLModuleMap(AliITSDDLModuleMapSDD* ddlsdd){
+ if(!fDDLModuleMap) fDDLModuleMap=new AliITSDDLModuleMapSDD();
+ fDDLModuleMap->SetDDLMap(ddlsdd);
+ }
virtual void SetZeroSuppLowThreshold(Int_t iMod, Int_t iSid, Int_t th)
{fLowThresholdArray[iMod][iSid]=th;}
Int_t GetModuleNumber(UInt_t iDDL, UInt_t iModule) const {
virtual void SetZeroSuppLowThreshold(Int_t iMod, Int_t iSid, Int_t th)
{fLowThresholdArray[iMod][iSid]=th;}
Int_t GetModuleNumber(UInt_t iDDL, UInt_t iModule) const {
AliITSDDLModuleMapSDD* fDDLModuleMap; // mapping DDL/module -> module number
UInt_t fData; // data read for file
Int_t fCarlosId; // carlos ID
AliITSDDLModuleMapSDD* fDDLModuleMap; // mapping DDL/module -> module number
UInt_t fData; // data read for file
Int_t fCarlosId; // carlos ID
Int_t fJitter; // jitter between L0 and pascal stop (x25ns)
Int_t fLowThresholdArray[kSDDModules][2]; // array with low thresholds for all modules
Int_t fJitter; // jitter between L0 and pascal stop (x25ns)
Int_t fLowThresholdArray[kSDDModules][2]; // array with low thresholds for all modules
- Int_t fDDL; //current ddl number
+ Int_t fDDL; // current ddl number
+ Bool_t fADCEncoded; // flag for data format
+ // kTRUE -> ADC encoded in 5+3 bits
+ // kFALSE -> ADC decoded (8 bits)