AliITSRawStream(rawReader),
fDDLModuleMap(0),
fData(0),
+fResetSkip(kTRUE),
fEventId(0),
fCarlosId(-1),
fChannel(0),
fLowThresholdArray[im][1]=0;
}
for(Int_t i=0;i<kFifoWords;i++) fNfifo[i]=0;
- for(Int_t i=0;i<kDDLsNumber;i++) fSkip[i]=0;
fRawReader->Reset();
fRawReader->Select("ITSSDD");
AliITSRawStream(rs.fRawReader),
fDDLModuleMap(rs.fDDLModuleMap),
fData(0),
+fResetSkip(kTRUE),
fEventId(0),
fCarlosId(-1),
fChannel(0),
{
// read the next raw digit
// returns kFALSE if there is no digit left
-// returns kTRUE and fCompletedModule=kFALSE when a digit is found
-// returns kTRUE and fCompletedModule=kTRUE when a module is completed (=3x3FFFFFFF footer words)
+// returns kTRUE and fCompletedModule=kFALSE and fCompletedDDL=kFALSE when a digit is found
+// returns kTRUE and fCompletedModule=kTRUE and fCompletedDDL=kFALSE when a module is completed (=3x3FFFFFFF footer words)
+// returns kTRUE and fCompletedModule=kFALSE and fCompletedDDL=kTRUE when a DDL is completed (=jitter word)
fPrevModuleID = fModuleID;
fCompletedModule=kFALSE;
while (kTRUE) {
-
+ if(fResetSkip){
+ Reset();
+ Bool_t kSkip = SkipHeaderWord();
+ if(!kSkip) return kSkip;
+ fResetSkip=kFALSE;
+ }
if ((fChannel < 0) || (fCarlosId < 0) || (fChannel >= 2) || (fCarlosId >= kModulesPerDDL) || (fLastBit[fCarlosId][fChannel] < fReadBits[fCarlosId][fChannel]) ) {
if (!fRawReader->ReadNextInt(fData)) return kFALSE; // read next word
if((fData >> 16) == 0x7F00){ // jitter word
- Reset();
- Bool_t kSkip = SkipHeaderWord();
- if(!kSkip) return kSkip;
- continue;
- }
+ fJitter = fData&0x000000ff;
+ fResetSkip=kTRUE;
+ fCompletedModule=kFALSE;
+ fCompletedDDL=kTRUE;
+ return kTRUE;
+ }
UInt_t nData28= fData >> 28;
UInt_t nData30= fData >> 30;
fICountFoot[fCarlosId]++; // stop before the last word (last word=jitter)
if(fICountFoot[fCarlosId]==3){
fCompletedModule=kTRUE;
+ fCompletedDDL=kFALSE;
return kTRUE;
}
} else if(fData==0x3F1F1F1F){ // CarlosRX footer
fCoord1 = fAnode[fCarlosId][fChannel];
fCoord2 = fTimeBin[fCarlosId][fChannel];
fTimeBin[fCarlosId][fChannel]++;
+ fCompletedModule=kFALSE;
+ fCompletedDDL=kFALSE;
return kTRUE;
}
}