// 0 - //
// //
// Plus 2 types of control words: //
-// - DDL identifier with the 4 more significant bits = 1000 //
+// - Jitter word = 1000 //
// - End of module data (needed by the Cluster Finder) = 1111 //
// //
// Origin: F.Prino, Torino, prino@to.infn.it //
fDDL(0)
{
// create an object to read ITS SDD raw digits
- fDDLModuleMap=new AliITSDDLModuleMapSDD();
- fDDLModuleMap->SetDefaultMap();
for(Int_t im=0;im<kSDDModules;im++){
fLowThresholdArray[im][0]=0;
fLowThresholdArray[im][1]=0;
}
+//______________________________________________________________________
+Int_t AliITSRawStreamSDDCompressed::DecompAmbra(Int_t value) const
+{
+ // AMBRA decompression (from 8 to 10 bit)
+
+ if ((value & 0x80) == 0) {
+ return value & 0x7f;
+ } else if ((value & 0x40) == 0) {
+ return 0x081 + ((value & 0x3f) << 1);
+ } else if ((value & 0x20) == 0) {
+ return 0x104 + ((value & 0x1f) << 3);
+ } else {
+ return 0x208 + ((value & 0x1f) << 4);
+ }
+
+}
//______________________________________________________________________
Bool_t AliITSRawStreamSDDCompressed::Next()
{
// read the next raw digit
// returns kFALSE if there is no digit left
-// returns kTRUE and fCompletedModule=kFALSE when a digit is found
-// returns kTRUE and fCompletedModule=kTRUE when a module is completed
-
- fDDL=fRawReader->GetDDLID();
- Int_t ddln = fRawReader->GetDDLID();
- if(ddln <0) ddln=0;
- fCompletedModule=kFALSE;
- UInt_t masksod=8; // start of DDL has the 4 most significant bits = 1000
+// returns kTRUE and fCompletedModule=kFALSE and fCompletedDDL=kFALSE when a digit is found
+// returns kTRUE and fCompletedModule=kTRUE and fCompletedDDL=kFALSE when a module is completed (=3x3FFFFFFF footer words)
+// returns kTRUE and fCompletedModule=kFALSE and fCompletedDDL=kTRUE when a DDL is completed (=jitter word)
+
+
+ UInt_t maskjit=8; // Jitter word has the 4 most significant bits = 1000
UInt_t maskeom=15; // end of module has the 4 most significant bits = 1111
UInt_t maskmod=15; // last 4 bits for module number in end of module word
- UInt_t maskDDL=0xFF; // last 8 bits for DDL number in start of DDL word
-
+ // UInt_t maskDDL=0xFF; // last 8 bits for DDL number in start of DDL word
+
UInt_t maskCarlos=15<<27; // 4 bits (27-30) for CarlosId in data word
UInt_t maskSide=1<<26; // 1 bit (26) for side in data word
UInt_t maskAnode=255<<18; // 8 bits (18-25) for Nanode in data word
UInt_t maskTb=255<<10; // 8 bits (10-27) for Ntimebin in data word
UInt_t maskADC=1023; // 10 bits (0-9) for ADC in data word
-
- if (!fRawReader->ReadNextInt(fData)) return kFALSE; // read next word
-
- UInt_t mostsigbits=fData>>28;
- if(mostsigbits==masksod){
- fDDL=fData&maskDDL;
- }else if(mostsigbits==maskeom){
- fCarlosId=fData&maskmod;
- fModuleID = GetModuleNumber(fDDL,fCarlosId);
- fCompletedModule=kTRUE;
- return kTRUE;
- }else{
- fCarlosId=(fData&maskCarlos)>>27;
- fModuleID = GetModuleNumber(fDDL,fCarlosId);
- fChannel=(fData&maskSide)>>26;
- fCoord1=(fData&maskAnode)>>18;
- fCoord2=(fData&maskTb)>>10;
- fSignal=fData&maskADC;
- fSignal+=fLowThresholdArray[fModuleID-kSPDModules][fChannel];
- fCompletedModule=kFALSE;
- return kTRUE;
+
+ while(kTRUE){
+ if (!fRawReader->ReadNextInt(fData)) return kFALSE; // read next word
+ UInt_t mostsigbits=fData>>28;
+ if(mostsigbits==maskeom){
+ fCarlosId=fData&maskmod;
+ fDDL=fRawReader->GetDDLID();
+ fModuleID = GetModuleNumber(fDDL,fCarlosId);
+ fCompletedDDL=kFALSE;
+ fCompletedModule=kTRUE;
+ return kTRUE;
+ } else if(mostsigbits==maskjit){
+ fJitter = fData&0x000000ff;
+ fCompletedModule=kFALSE;
+ fCompletedDDL=kTRUE;
+ return kTRUE;
+ }else{
+ fCarlosId=(fData&maskCarlos)>>27;
+ fDDL=fRawReader->GetDDLID();
+ fModuleID = GetModuleNumber(fDDL,fCarlosId);
+ fChannel=(fData&maskSide)>>26;
+ fCoord1=(fData&maskAnode)>>18;
+ fCoord2=(fData&maskTb)>>10;
+ Int_t sig8bit=fData&maskADC;
+ sig8bit+=fLowThresholdArray[fModuleID-kSPDModules][fChannel];
+ fSignal=DecompAmbra(sig8bit);
+ fCompletedModule=kFALSE;
+ fCompletedDDL=kFALSE;
+ return kTRUE;
+ }
}
return kFALSE;
}