#ifndef ALITRDTRAPCONFIG_H\r
#define ALITRDTRAPCONFIG_H\r
+/* Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *
+ * See cxx source for full Copyright notice */
+
+//
+// Class holding the configuration of the tracklet processor
+// in the TRD FEE
+//
+
\r
#include <TObject.h>\r
#include <TString.h>\r
kDMDELS, \r
kLastReg }; // enum of all TRAP registers, to be used for access to them\r
\r
- inline const char* GetRegName(TrapReg_t reg) { return fRegs[reg].name.Data(); }\r
- inline UShort_t GetRegAddress(TrapReg_t reg) { return fRegs[reg].addr; }\r
- inline UShort_t GetRegNBits(TrapReg_t reg) { return fRegs[reg].nbits; }\r
- inline UInt_t GetRegResetValue(TrapReg_t reg) { return fRegs[reg].res_val; }\r
+ const char* GetRegName(TrapReg_t reg) const { return fRegs[reg].fName.Data(); }\r
+ UShort_t GetRegAddress(TrapReg_t reg) const { return fRegs[reg].fAddr; }\r
+ UShort_t GetRegNBits(TrapReg_t reg) const { return fRegs[reg].fNbits; }\r
+ UInt_t GetRegResetValue(TrapReg_t reg) const { return fRegs[reg].fResetValue; }\r
\r
- TrapReg_t GetRegByAddress(Int_t address);\r
+ TrapReg_t GetRegByAddress(Int_t address) const;\r
\r
Int_t GetTrapReg(TrapReg_t reg, Int_t det = -1, Int_t rob = -1, Int_t mcm = -1);\r
Bool_t PrintTrapReg(TrapReg_t reg, Int_t det = -1, Int_t rob = -1, Int_t mcm = -1);\r
Bool_t SetTrapReg(TrapReg_t reg, Int_t value, Int_t det);\r
Bool_t SetTrapReg(TrapReg_t reg, Int_t value, Int_t det, Int_t rob, Int_t mcm);\r
\r
+ void InitRegs();\r
void ResetRegs();\r
\r
Bool_t LoadConfig();\r
static AliTRDtrapConfig *fgInstance; // pointer to instance (singleton)\r
\r
struct SimpleReg_t {\r
- TString name; // Name of the register\r
- UShort_t addr; // Address in GIO of TRAP\r
- UShort_t nbits; // Number of bits, from 1 to 32\r
- UInt_t res_val; // reset value\r
+ TString fName; // Name of the register\r
+ UShort_t fAddr; // Address in GIO of TRAP\r
+ UShort_t fNbits; // Number of bits, from 1 to 32\r
+ UInt_t fResetValue; // reset value\r
SimpleReg_t(char *nnn = 0, UShort_t a = 0, UShort_t n = 0, UInt_t r = 0) : \r
- name(nnn), addr(a), nbits(n), res_val(r) {}\r
+ fName(nnn), fAddr(a), fNbits(n), fResetValue(r) {}\r
};\r
\r
struct RegValue_t {\r
kInvalid = 0,\r
kGlobal,\r
kIndividual\r
- } state;\r
+ } state; // mode of storage (global or per MCM)\r
union {\r
Int_t globalValue;\r
Int_t *individualValue;\r
RegValue_t fRegisterValue[kLastReg]; // array of TRAP register values in use\r
\r
Bool_t AddValues(UInt_t det, UInt_t cmd, UInt_t extali, UInt_t addr, UInt_t data);\r
- Short_t GetRobAB( UShort_t robsel, UShort_t linkpair ); // Converts the ROB part of the extended ALICE ID to robs\r
+ Short_t GetRobAB( UShort_t robsel, UShort_t linkpair ) const; // Converts the ROB part of the extended ALICE ID to robs\r
Short_t ChipmaskToMCMlist( Int_t cmA, Int_t cmB, UShort_t linkpair ); // Converts the chipmask to a list of MCMs \r
\r
static const UInt_t fgkScsnCmdWrite=10; // Command number for the write command \r
static const Int_t fgkMaxLinkPairs=4; // number of linkpairs used during configuration\r
static const Int_t fgkMaxMcm; // max. no. of MCMs to be treated\r
- static const Int_t fMcmlistSize=256; // list of MCMs to which a value has to be written\r
+ static const Int_t fgkMcmlistSize=256; // list of MCMs to which a value has to be written\r
\r
- Int_t fMcmlist[fMcmlistSize]; // stores the list of MCMs after the conversion from extAliID -> AliID\r
+ Int_t fMcmlist[fgkMcmlistSize]; // stores the list of MCMs after the conversion from extAliID -> AliID\r
\r
AliTRDtrapConfig(); // private constructor due to singleton implementation\r
\r
kDBankSCSNData };\r
*/\r
\r
+
+ private:
+ AliTRDtrapConfig& operator=(const AliTRDtrapConfig &rhs); // not implemented
+ AliTRDtrapConfig(const AliTRDtrapConfig& cfg); // not implemented
+
ClassDef(AliTRDtrapConfig, 2);\r
};\r
\r