#include "AliTRDtrapConfigHandler.h"
#include <iostream>
+#include <sstream>
#include <iomanip>
#include "AliLog.h"
+#include "AliTRDfeeParam.h"
#include "AliTRDtrapConfig.h"
+#include "AliTRDmcmSim.h"
#include "AliTRDgeometry.h"
#include "AliTRDcalibDB.h"
#include "TGeoMatrix.h"
#include "TGraph.h"
-using namespace std;
+#include "Cal/AliTRDCalOnlineGainTable.h"
+#include "Cal/AliTRDCalOnlineGainTableROC.h"
+#include "Cal/AliTRDCalOnlineGainTableMCM.h"
-ClassImp(AliTRDtrapConfigHandler)
+using namespace std;
-AliTRDtrapConfigHandler::AliTRDtrapConfigHandler() :
+AliTRDtrapConfigHandler::AliTRDtrapConfigHandler(AliTRDtrapConfig *cfg) :
ltuParam()
- , fDet(0)
, fRestrictiveMask((0x3ffff << 11) | (0x1f << 6) | 0x3f)
+ , fTrapConfig(cfg)
+ , fGtbl()
{
}
}
+void AliTRDtrapConfigHandler::Init()
+{
+ if (!fTrapConfig) {
+ AliError("No TRAPconfig given");
+ return;
+ }
+
+ // setup of register allocation
+ // I/O configuration which we don't care about
+ fTrapConfig->SetTrapRegAlloc(AliTRDtrapConfig::kSEBDOU, AliTRDtrapConfig::kAllocNone);
+ // position look-up table by layer
+ for (Int_t iBin = 0; iBin < 128; iBin++)
+ fTrapConfig->SetTrapRegAlloc((AliTRDtrapConfig::TrapReg_t) (AliTRDtrapConfig::kTPL00 + iBin), AliTRDtrapConfig::kAllocByLayer);
+ // ... individual
+ fTrapConfig->SetTrapRegAlloc(AliTRDtrapConfig::kC14CPUA, AliTRDtrapConfig::kAllocByMCM);
+ fTrapConfig->SetTrapRegAlloc(AliTRDtrapConfig::kC15CPUA, AliTRDtrapConfig::kAllocByMCM);
+
+ // setup of DMEM allocation
+ for(Int_t iAddr = AliTRDtrapConfig::fgkDmemStartAddress;
+ iAddr < (AliTRDtrapConfig::fgkDmemWords + AliTRDtrapConfig::fgkDmemStartAddress); iAddr++) {
+
+ if(iAddr == AliTRDmcmSim::fgkDmemAddrDeflCorr)
+ fTrapConfig->SetDmemAlloc(iAddr, AliTRDtrapConfig::kAllocByMCMinSM);
+
+ else if(iAddr == AliTRDmcmSim::fgkDmemAddrNdrift)
+ fTrapConfig->SetDmemAlloc(iAddr, AliTRDtrapConfig::kAllocByDetector);
+
+ else if((iAddr >= AliTRDmcmSim::fgkDmemAddrDeflCutStart) && (iAddr <= AliTRDmcmSim::fgkDmemAddrDeflCutEnd))
+ fTrapConfig->SetDmemAlloc(iAddr, AliTRDtrapConfig::kAllocByMCMinSM);
+
+ else if((iAddr >= AliTRDmcmSim::fgkDmemAddrTrackletStart) && (iAddr <= AliTRDmcmSim::fgkDmemAddrTrackletEnd))
+ fTrapConfig->SetDmemAlloc(iAddr, AliTRDtrapConfig::kAllocByMCM);
+
+ else if((iAddr >= AliTRDmcmSim::fgkDmemAddrLUTStart) && (iAddr <= AliTRDmcmSim::fgkDmemAddrLUTEnd))
+ fTrapConfig->SetDmemAlloc(iAddr, AliTRDtrapConfig::kAllocGlobal);
+
+ else if(iAddr == AliTRDmcmSim::fgkDmemAddrLUTcor0)
+ fTrapConfig->SetDmemAlloc(iAddr, AliTRDtrapConfig::kAllocByMCMinSM);
+
+ else if(iAddr == AliTRDmcmSim::fgkDmemAddrLUTcor1)
+ fTrapConfig->SetDmemAlloc(iAddr, AliTRDtrapConfig::kAllocByMCMinSM);
+
+ else if(iAddr == AliTRDmcmSim::fgkDmemAddrLUTnbins)
+ fTrapConfig->SetDmemAlloc(iAddr, AliTRDtrapConfig::kAllocGlobal);
+
+ else if(iAddr == AliTRDmcmSim::fgkDmemAddrLUTLength)
+ fTrapConfig->SetDmemAlloc(iAddr, AliTRDtrapConfig::kAllocGlobal);
+
+ else
+ fTrapConfig->SetDmemAlloc(iAddr, AliTRDtrapConfig::kAllocGlobal);
+ }
+}
+
void AliTRDtrapConfigHandler::ResetMCMs()
{
//
// Reset all MCM registers and DMEM
//
- AliTRDtrapConfig *cfg = AliTRDtrapConfig::Instance();
- cfg->ResetRegs();
- cfg->ResetDmem();
+ if (!fTrapConfig) {
+ AliError("No TRAPconfig given");
+ return;
+ }
+
+ fTrapConfig->ResetRegs();
+ fTrapConfig->ResetDmem();
}
// for a detailed description of the registers see the TRAP manual
// if you want to resimulate tracklets on real data use the appropriate config instead
- AliTRDtrapConfig *cfg = AliTRDtrapConfig::Instance();
-
- // HC header configuration bits
- cfg->SetTrapReg(AliTRDtrapConfig::kC15CPUA, 0x2102); // zs, deh
-
- // no. of timebins
- cfg->SetTrapReg(AliTRDtrapConfig::kC13CPUA, 24);
-
- // pedestal filter
- cfg->SetTrapReg(AliTRDtrapConfig::kFPNP, 4*10);
- cfg->SetTrapReg(AliTRDtrapConfig::kFPTC, 0);
- cfg->SetTrapReg(AliTRDtrapConfig::kFPBY, 0); // bypassed!
-
- // gain filter
- for (Int_t adc = 0; adc < 20; adc++) {
- cfg->SetTrapReg(AliTRDtrapConfig::TrapReg_t(AliTRDtrapConfig::kFGA0+adc), 40);
- cfg->SetTrapReg(AliTRDtrapConfig::TrapReg_t(AliTRDtrapConfig::kFGF0+adc), 15);
+ if (!fTrapConfig) {
+ AliError("No TRAPconfig given");
+ return -1;
}
- cfg->SetTrapReg(AliTRDtrapConfig::kFGTA, 20);
- cfg->SetTrapReg(AliTRDtrapConfig::kFGTB, 2060);
- cfg->SetTrapReg(AliTRDtrapConfig::kFGBY, 0); // bypassed!
-
- // tail cancellation
- cfg->SetTrapReg(AliTRDtrapConfig::kFTAL, 200);
- cfg->SetTrapReg(AliTRDtrapConfig::kFTLL, 0);
- cfg->SetTrapReg(AliTRDtrapConfig::kFTLS, 200);
- cfg->SetTrapReg(AliTRDtrapConfig::kFTBY, 0);
-
- // tracklet calculation
- cfg->SetTrapReg(AliTRDtrapConfig::kTPQS0, 5);
- cfg->SetTrapReg(AliTRDtrapConfig::kTPQE0, 10);
- cfg->SetTrapReg(AliTRDtrapConfig::kTPQS1, 11);
- cfg->SetTrapReg(AliTRDtrapConfig::kTPQE1, 20);
- cfg->SetTrapReg(AliTRDtrapConfig::kTPFS, 5);
- cfg->SetTrapReg(AliTRDtrapConfig::kTPFE, 20);
- cfg->SetTrapReg(AliTRDtrapConfig::kTPVBY, 0);
- cfg->SetTrapReg(AliTRDtrapConfig::kTPVT, 10);
- cfg->SetTrapReg(AliTRDtrapConfig::kTPHT, 150);
- cfg->SetTrapReg(AliTRDtrapConfig::kTPFP, 40);
- cfg->SetTrapReg(AliTRDtrapConfig::kTPCL, 1);
- cfg->SetTrapReg(AliTRDtrapConfig::kTPCT, 10);
+ // prepare ltuParam
// ndrift (+ 5 binary digits)
ltuParam.SetNtimebins(20 << 5);
- ConfigureNTimebins();
-
// deflection + tilt correction
ltuParam.SetRawOmegaTau(0.16133);
- ConfigureDyCorr();
-
// deflection range table
ltuParam.SetRawPtMin(0.1);
- ConfigureDRange();
-
- // hit position LUT
- // reset values
- const UShort_t lutPos[128] = {
- 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15,
- 16, 16, 16, 17, 17, 18, 18, 19, 19, 19, 20, 20, 20, 21, 21, 22, 22, 22, 23, 23, 23, 24, 24, 24, 24, 25, 25, 25, 26, 26, 26, 26,
- 27, 27, 27, 27, 27, 27, 27, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 27, 27, 27, 27, 26,
- 26, 26, 26, 25, 25, 25, 24, 24, 23, 23, 22, 22, 21, 21, 20, 20, 19, 18, 18, 17, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 7};
- for (Int_t iCOG = 0; iCOG < 128; iCOG++)
- cfg->SetTrapReg((AliTRDtrapConfig::TrapReg_t) (AliTRDtrapConfig::kTPL00 + iCOG), lutPos[iCOG]);
+ // magnetic field
+ ltuParam.SetRawMagField(0.0);
+ // scaling factors for q0, q1
+ ltuParam.SetRawScaleQ0(0);
+ ltuParam.SetRawScaleQ1(0);
+ // disable length correction and tilting correction
+ ltuParam.SetRawLengthCorrectionEnable(kFALSE);
+ ltuParam.SetRawTiltCorrectionEnable(kFALSE);
+
+ for (Int_t iDet = 0; iDet < 540; iDet++) {
+ // HC header configuration bits
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kC15CPUA, 0x2102, iDet); // zs, deh
+
+ // no. of timebins
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kC13CPUA, 24, iDet);
+
+ // pedestal filter
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kFPNP, 4*10, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kFPTC, 0, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kFPBY, 0, iDet); // bypassed!
+
+ // gain filter
+ for (Int_t adc = 0; adc < 20; adc++) {
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::TrapReg_t(AliTRDtrapConfig::kFGA0+adc), 40, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::TrapReg_t(AliTRDtrapConfig::kFGF0+adc), 15, iDet);
+ }
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kFGTA, 20, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kFGTB, 2060, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kFGBY, 0, iDet); // bypassed!
+
+ // tail cancellation
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kFTAL, 200, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kFTLL, 0, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kFTLS, 200, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kFTBY, 0, iDet);
+
+ // tracklet calculation
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPQS0, 5, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPQE0, 10, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPQS1, 11, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPQE1, 20, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPFS, 5, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPFE, 20, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPVBY, 0, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPVT, 10, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPHT, 150, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPFP, 40, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPCL, 1, iDet);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kTPCT, 10, iDet);
+
+ // apply ltuParams
+ ConfigureDyCorr(iDet);
+ ConfigureDRange(iDet); // deflection range
+ ConfigureNTimebins(iDet); // timebins in the drift region
+ ConfigurePIDcorr(iDet); // scaling parameters for the PID
+
+ // event buffer
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kEBSF, 1, iDet); // 0: store filtered; 1: store unfiltered
+
+ // zs applied to data stored in event buffer (sel. by EBSF)
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kEBIS, 15 << 2, iDet); // single indicator threshold (plus two digits)
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kEBIT, 30 << 2, iDet); // sum indicator threshold (plus two digits)
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kEBIL, 0xf0, iDet); // lookup table
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kEBIN, 0, iDet); // neighbour sensitivity
+
+ // raw data
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kNES, (0x0000 << 16) | 0x1000, iDet);
+ }
+
+ // ****** hit position LUT
// now calculate it from PRF
AliTRDcalibDB *cal = AliTRDcalibDB::Instance();
Double_t padResponseR[3]; // pad response left, central, right
Double_t padResponseL[3]; // pad response left, central, right
- for (Int_t iBin = 0; iBin < 128; iBin++)
- cfg->SetTrapReg((AliTRDtrapConfig::TrapReg_t) (AliTRDtrapConfig::kTPL00 + iBin), 0, 0, 0, 0);
-
for (Int_t iLayer = 0; iLayer < 6; iLayer++) {
TGraph gr(128);
for (Int_t iBin = 0; iBin < 256*0.5; iBin++) {
gr.SetPoint(iBin, (0.5 * (padResponseR[1] - padResponseL[1])/padResponse[1] * 256), iBin);
}
for (Int_t iBin = 0; iBin < 128; iBin++) {
- Int_t corr = gr.Eval(iBin) - iBin;
+ Int_t corr = (Int_t) (gr.Eval(iBin)) - iBin;
if (corr < 0)
corr = 0;
else if (corr > 31)
corr = 31;
for (Int_t iStack = 0; iStack < 540/6; iStack++) {
- cfg->SetTrapReg((AliTRDtrapConfig::TrapReg_t) (AliTRDtrapConfig::kTPL00 + iBin), corr, 6*iStack + iLayer);
+ fTrapConfig->SetTrapReg((AliTRDtrapConfig::TrapReg_t) (AliTRDtrapConfig::kTPL00 + iBin), corr, 6*iStack + iLayer);
}
}
}
-
- // event buffer
- cfg->SetTrapReg(AliTRDtrapConfig::kEBSF, 1); // 0: store filtered; 1: store unfiltered
-
- // zs applied to data stored in event buffer (sel. by EBSF)
- cfg->SetTrapReg(AliTRDtrapConfig::kEBIS, 15 << 2); // single indicator threshold (plus two digits)
- cfg->SetTrapReg(AliTRDtrapConfig::kEBIT, 30 << 2); // sum indicator threshold (plus two digits)
- cfg->SetTrapReg(AliTRDtrapConfig::kEBIL, 0xf0); // lookup table
- cfg->SetTrapReg(AliTRDtrapConfig::kEBIN, 0); // neighbour sensitivity
-
- // raw data
- cfg->SetTrapReg(AliTRDtrapConfig::kNES, (0x0000 << 16) | 0x1000);
+ // ****** hit position LUT configuration end
return 0;
}
-Int_t AliTRDtrapConfigHandler::LoadConfig(TString filename, Int_t det)
+
+Int_t AliTRDtrapConfigHandler::LoadConfig(TString filename)
{
//
// load a TRAP configuration from a file
// which are two tools to inspect/export configurations from wingDB
//
+ if (!fTrapConfig) {
+ AliError("No TRAPconfig given");
+ return -1;
+ }
- fDet = det;
Int_t ignoredLines=0;
Int_t ignoredCmds=0;
Int_t readLines=0;
- AliTRDtrapConfig *cfg = AliTRDtrapConfig::Instance();
-
AliDebug(5, Form("Processing file %s", filename.Data()));
std::ifstream infile;
infile.open(filename.Data(), std::ifstream::in);
// reset restrictive mask
fRestrictiveMask = (0x3ffff << 11) | (0x1f << 6) | 0x3f;
- Int_t sec = AliTRDgeometry::GetSector(fDet);
- Int_t stack = AliTRDgeometry::GetStack(fDet);
- Int_t layer = AliTRDgeometry::GetLayer(fDet);
- UInt_t rocpos = (1 << (sec+11)) | (1 << (stack+6)) | (1 << layer);
+ char linebuffer[512];
+ istringstream line;
- while(infile.good()) {
+ while(infile.getline(linebuffer, 512) && infile.good()) {
+ line.clear();
+ line.str(linebuffer);
cmd=999;
extali=-1;
addr=-1;
data=-1;
- infile >> std::skipws >> cmd >> addr >> data >> extali;
- // std::cout << "no: " << no << ", cmd " << cmd << ", extali " << extali << ", addr " << addr << ", data " << data << endl;
-
- if(cmd!=999 && extali!=-1 && addr != -1 && data!= -1 && extali!=-1) {
- if(cmd==fgkScsnCmdWrite) {
- if ((fRestrictiveMask & rocpos) == rocpos)
- cfg->AddValues(det, cmd, extali, addr, data);
- }
- else if(cmd == fgkScsnCmdRestr)
- fRestrictiveMask = data;
- else if(cmd == fgkScsnLTUparam)
+ line >> std::skipws >> cmd >> addr >> data >> extali; // the lines read from config file can contain additional columns.
+ // Therefore the detour via istringstream
+
+ if(cmd!=999 && addr != -1 && data!= -1 && extali!=-1) {
+
+ if(cmd==fgkScsnCmdWrite) {
+ for(Int_t det=0; det<AliTRDgeometry::Ndet(); det++) {
+ UInt_t rocpos = (1 << (AliTRDgeometry::GetSector(det)+11)) | (1 << (AliTRDgeometry::GetStack(det)+6)) | (1 << AliTRDgeometry::GetLayer(det));
+ AliDebug(1, Form("checking restriction: mask=0x%08x, rocpos=0x%08x", fRestrictiveMask, rocpos));
+ if ((fRestrictiveMask & rocpos) == rocpos) {
+ AliDebug(1, Form("match: %i %i %i %i", cmd, extali, addr, data));
+ AddValues(det, cmd, extali, addr, data);
+ }
+ }
+ }
+
+ else if(cmd == fgkScsnLTUparam) {
ProcessLTUparam(extali, addr, data);
- else
+ }
+
+ else if(cmd == fgkScsnCmdRestr) {
+ fRestrictiveMask = data;
+ AliDebug(1, Form("updated restrictive mask to 0x%08x", fRestrictiveMask));
+ }
+
+ else if((cmd == fgkScsnCmdReset) ||
+ (cmd == fgkScsnCmdRobReset)) {
+ fTrapConfig->ResetRegs();
+ }
+
+ else if (cmd == fgkScsnCmdSetHC) {
+ Int_t fullVersion = ((data & 0x7F00) >> 1) | (data & 0x7f);
+
+ for (Int_t iDet = 0; iDet < AliTRDgeometry::Ndet(); iDet++) {
+ Int_t smls = (AliTRDgeometry::GetSector(iDet) << 6) | (AliTRDgeometry::GetLayer(iDet) << 3) | AliTRDgeometry::GetStack(iDet);
+
+ for (Int_t iRob = 0; iRob < 8; iRob++) {
+ // HC mergers
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kC14CPUA, 0xc << 16, iDet, iRob, 17);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kC15CPUA, ((1<<29) | (fullVersion<<15) | (1<<12) | (smls<<1) | (iRob%2)), iDet, iRob, 17);
+
+ // board mergers
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kC14CPUA, 0, iDet, iRob, 16);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kC15CPUA, ((1<<29) | (fullVersion<<15) | (1<<12) | (smls<<1) | (iRob%2)), iDet, iRob, 16);
+
+ // and now for the others
+ for (Int_t iMcm = 0; iMcm < 16; iMcm++) {
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kC14CPUA, iMcm | (iRob << 4) | (3 << 16), iDet, iRob, iMcm);
+ fTrapConfig->SetTrapReg(AliTRDtrapConfig::kC15CPUA, ((1<<29) | (fullVersion<<15) | (1<<12) | (smls<<1) | (iRob%2)), iDet, iRob, iMcm);
+ }
+ }
+ }
+ }
+
+ else if((cmd == fgkScsnCmdRead) ||
+ (cmd == fgkScsnCmdPause) ||
+ (cmd == fgkScsnCmdPtrg) ||
+ (cmd == fgkScsnCmdHwPtrg) ||
+ (cmd == fgkScsnCmdRobPower) ||
+ (cmd == fgkScsnCmdTtcRx) ||
+ (cmd == fgkScsnCmdMcmTemp) ||
+ (cmd == fgkScsnCmdOri) ||
+ (cmd == fgkScsnCmdPM) ) {
+ AliDebug(2, Form("ignored SCSN command: %i %i %i %i", cmd, addr, data, extali));
+ }
+
+ else {
+ AliWarning(Form("unknown SCSN command: %i %i %i %i", cmd, addr, data, extali));
ignoredCmds++;
+ }
readLines++;
}
+
else if(!infile.eof() && !infile.good()) {
infile.clear();
infile.ignore(256, '\n');
}
+
+Int_t AliTRDtrapConfigHandler::SetGaintable(AliTRDCalOnlineGainTable const >bl)
+{
+ fGtbl=gtbl;
+ return 0;
+}
+
+
void AliTRDtrapConfigHandler::ProcessLTUparam(Int_t dest, Int_t addr, UInt_t data)
{
//
switch (dest) {
case 0: // set the parameters in AliTRDtrapConfig
- ConfigureDyCorr();
- ConfigureDRange(); // deflection range
- ConfigureNTimebins(); // timebins in the drift region
- ConfigurePIDcorr(); // scaling parameters for the PID
+ for(Int_t det=0; det<AliTRDgeometry::Ndet(); det++) {
+ ConfigureDyCorr(det);
+ ConfigureDRange(det); // deflection range
+ ConfigureNTimebins(det); // timebins in the drift region
+ ConfigurePIDcorr(det); // scaling parameters for the PID
+ }
break;
case 1: // set variables
}
-void AliTRDtrapConfigHandler::ConfigureNTimebins()
+void AliTRDtrapConfigHandler::ConfigureNTimebins(Int_t det)
{
//
// Set timebins in the drift region
//
- AliTRDtrapConfig::Instance()->AddValues(fDet, fgkScsnCmdWrite, 127, AliTRDtrapConfig::fgkDmemAddrNdrift, ltuParam.GetNtimebins());
+
+ if (!fTrapConfig) {
+ AliError("No TRAPconfig given");
+ return;
+ }
+
+ AddValues(det, fgkScsnCmdWrite, 127, AliTRDmcmSim::fgkDmemAddrNdrift, ltuParam.GetNtimebins());
}
-void AliTRDtrapConfigHandler::ConfigureDyCorr()
+void AliTRDtrapConfigHandler::ConfigureDyCorr(Int_t det)
{
//
// Deflection length correction
// This correction is in units of padwidth / (256*32)
//
- Int_t nRobs = AliTRDgeometry::GetStack(fDet) == 2 ? 6 : 8;
+ if (!fTrapConfig) {
+ AliError("No TRAPconfig given");
+ return;
+ }
+
+ Int_t nRobs = AliTRDgeometry::GetStack(det) == 2 ? 6 : 8;
for (Int_t r = 0; r < nRobs; r++) {
for (Int_t m = 0; m < 16; m++) {
Int_t dest = 1<<10 | r<<7 | m;
- Int_t dyCorrInt = ltuParam.GetDyCorrection(fDet, r, m);
- AliTRDtrapConfig::Instance()->AddValues(fDet, fgkScsnCmdWrite, dest, AliTRDtrapConfig::fgkDmemAddrDeflCorr, dyCorrInt);
+ Int_t dyCorrInt = ltuParam.GetDyCorrection(det, r, m);
+ AddValues(det, fgkScsnCmdWrite, dest, AliTRDmcmSim::fgkDmemAddrDeflCorr, dyCorrInt);
}
}
}
-void AliTRDtrapConfigHandler::ConfigureDRange()
+void AliTRDtrapConfigHandler::ConfigureDRange(Int_t det)
{
//
// deflection range LUT
// deflection (-64..63) is used
//
- Int_t nRobs = AliTRDgeometry::GetStack(fDet) == 2 ? 6 : 8;
+ if (!fTrapConfig) {
+ AliError("No TRAPconfig given");
+ return;
+ }
+
+ Int_t nRobs = AliTRDgeometry::GetStack(det) == 2 ? 6 : 8;
Int_t dyMinInt;
Int_t dyMaxInt;
// cout << "r " << r << ", m" << m << ", c " << c << ", min angle: " << localPhi-maxDeflAngle << ", max: " << localPhi+maxDeflAngle
// << ", min int: " << dyMinInt << ", max int: " << dyMaxInt << endl;
Int_t dest = 1<<10 | r<<7 | m;
- Int_t lutAddr = AliTRDtrapConfig::fgkDmemAddrDeflCutStart + 2*c;
- ltuParam.GetDyRange(fDet, r, m, c, dyMinInt, dyMaxInt);
- AliTRDtrapConfig::Instance()->AddValues(fDet, fgkScsnCmdWrite, dest, lutAddr+0, dyMinInt);
- AliTRDtrapConfig::Instance()->AddValues(fDet, fgkScsnCmdWrite, dest, lutAddr+1, dyMaxInt);
+ Int_t lutAddr = AliTRDmcmSim::fgkDmemAddrDeflCutStart + 2*c;
+ ltuParam.GetDyRange(det, r, m, c, dyMinInt, dyMaxInt);
+ AddValues(det, fgkScsnCmdWrite, dest, lutAddr+0, dyMinInt);
+ AddValues(det, fgkScsnCmdWrite, dest, lutAddr+1, dyMaxInt);
}
}
}
for(int stack=0; stack<5; stack++) {
for(int layer=0; layer<6; layer++) {
- fDet = sm*30+stack*6+layer;
+ Int_t det = sm*30+stack*6+layer;
for (Int_t r = 0; r < 6; r++) {
for (Int_t m = 0; m < 16; m++) {
for (Int_t c = 7; c < 8; c++) {
cout << stack << ";" << layer << ";" << r << ";" << m
- << ";" << ltuParam.GetX(fDet, r, m)
- << ";" << ltuParam.GetLocalY(fDet, r, m, c)
- << ";" << ltuParam.GetLocalZ(fDet, r, m) << endl;
+ << ";" << ltuParam.GetX(det, r, m)
+ << ";" << ltuParam.GetLocalY(det, r, m, c)
+ << ";" << ltuParam.GetLocalZ(det, r, m) << endl;
}
}
}
}
-void AliTRDtrapConfigHandler::ConfigurePIDcorr()
+void AliTRDtrapConfigHandler::ConfigurePIDcorr(Int_t det)
{
//
// Calculate the MCM individual correction factors for the PID
// and transfer them to AliTRDtrapConfig
//
- static const Int_t addrLUTcor0 = AliTRDtrapConfig::fgkDmemAddrLUTcor0;
- static const Int_t addrLUTcor1 = AliTRDtrapConfig::fgkDmemAddrLUTcor1;
+ if (!fTrapConfig) {
+ AliError("No TRAPconfig given");
+ return;
+ }
+
+ static const Int_t addrLUTcor0 = AliTRDmcmSim::fgkDmemAddrLUTcor0;
+ static const Int_t addrLUTcor1 = AliTRDmcmSim::fgkDmemAddrLUTcor1;
UInt_t cor0;
UInt_t cor1;
- Int_t nRobs = AliTRDgeometry::GetStack(fDet) == 2 ? 6 : 8;
+ Int_t nRobs = AliTRDgeometry::GetStack(det) == 2 ? 6 : 8;
for (Int_t r=0; r<nRobs; r++) {
for(Int_t m=0; m<16; m++) {
Int_t dest = 1<<10 | r<<7 | m;
- ltuParam.GetCorrectionFactors(fDet, r, m, 0, cor0, cor1);
- AliTRDtrapConfig::Instance()->AddValues(fDet, fgkScsnCmdWrite, dest, addrLUTcor0, cor0);
- AliTRDtrapConfig::Instance()->AddValues(fDet, fgkScsnCmdWrite, dest, addrLUTcor1, cor1);
+ if(fGtbl.GetGainTableROC(det) && fGtbl.GetGainTableROC(det)->GetGainTableMCM(r, m))
+ ltuParam.GetCorrectionFactors(det, r, m, 9, cor0, cor1, fGtbl.GetGainTableROC(det)->GetGainTableMCM(r, m)->GetMCMGain());
+ else
+ ltuParam.GetCorrectionFactors(det, r, m, 9, cor0, cor1);
+ AddValues(det, fgkScsnCmdWrite, dest, addrLUTcor0, cor0);
+ AddValues(det, fgkScsnCmdWrite, dest, addrLUTcor1, cor1);
+ }
+ }
+}
+
+
+Bool_t AliTRDtrapConfigHandler::AddValues(UInt_t det, UInt_t cmd, UInt_t extali, Int_t addr, UInt_t data)
+{
+ // transfer the informations provided by LoadConfig to the internal class variables
+
+ if (!fTrapConfig) {
+ AliError("No TRAPconfig given");
+ return kFALSE;
+ }
+
+ if(cmd != fgkScsnCmdWrite) {
+ AliError(Form("Invalid command received: %i", cmd));
+ return kFALSE;
+ }
+
+ AliTRDtrapConfig::TrapReg_t mcmReg = fTrapConfig->GetRegByAddress(addr);
+ Int_t rocType = AliTRDgeometry::GetStack(det) == 2 ? 0 : 1;
+
+ static const int mcmListSize=40; // 40 is more or less arbitrary
+ Int_t mcmList[mcmListSize];
+
+ // configuration registers
+ if(mcmReg >= 0 && mcmReg < AliTRDtrapConfig::kLastReg) {
+
+ for(Int_t linkPair=0; linkPair<fgkMaxLinkPairs; linkPair++) {
+ if(AliTRDfeeParam::ExtAliToAli(extali, linkPair, rocType, mcmList, mcmListSize)!=0) {
+ Int_t i=0;
+ while(mcmList[i] != -1 && i<mcmListSize) {
+ if(mcmList[i]==127) {
+ AliDebug(1, Form("broadcast write to %s: 0x%08x",
+ fTrapConfig->GetRegName((AliTRDtrapConfig::TrapReg_t) mcmReg), data));
+ fTrapConfig->SetTrapReg( (AliTRDtrapConfig::TrapReg_t) mcmReg, data, det);
+ }
+ else {
+ AliDebug(1, Form("individual write to %s (%i, %i): 0x%08x",
+ fTrapConfig->GetRegName((AliTRDtrapConfig::TrapReg_t) mcmReg), (mcmList[i]>>7), (mcmList[i]&0x7F), data));
+ fTrapConfig->SetTrapReg( (AliTRDtrapConfig::TrapReg_t) mcmReg, data, det, (mcmList[i]>>7)&0x7, (mcmList[i]&0x7F));
+ }
+ i++;
+ }
+ }
+ }
+ return kTRUE;
+ }
+ // DMEM
+ else if ( (addr >= AliTRDtrapConfig::fgkDmemStartAddress) &&
+ (addr < (AliTRDtrapConfig::fgkDmemStartAddress + AliTRDtrapConfig::fgkDmemWords))) {
+ for(Int_t linkPair=0; linkPair<fgkMaxLinkPairs; linkPair++) {
+ if(AliTRDfeeParam::ExtAliToAli(extali, linkPair, rocType, mcmList, mcmListSize)!=0) {
+ Int_t i=0;
+ while(mcmList[i] != -1 && i < mcmListSize) {
+ if(mcmList[i] == 127)
+ fTrapConfig->SetDmem(addr, data, det, 0, 127);
+ else
+ fTrapConfig->SetDmem(addr, data, det, mcmList[i] >> 7, mcmList[i] & 0x7f);
+ i++;
+ }
+ }
}
+ return kTRUE;
+ }
+ else if ( (addr >= AliTRDtrapConfig::fgkImemStartAddress) &&
+ (addr < (AliTRDtrapConfig::fgkImemStartAddress + AliTRDtrapConfig::fgkImemWords))) {
+ // IMEM is ignored for now
+ return kTRUE;
+ }
+ else if ( (addr >= AliTRDtrapConfig::fgkDbankStartAddress) &&
+ (addr < (AliTRDtrapConfig::fgkDbankStartAddress + AliTRDtrapConfig::fgkImemWords))) {
+ // DBANK is ignored for now
+ return kTRUE;
+ }
+ else {
+ AliError(Form("Writing to unhandled address 0x%04x", addr));
+ return kFALSE;
}
}