[u/mrichter/AliRoot.git] / EMCAL / SMcalib / DCSGenerateAPD.C

// constants
static const int fgkEmCalRows = 24; // number of rows per module for EMCAL
static const int fgkEmCalCols = 48; // number of columns per module for EMCAL

const int NRCU = 2; // per SM
const int NBranch = 2; // per RCU
const int NFEC = 9; // per branch, labelled 1..9
const int NCSP = 32; // per FEC

// conversion between DAC (0-0x3ff) and HV values (V):
// hv = hvmin + prop*DAC; values from PHOS manual, and used in Houston/Catania
const float hvmin = 209.9;
const float prop = 0.2022; 

// some global variables
Float_t biasVoltage[NRCU][NBranch][NFEC][NCSP]; 
int towerCol[NRCU][NBranch][NFEC][NCSP]; 
int towerRow[NRCU][NBranch][NFEC][NCSP]; 

//__________________________________________________________
void Tower2FEEBiasInfo(const char *inputFileName)
{
  ifstream inputFile(inputFileName);
  int ic, ir;
  Float_t ival;
  int ircu, ibranch, card, icsp;
  for (int icol=0; icol<fgkEmCalCols; icol++) {
    for (int irow=0; irow<fgkEmCalRows; irow++) {
      inputFile >> ic >> ir >> ival;

      // could check here that ic && ir match with icol && irow, but should not be needed

      // translate to FEE type indices
      Tower2FEEMap(ic, ir, 
		   &ircu, &ibranch, &card, &icsp);

      // debug
      /*
      printf("ic %d ir %d ircu %d ibranch %d card %d icsp %d\n",
	     ic, ir, ircu, ibranch, card, icsp);
      */

      // store value
      biasVoltage[ircu][ibranch][card][icsp] = ival;
      towerCol[ircu][ibranch][card][icsp] = ic;
      towerRow[ircu][ibranch][card][icsp] = ir;
    }
  }

  inputFile.close();

  return;
}

//__________________________________________________________
void Tower2FEEMap(const int icol, const int irow,
		  int *ircu, int *ibranch, int *card, int *icsp)
{ /*
    If you are interested in where these magic numbers come from -
    See mapping info on 
    http://dsilverm.web.cern.ch/dsilverm/mapping/emcal_mapping.html
    http://dsilverm.web.cern.ch/dsilverm/mapping/ppt/Coordinates_and_Mapping.pdf
   */

  // each FEC covers a 4x8 tower area
  int C = irow/8; // Cable bundle
  int FEC = C*12 + icol/4; // FEC in 0..35 range

  *ircu = FEC / 18; // 18 FEC per RCU
  *ibranch = (FEC%18) / 9;
  *card = FEC % 9;  

  // columns and rows within an FEC area
  int tCol = icol%4;
  int tRow = irow%8;

  // The mapping to CSP is a bit complicated so I also define two more help variables here..
  // which T-card?
  int TCard = tCol/2; // 0=Top (even StripModules), 1=Bottom (odd StripModules)
  int locCol = tCol%2;  // local column inside T-card 

  *icsp = (7 - tRow) + locCol*16 + TCard*8;
}

/* Main method.. */
//__________________________________________________________
void DCSGenerateAPD(const char *inputFileName,
		    const char *outputDir,
		    const int readBack=0) 
{

  // set up which bias voltage should be applicable for which CSP..
  Tower2FEEBiasInfo(inputFileName);

  // general setup block: note - for old RCU firmware (DS: hope this doesn't change with new firmware)
  const char *branch_str[] = { "A", "B"};
  const int trailer_offset = 0x48;
  const int read_header = 0x520000; 
  const int write_header = 0x620000; 
  
  // resulting voltage settings should be good within a few volts 
  cout << " HV-DAC prop. constant = " << prop << endl;
  char iv_dac_setting[100]; 
  
  char cfile[200];

  FILE* fout_setbias_card[NRCU][NBranch][NFEC];
  FILE* fout_readbias_card[NRCU][NBranch][NFEC];
  
  // end of setup, let's go..
  
  int rcu_addr_card = 0x7000;
  int csp_addr = trailer_offset;
  int word = 0;
  char comment[400];
  
  int rcu_addr_read = 0x7000; // we'll also write the readbias file in the same loop, so
  // need a separate index also

  for (int rcu=0; rcu<NRCU; rcu++) {
    for (int branch=0; branch<NBranch; branch++) {
      for (int ifec=0; ifec<NFEC; ifec++) {
	int card = ifec;
	int icard = ifec+1;

	sprintf(cfile,"%s/set_rcu_%d_bias_branch_%s_FEC_%d.scr",
		outputDir, rcu, 
		branch_str[branch], icard);
	fout_setbias_card[rcu][branch][card] = fopen(cfile, "w");

	sprintf(cfile,"%s/read_rcu_%d_bias_branch_%s_FEC_%d.scr", 
		outputDir, rcu,
		branch_str[branch], icard);
	fout_readbias_card[rcu][branch][card] = fopen(cfile, "w");

	rcu_addr_card = 0x7000;
	rcu_addr_read = 0x7000;

	for (int icsp = 0; icsp<NCSP; icsp++) {
	  
	  /* 
	     some funkiness to address the CSPs correctly follows here. 
	     DS verified this with section 16.1 "Bias voltage programming", table 8
	     of H. Muller's PHOS manual (version from Jan 2007) 
	  */ 
	  if (icsp<16) { csp_addr = trailer_offset + icsp; }
	  else { csp_addr = trailer_offset - 1 - (icsp%16); }
	  if (icsp >= 24) csp_addr += 0x20;

	  // what does the desired voltage (in V) correspond to in DAC?
	  int iv_dac = (int)( (biasVoltage[rcu][branch][card][icsp] - hvmin)/prop + 0.5); // round-off
	  if (iv_dac > 0x3FF) iv_dac = 0x3FF;
	  sprintf(iv_dac_setting,"700%03X",iv_dac);


	  // set up instructions that should be written
	  word = write_header | (branch << 16) | (icard << 12) | (csp_addr);

	  // write a long comment with all info for this CSP
	  sprintf(comment, "# RCU %d, Branch %s, FEC %d, CSP %02d - Tower Col %02d, Row %02d ", 
		  rcu, branch_str[branch], icard, icsp,
		  towerCol[rcu][branch][card][icsp],
		  towerRow[rcu][branch][card][icsp]
		  );  
	
	  fprintf(fout_setbias_card[rcu][branch][card], "w 0x%4X 0x%6X   %s\n",
		  rcu_addr_card, word, comment);
	  rcu_addr_card++;

	  fprintf(fout_setbias_card[rcu][branch][card], "w 0x%4X 0x%s   # Set Voltage: %4.1f V, DAC %d (hex: %03X)\n", 
		  rcu_addr_card, iv_dac_setting, 
		  biasVoltage[rcu][branch][card][icsp], 
		  iv_dac, iv_dac
		  );
	  rcu_addr_card++;

	  // slighly modified comment for read command - include voltage info
	  sprintf(comment, "# RCU %d, Branch %s, FEC %d, CSP %02d - Tower Col %02d, Row %02d : %4.1f V, DAC %d (hex: %03X)", 
		  rcu, branch_str[branch], icard, icsp,
		  towerCol[rcu][branch][card][icsp],
		  towerRow[rcu][branch][card][icsp],
		  biasVoltage[rcu][branch][card][icsp], 
		  iv_dac, iv_dac
		  );  

	  word = read_header | (branch << 16) | (icard << 12) | (csp_addr);
	  fprintf(fout_readbias_card[rcu][branch][card], "w 0x%4X 0x%06X  %s\n", rcu_addr_read, word, comment);
	  rcu_addr_read++;
	} // csp loop
	
	// after CSP per card; send update command
	word = write_header | (branch << 16) | (icard << 12) | 0x1e;
	fprintf(fout_setbias_card[rcu][branch][card],"w 0x%4X 0x%06X   # Update Voltages\n", 
		rcu_addr_card, word); 
	rcu_addr_card++;

	// also put ending for the individual card files:
	fprintf(fout_setbias_card[rcu][branch][card],"w 0x%4X 0x%06X \n", 
		rcu_addr_card, 0x700000);
	rcu_addr_card++;
	fprintf(fout_setbias_card[rcu][branch][card],"w 0x%4X 0x%06X \n", 
		rcu_addr_card, 0x390000);
	rcu_addr_card++;
      
	fprintf(fout_setbias_card[rcu][branch][card],"wait 1 us\n");
	fprintf(fout_setbias_card[rcu][branch][card],"w 0x0 0x0           # execute and update registers\n");
	fprintf(fout_setbias_card[rcu][branch][card],"wait 1 us\n");
	fprintf(fout_setbias_card[rcu][branch][card],"w 0x0 0x0           # execute and update registers again\n");
	fprintf(fout_setbias_card[rcu][branch][card],"wait 1 us\n");
	fprintf(fout_setbias_card[rcu][branch][card],"r 0x7800            # error checking\n");
	fprintf(fout_setbias_card[rcu][branch][card],"w 0x6c01 0x 0       # clear registers\n");
	

	// in case we want to check what was written
	if (readBack) {
	  fprintf(fout_setbias_card[rcu][branch][card],"wait 1 us\n");
	  fprintf(fout_setbias_card[rcu][branch][card],"b %s      # read-back the values also\n", cfile);
	  fprintf(fout_setbias_card[rcu][branch][card],"wait 1 us\n");
	}


	// close down output files (set)
	fclose(fout_setbias_card[rcu][branch][card]);
	
	// readbias ending
	fprintf(fout_readbias_card[rcu][branch][card],"w 0x%4X 0x%06X \n", 
		rcu_addr_read, 0x390000);
	rcu_addr_read++;

	fprintf(fout_readbias_card[rcu][branch][card],"wait 1 us\n");
	fprintf(fout_readbias_card[rcu][branch][card],"w 0x0 0x0           # execute and update registers\n");

	fprintf(fout_readbias_card[rcu][branch][card],"wait 1 us\n");
	fprintf(fout_readbias_card[rcu][branch][card],"r 0x7800            # error checking\n");
	fprintf(fout_readbias_card[rcu][branch][card],"wait 1 us\n");
	fprintf(fout_readbias_card[rcu][branch][card],"r 0x6000 %d( \n", NCSP);
	fprintf(fout_readbias_card[rcu][branch][card],"wait 1 us\n");
	fprintf(fout_readbias_card[rcu][branch][card],"r 0x7800            # error checking\n");
	fprintf(fout_readbias_card[rcu][branch][card],"w 0x6c01 0x 0       # clear registers\n");
	
	// close down output files (read)
	fclose(fout_readbias_card[rcu][branch][card]);

      } // card=FEC
    } // branch
  } // rcu

}
Commit	Line	Data
a8827307	1	// constants
	2	static const int fgkEmCalRows = 24; // number of rows per module for EMCAL
	3	static const int fgkEmCalCols = 48; // number of columns per module for EMCAL
	4
	5	const int NRCU = 2; // per SM
	6	const int NBranch = 2; // per RCU
	7	const int NFEC = 9; // per branch, labelled 1..9
	8	const int NCSP = 32; // per FEC
	9
cdb5074a	10	// conversion between DAC (0-0x3ff) and HV values (V):
	11	// hv = hvmin + prop*DAC; values from PHOS manual, and used in Houston/Catania
	12	const float hvmin = 209.9;
	13	const float prop = 0.2022;
	14
a8827307	15	// some global variables
cdb5074a	16	Float_t biasVoltage[NRCU][NBranch][NFEC][NCSP];
a8827307	17	int towerCol[NRCU][NBranch][NFEC][NCSP];
	18	int towerRow[NRCU][NBranch][NFEC][NCSP];
	19
	20	//__________________________________________________________
	21	void Tower2FEEBiasInfo(const char *inputFileName)
	22	{
	23	ifstream inputFile(inputFileName);
cdb5074a	24	int ic, ir;
cdb5074a	25	Float_t ival;
a8827307	26	int ircu, ibranch, card, icsp;
	27	for (int icol=0; icol<fgkEmCalCols; icol++) {
	28	for (int irow=0; irow<fgkEmCalRows; irow++) {
	29	inputFile >> ic >> ir >> ival;
	30
	31	// could check here that ic && ir match with icol && irow, but should not be needed
	32
	33	// translate to FEE type indices
	34	Tower2FEEMap(ic, ir,
	35	&ircu, &ibranch, &card, &icsp);
	36
	37	// debug
	38	/*
	39	printf("ic %d ir %d ircu %d ibranch %d card %d icsp %d\n",
	40	ic, ir, ircu, ibranch, card, icsp);
	41	*/
	42
	43	// store value
	44	biasVoltage[ircu][ibranch][card][icsp] = ival;
	45	towerCol[ircu][ibranch][card][icsp] = ic;
	46	towerRow[ircu][ibranch][card][icsp] = ir;
	47	}
	48	}
	49
	50	inputFile.close();
	51
	52	return;
	53	}
	54
	55	//__________________________________________________________
	56	void Tower2FEEMap(const int icol, const int irow,
	57	int ircu, int ibranch, int card, int icsp)
	58	{ /*
	59	If you are interested in where these magic numbers come from -
	60	See mapping info on
	61	http://dsilverm.web.cern.ch/dsilverm/mapping/emcal_mapping.html
	62	http://dsilverm.web.cern.ch/dsilverm/mapping/ppt/Coordinates_and_Mapping.pdf
	63	*/
	64
	65	// each FEC covers a 4x8 tower area
	66	int C = irow/8; // Cable bundle
	67	int FEC = C*12 + icol/4; // FEC in 0..35 range
	68
	69	*ircu = FEC / 18; // 18 FEC per RCU
	70	*ibranch = (FEC%18) / 9;
	71	*card = FEC % 9;
	72
	73	// columns and rows within an FEC area
	74	int tCol = icol%4;
	75	int tRow = irow%8;
	76
	77	// The mapping to CSP is a bit complicated so I also define two more help variables here..
	78	// which T-card?
	79	int TCard = tCol/2; // 0=Top (even StripModules), 1=Bottom (odd StripModules)
	80	int locCol = tCol%2; // local column inside T-card
	81
	82	icsp = (7 - tRow) + locCol16 + TCard*8;
	83	}
	84
	85	/* Main method.. */
	86	//__________________________________________________________
	87	void DCSGenerateAPD(const char *inputFileName,
	88	const char *outputDir,
	89	const int readBack=0)
90	{
91
92	// set up which bias voltage should be applicable for which CSP..
93	Tower2FEEBiasInfo(inputFileName);
94
95	// general setup block: note - for old RCU firmware (DS: hope this doesn't change with new firmware)
96	const char *branch_str[] = { "A", "B"};
97	const int trailer_offset = 0x48;
98	const int read_header = 0x520000;
99	const int write_header = 0x620000;
100
a8827307	101	// resulting voltage settings should be good within a few volts
	102	cout << " HV-DAC prop. constant = " << prop << endl;
	103	char iv_dac_setting[100];
	104
	105	char cfile[200];
	106
	107	FILE* fout_setbias_card[NRCU][NBranch][NFEC];
	108	FILE* fout_readbias_card[NRCU][NBranch][NFEC];
	109
	110	// end of setup, let's go..
	111
	112	int rcu_addr_card = 0x7000;
	113	int csp_addr = trailer_offset;
	114	int word = 0;
	115	char comment[400];
	116
	117	int rcu_addr_read = 0x7000; // we'll also write the readbias file in the same loop, so
	118	// need a separate index also
	119
	120	for (int rcu=0; rcu<NRCU; rcu++) {
	121	for (int branch=0; branch<NBranch; branch++) {
	122	for (int ifec=0; ifec<NFEC; ifec++) {
	123	int card = ifec;
	124	int icard = ifec+1;
	125
	126	sprintf(cfile,"%s/set_rcu_%d_bias_branch_%s_FEC_%d.scr",
	127	outputDir, rcu,
	128	branch_str[branch], icard);
	129	fout_setbias_card[rcu][branch][card] = fopen(cfile, "w");
	130
	131	sprintf(cfile,"%s/read_rcu_%d_bias_branch_%s_FEC_%d.scr",
	132	outputDir, rcu,
	133	branch_str[branch], icard);
	134	fout_readbias_card[rcu][branch][card] = fopen(cfile, "w");
	135
	136	rcu_addr_card = 0x7000;
	137	rcu_addr_read = 0x7000;
	138
	139	for (int icsp = 0; icsp<NCSP; icsp++) {
	140
	141	/*
	142	some funkiness to address the CSPs correctly follows here.
	143	DS verified this with section 16.1 "Bias voltage programming", table 8
	144	of H. Muller's PHOS manual (version from Jan 2007)
	145	*/
	146	if (icsp<16) { csp_addr = trailer_offset + icsp; }
	147	else { csp_addr = trailer_offset - 1 - (icsp%16); }
	148	if (icsp >= 24) csp_addr += 0x20;
	149
	150	// what does the desired voltage (in V) correspond to in DAC?
cdb5074a	151	int iv_dac = (int)( (biasVoltage[rcu][branch][card][icsp] - hvmin)/prop + 0.5); // round-off
a8827307	152	if (iv_dac > 0x3FF) iv_dac = 0x3FF;
	153	sprintf(iv_dac_setting,"700%03X",iv_dac);
	154
	155
	156	// set up instructions that should be written
	157	word = write_header \| (branch << 16) \| (icard << 12) \| (csp_addr);
	158
	159	// write a long comment with all info for this CSP
cdb5074a	160	sprintf(comment, "# RCU %d, Branch %s, FEC %d, CSP %02d - Tower Col %02d, Row %02d ",
a8827307	161	rcu, branch_str[branch], icard, icsp,
	162	towerCol[rcu][branch][card][icsp],
	163	towerRow[rcu][branch][card][icsp]
	164	);
	165
	166	fprintf(fout_setbias_card[rcu][branch][card], "w 0x%4X 0x%6X %s\n",
	167	rcu_addr_card, word, comment);
	168	rcu_addr_card++;
	169
cdb5074a	170	fprintf(fout_setbias_card[rcu][branch][card], "w 0x%4X 0x%s # Set Voltage: %4.1f V, DAC %d (hex: %03X)\n",
a8827307	171	rcu_addr_card, iv_dac_setting,
	172	biasVoltage[rcu][branch][card][icsp],
	173	iv_dac, iv_dac
	174	);
	175	rcu_addr_card++;
	176
	177	// slighly modified comment for read command - include voltage info
cdb5074a	178	sprintf(comment, "# RCU %d, Branch %s, FEC %d, CSP %02d - Tower Col %02d, Row %02d : %4.1f V, DAC %d (hex: %03X)",
a8827307	179	rcu, branch_str[branch], icard, icsp,
	180	towerCol[rcu][branch][card][icsp],
	181	towerRow[rcu][branch][card][icsp],
	182	biasVoltage[rcu][branch][card][icsp],
	183	iv_dac, iv_dac
	184	);
	185
	186	word = read_header \| (branch << 16) \| (icard << 12) \| (csp_addr);
	187	fprintf(fout_readbias_card[rcu][branch][card], "w 0x%4X 0x%06X %s\n", rcu_addr_read, word, comment);
	188	rcu_addr_read++;
	189	} // csp loop
	190
	191	// after CSP per card; send update command
	192	word = write_header \| (branch << 16) \| (icard << 12) \| 0x1e;
	193	fprintf(fout_setbias_card[rcu][branch][card],"w 0x%4X 0x%06X # Update Voltages\n",
	194	rcu_addr_card, word);
	195	rcu_addr_card++;
	196
	197	// also put ending for the individual card files:
	198	fprintf(fout_setbias_card[rcu][branch][card],"w 0x%4X 0x%06X \n",
	199	rcu_addr_card, 0x700000);
	200	rcu_addr_card++;
	201	fprintf(fout_setbias_card[rcu][branch][card],"w 0x%4X 0x%06X \n",
	202	rcu_addr_card, 0x390000);
	203	rcu_addr_card++;
	204
	205	fprintf(fout_setbias_card[rcu][branch][card],"wait 1 us\n");
	206	fprintf(fout_setbias_card[rcu][branch][card],"w 0x0 0x0 # execute and update registers\n");
	207	fprintf(fout_setbias_card[rcu][branch][card],"wait 1 us\n");
	208	fprintf(fout_setbias_card[rcu][branch][card],"w 0x0 0x0 # execute and update registers again\n");
	209	fprintf(fout_setbias_card[rcu][branch][card],"wait 1 us\n");
	210	fprintf(fout_setbias_card[rcu][branch][card],"r 0x7800 # error checking\n");
	211	fprintf(fout_setbias_card[rcu][branch][card],"w 0x6c01 0x 0 # clear registers\n");
	212
	213
	214	// in case we want to check what was written
	215	if (readBack) {
	216	fprintf(fout_setbias_card[rcu][branch][card],"wait 1 us\n");
	217	fprintf(fout_setbias_card[rcu][branch][card],"b %s # read-back the values also\n", cfile);
	218	fprintf(fout_setbias_card[rcu][branch][card],"wait 1 us\n");
	219	}
	220
	221
	222	// close down output files (set)
	223	fclose(fout_setbias_card[rcu][branch][card]);
	224
	225	// readbias ending
	226	fprintf(fout_readbias_card[rcu][branch][card],"w 0x%4X 0x%06X \n",
	227	rcu_addr_read, 0x390000);
	228	rcu_addr_read++;
	229
	230	fprintf(fout_readbias_card[rcu][branch][card],"wait 1 us\n");
	231	fprintf(fout_readbias_card[rcu][branch][card],"w 0x0 0x0 # execute and update registers\n");
	232
	233	fprintf(fout_readbias_card[rcu][branch][card],"wait 1 us\n");
	234	fprintf(fout_readbias_card[rcu][branch][card],"r 0x7800 # error checking\n");
	235	fprintf(fout_readbias_card[rcu][branch][card],"wait 1 us\n");
	236	fprintf(fout_readbias_card[rcu][branch][card],"r 0x6000 %d( \n", NCSP);
	237	fprintf(fout_readbias_card[rcu][branch][card],"wait 1 us\n");
	238	fprintf(fout_readbias_card[rcu][branch][card],"r 0x7800 # error checking\n");
	239	fprintf(fout_readbias_card[rcu][branch][card],"w 0x6c01 0x 0 # clear registers\n");
	240
	241	// close down output files (read)
	242	fclose(fout_readbias_card[rcu][branch][card]);
243
244	} // card=FEC
245	} // branch
246	} // rcu
247
248	}