Fixes in the geometry: radial positioning of the OB layers, chip readout zones orient...

diff --git a/ITS/UPGRADE/AliITSUv1Layer.cxx b/ITS/UPGRADE/AliITSUv1Layer.cxx
index 1cf9990117b2119d570eeabfeb45326c9a7de805..220010ee130f0e08331bd5c8030e277e3621f331 100644 (file)
--- a/ITS/UPGRADE/AliITSUv1Layer.cxx
+++ b/ITS/UPGRADE/AliITSUv1Layer.cxx
@@ -72,7 +72,7 @@ const Double_t AliITSUv1Layer::fgkOBCarbonPlateThick  =   0.012*fgkcm;
 const Double_t AliITSUv1Layer::fgkOBGlueThick         =   0.03 *fgkcm;
 const Double_t AliITSUv1Layer::fgkOBModuleZLength     =  21.06 *fgkcm;
 const Double_t AliITSUv1Layer::fgkOBHalfStaveYTrans   =   1.76 *fgkmm;
-const Double_t AliITSUv1Layer::fgkOBHalfStaveXOverlap =   2.3  *fgkmm;
+const Double_t AliITSUv1Layer::fgkOBHalfStaveXOverlap =   4.3  *fgkmm;
 const Double_t AliITSUv1Layer::fgkOBGraphiteFoilThick =  30.0  *fgkmicron;
 const Double_t AliITSUv1Layer::fgkOBCoolTubeInnerD    =   2.67 *fgkmm;
 const Double_t AliITSUv1Layer::fgkOBCoolTubeThick     =  64.0  *fgkmicron;
@@ -330,7 +330,7 @@ void AliITSUv1Layer::CreateLayer(TGeoVolume *moth){
 
   // Now build up the layer
   alpha = 360./fNStaves;
-  Double_t r = fLayRadius + ((TGeoBBox*)stavVol->GetShape())->GetDY() + 0.2;
+  Double_t r = fLayRadius + ((TGeoBBox*)stavVol->GetShape())->GetDY();
   for (Int_t j=0; j<fNStaves; j++) {
     Double_t phi = j*alpha + fPhi0;
     xpos = r*CosD(phi);// r*SinD(-phi);
@@ -486,8 +486,8 @@ TGeoVolume* AliITSUv1Layer::CreateStave(const TGeoManager * /*mgr*/){
     } else { // (if fStaveModel) Create new stave struct as in TDR
       xpos = ((TGeoBBox*)(hstaveVol->GetShape()))->GetDX()
           - fgkOBHalfStaveXOverlap/2;
-      ypos = 2*((TGeoBBox*)(hstaveVol->GetShape()))->GetDY()
-          + fgkOBSpaceFrameTotHigh/2;
+      // ypos is CF height as computed in CreateSpaceFrameOuterB1
+      ypos = (fgkOBSpaceFrameTotHigh - fgkOBHalfStaveYTrans)/2;
       staveVol->AddNode(hstaveVol, 0, new TGeoTranslation(-xpos, ypos, 0));
       staveVol->AddNode(hstaveVol, 1, new TGeoTranslation( xpos, ypos+fgkOBHalfStaveYTrans, 0));
       fHierarchy[kHalfStave] = 2; // RS 
@@ -2788,7 +2788,8 @@ TGeoVolume* AliITSUv1Layer::CreateModuleOuterB(const TGeoManager *mgr){
     {
       zpos = -module->GetDZ() + zchip + k*(2*zchip + zGap);
       modVol->AddNode(chipVol, 2*k  , new TGeoTranslation( xpos, ypos, zpos));
-      modVol->AddNode(chipVol, 2*k+1, new TGeoTranslation(-xpos, ypos, zpos));
+      modVol->AddNode(chipVol, 2*k+1, 
+      new TGeoCombiTrans(-xpos, ypos, zpos, new TGeoRotation("",0,180,180)));
       fHierarchy[kChip]+=2;
     }
 

diff --git a/ITS/UPGRADE/testITSUv1/CreateITSUv1.C b/ITS/UPGRADE/testITSUv1/CreateITSUv1.C
index 82639b68acd28b22fea20f452415300de6b7f115..4aee3139eba66c8903b6e94c4d19c93a2d7dded0 100644 (file)
--- a/ITS/UPGRADE/testITSUv1/CreateITSUv1.C
+++ b/ITS/UPGRADE/testITSUv1/CreateITSUv1.C
@@ -31,6 +31,8 @@ void CreateITSUv1()
   const double kPitchZ = 20e-4;
   const int    kNRow   = 650; 
   const int    kNCol   = 1500;
+  const double kSiThickIB = 150e-4;
+  const double kSiThickOB = 150e-4;
   //  const double kSensThick = 120e-4;   // -> sensor Si thickness
   //
   const double kReadOutEdge = 0.2;   // width of the readout edge (passive bottom)
@@ -38,7 +40,7 @@ void CreateITSUv1()
   //
   const int kNLr = 7;
   const int kNLrInner = 3;
-  const int kBuildLevel = 3;
+  const int kBuildLevel = 0;
   enum {kRmn,kRmd,kRmx,kNModPerStave,kPhi0,kNStave,kNPar};
   // Radii are from last TDR (ALICE-TDR-017.pdf Tab. 1.1, rMid is mean value)
   const double tdr5dat[kNLr][kNPar] = { 
@@ -97,13 +99,13 @@ void CreateITSUv1()
     if (idLr>=kNLrInner) {
       nChipsPerStaveLr *= nChipsPerModule;
       ITS->DefineLayer(idLr, phi0, rLr, nChipsPerStaveLr*seg0->Dz(), nStaveLr, nModPerStaveLr, 
-                      seg0->Dy()+150e-4, seg0->Dy(), seg0->GetChipTypeID(),kBuildLevel);
+                      kSiThickOB, seg0->Dy(), seg0->GetChipTypeID(),kBuildLevel);
       //      printf("Add Lr%d: R=%6.2f DZ:%6.2f Staves:%3d NMod/Stave:%3d\n",
       //            idLr,rLr,nChipsPerStaveLr*seg0->Dz(),nStaveLr,nModPerStaveLr);
     } else {
       turbo = -radii2Turbo(tdr5dat[idLr][kRmn],rLr,tdr5dat[idLr][kRmx],seg0->Dx());    
       ITS->DefineLayerTurbo(idLr, phi0, rLr, nChipsPerStaveLr*seg0->Dz(), nStaveLr, nChipsPerStaveLr, 
-                           seg0->Dx(), turbo, seg0->Dy()+250e-4, seg0->Dy(), seg0->GetChipTypeID());
+                           seg0->Dx(), turbo, kSiThickIB, seg0->Dy(), seg0->GetChipTypeID(),kBuildLevel);
       //      printf("Add Lr%d: R=%6.2f DZ:%6.2f Turbo:%+6.2f Staves:%3d NMod/Stave:%3d\n",
       //            idLr,rLr,nChipsPerStaveLr*seg0->Dz(),turbo,nStaveLr,nModPerStaveLr);
     }